2 Commits

Author	SHA1	Message	Date
Andrea Di Biagio	d621120533	[X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics. ... Added target specific combine rules to fold blend intrinsics according to the following rules: 1) fold(blend A, A, Mask) -> A; 2) fold(blend A, B, <allZeros>) -> A; 3) fold(blend A, B, <allOnes>) -> B. Added two new tests to verify that the new folding rules work for all the optimized blend intrinsics. llvm-svn: 208895	2014-05-15 15:18:15 +00:00
Andrea Di Biagio	e85ba4df52	[X86] Add target specific combine rules to fold SSE2/AVX2 packed arithmetic shift intrinsics. ... This patch teaches the backend how to combine packed SSE2/AVX2 arithmetic shift intrinsics. The rules are: - Always fold a packed arithmetic shift by zero to its first operand; - Convert a packed arithmetic shift intrinsic dag node into a ISD::SRA only if the shift count is known to be smaller than the vector element size. This patch also teaches to function 'getTargetVShiftByConstNode' how fold target specific vector shifts by zero. Added two new tests to verify that the DAGCombiner is able to fold sequences of SSE2/AVX2 packed arithmetic shift calls. llvm-svn: 208342	2014-05-08 17:44:04 +00:00