Commit Graph

127416 Commits

Author SHA1 Message Date
Mehdi Amini 907313a9cf llvm-config: replace assertions with a helpful error message
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260700
2016-02-12 18:43:10 +00:00
Krzysztof Parzyszek fd02aad8fd [Hexagon] Add utility functions to detect sign- and zero-extending loads
llvm-svn: 260698
2016-02-12 18:37:23 +00:00
Krzysztof Parzyszek 996ad1fa00 [Hexagon] Replace expansion of spill pseudo-instructions in frame lowering
Rewrite the code to handle all pseudo-instructions in a single pass.

This temporarily reverts spill slot optimization that used general-
purpose registers to hold values of spilled predicate registers.

llvm-svn: 260696
2016-02-12 18:19:53 +00:00
David Majnemer 0f0abc7bc2 [InstCombine] Don't aggressively replace xor with icmp
For some cases, InstCombine replaces the sequence of xor/sub instruction
followed by cmp instruction into a single cmp instruction.

However, this replacement may result suboptimal result especially when
the xor/sub has more than one use, as discussed in
bug 26465 (https://llvm.org/bugs/show_bug.cgi?id=26465).

This patch make the replacement happen only when xor/sub has only one
use.

Differential Revision: http://reviews.llvm.org/D16915

Patch by Taewook Oh!

llvm-svn: 260695
2016-02-12 18:12:38 +00:00
Tom Stellard 46937ca4e7 [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler
Historically, AMD internal sp3 assembler has flat_store* addr, data
format. To match existing code and to enable reuse, change LLVM
definitions to match.  Also update MC and CodeGen tests.

Differential Revision: http://reviews.llvm.org/D16927

Patch by: Nikolay Haustov

llvm-svn: 260694
2016-02-12 17:57:54 +00:00
Changpeng Fang e07f1aa8fa AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass.
Summary:
  It is possible that the loop condition can be a boolean constant (infinite loop,
for example). So we sould handle constant condition in annotating a loop. This
patch adds this functionality to support annotating constant condition.

Reviewers: tstellarAMD, arsenm

Subscribers: llvm-commits, arsenm

Differential Revision: http://reviews.llvm.org/D15093

llvm-svn: 260692
2016-02-12 17:11:04 +00:00
Krzysztof Parzyszek 7ce3dbcb57 [Hexagon] Remove HexagonExpandPredSpillCode pass
This code is dead. The expansion is now done in HexagonFrameLowering.

llvm-svn: 260691
2016-02-12 17:09:58 +00:00
Krzysztof Parzyszek 7d5b4db7f9 [Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
We can generate the actual instructions from the intrinsics without the
need for pseudo-instructions. Also, since the intrinsics have a side-
effect in a form of a store, attempt to optimize away loads from the
store location.

llvm-svn: 260690
2016-02-12 17:01:51 +00:00
Geoff Berry c25d3bd238 [AArch64] Reduce number of callee-save save/restores.
Summary:
Before this change, callee-save registers would be rounded up to even
pairs of GPRs and FPRs.  This change eliminates these extra padding
load/stores, though it does keep the stack allocation the same size
unless both the GPR and FPR sets have an odd size, in which case one
full pair stack slot (16 bytes) is saved.

This optimization cannot currently be done for MachO targets since they
rely on a fast-path .debug_frame equivalent that can only encode
callee-save registers as pairs.

Reviewers: t.p.northover, rengolin, mcrosier, jmolloy

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D17000

llvm-svn: 260689
2016-02-12 16:31:41 +00:00
Krzysztof Parzyszek bdb04d9032 [Hexagon] Handle out-of-range offsets in eliminateFrameIndex
Create a virtual register that will hold the actual address and use it
with the offset of 0 in the place of the original FI.

llvm-svn: 260688
2016-02-12 16:27:23 +00:00
Chad Rosier cd2be7f084 [AArch64] Add support for Qualcomm Kryo CPU.
Machine model description by Dave Estes <cestes@codeaurora.org>.

llvm-svn: 260686
2016-02-12 15:51:51 +00:00
Rafael Espindola cbc31d699b Delete the deprecated LLVMLinkModules.
llvm-svn: 260683
2016-02-12 15:28:45 +00:00
Jun Bum Lim 397eb7b0b3 [AArch64] Merge two adjacent str WZR into str XZR
Summary:
This change merges adjacent 32 bit zero stores into a 64 bit zero store.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
becomes
  str xzr, [x0]

Therefore, four adjacent 32 bit zero stores will be a single stp.
e.g.,
  str wzr, [x0]
  str wzr, [x0, #4]
  str wzr, [x0, #8]
  str wzr, [x0, #12]
becomes
  stp xzr, xzr, [x0]

Reviewers: mcrosier, jmolloy, gberry, t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D16933

llvm-svn: 260682
2016-02-12 15:25:39 +00:00
Krzysztof Parzyszek e59964377c [Hexagon] Specify vector alignment in DataLayout string
The DataLayout can calculate alignment of vectors based on the alignment
of the element type and the number of elements. In fact, it is the product
of these two values. The problem is that for vectors of N x i1, this will
return the alignment of N bytes, since the alignment of i1 is 8 bits. The
vector types of vNi1 should be aligned to N bits instead. Provide explicit
alignment for HVX vectors to avoid such complications.

llvm-svn: 260678
2016-02-12 14:47:38 +00:00
Benjamin Kramer ac5e36f52e Fix uninitialized memory read.
Found by msan.

llvm-svn: 260676
2016-02-12 12:37:21 +00:00
Hrvoje Varga 02f99ea13d [mips][micromips] Written missing test for CEIL.L.S, CEIL.L.D, FLOOR.L.S and FLOOR.L.D instructions
Differential Revision: http://reviews.llvm.org/D17192

llvm-svn: 260673
2016-02-12 12:11:26 +00:00
Haojian Wu ebe01560a3 Remove LLVMGetTargetMachineData in go-binding.
Summary:
LLVMGetTargetMachineData has been removed, and LLVMGetDataLayout is
suggested to use. The LLVMGetDataLayout is exposed in go bindings.
So it's safe to remove the function.

Reviewers: bkramer

Subscribers: llvm-commits, axw

Differential Revision: http://reviews.llvm.org/D17193

llvm-svn: 260670
2016-02-12 11:35:11 +00:00
Chandler Carruth 3937bc70f9 [attrs] Simplify the convergent removal to directly use the pre-built
node set rather than walking the SCC directly.

This directly exposes the functions and has already had null entries
filtered out. We also don't need need to handle optnone as it has
already been handled in the caller -- we never try to remove convergent
when there are optnone functions in the SCC.

With this change, the code for removing convergent should work with the
new pass manager and a different SCC analysis.

llvm-svn: 260668
2016-02-12 09:47:49 +00:00
Chandler Carruth 057df3d423 [attrs] Consolidate the test for a non-SCC, non-convergent function call
with the test for a non-convergent intrinsic call.

While it is possible to use the call records to search for function
calls, we're going to do an instruction scan anyways to find the
intrinsics, we can handle both cases while scanning instructions. This
will also make the logic more amenable to the new pass manager which
doesn't use the same call graph structure.

My next patch will remove use of CallGraphNode entirely and allow this
code to work with both the old and new pass manager. Fortunately, it
should also get strictly simpler without changing functionality.

llvm-svn: 260666
2016-02-12 09:23:53 +00:00
Argyrios Kyrtzidis 47134196fc [unittests/ADT] OptionSetTest: ifdef out for now a specific test that fails on MSVC.
llvm-svn: 260663
2016-02-12 07:50:01 +00:00
Matt Arsenault 296b849163 AMDGPU: Set flat_scratch from flat_scratch_init reg
This was hardcoded to the static private size, but this
would be missing the offset and additional size for someday
when we have dynamic sizing.

Also stops always initializing flat_scratch even when unused.

In the future we should stop emitting this unless flat instructions
are used to access private memory. For example this will initialize
it almost always on VI because flat is used for global access.

llvm-svn: 260658
2016-02-12 06:31:30 +00:00
Mehdi Amini f71d653879 C API: Remove LLVMGetDataLayout that was deprecated in 3.7
From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260657
2016-02-12 06:22:00 +00:00
Mark Lacey 802f19a170 Fix minor error with debug info doc.
Replace 'third' with 'fourth' in the description of the fourth argument.

llvm-svn: 260656
2016-02-12 06:19:16 +00:00
Argyrios Kyrtzidis 6a5c06eaad [unittests/ADT] OptionSetTest: ifdef out a part that fails to compile on MSVC.
llvm-svn: 260655
2016-02-12 05:52:37 +00:00
Argyrios Kyrtzidis 2329967714 [ADT] OptionSet: ifdef out some code that seems to be crashing MSVC.
llvm-svn: 260654
2016-02-12 04:36:48 +00:00
Chandler Carruth bbbbec0b54 [attrs] Run clang-format over a newly added routine in function-attrs
before I update it to be friendly with the new pass manager.

llvm-svn: 260653
2016-02-12 03:07:50 +00:00
Argyrios Kyrtzidis 4538dcb01b [ADT] Introduce ‘OptionSet’ in llvm/ADT headers, which is a utility class that makes it convenient to work with enumerators representing bit options.
llvm-svn: 260652
2016-02-12 02:48:26 +00:00
Matt Arsenault 24ee0785dd AMDGPU: Set element_size in private resource descriptor
Introduce a subtarget feature for this, and leave the default with
the current behavior which assumes up to 16-byte loads/stores can
be used. The field also seems to have the ability to be set to 2 bytes,
but I'm not sure what that would be used for.

llvm-svn: 260651
2016-02-12 02:40:47 +00:00
Kostya Serebryany 9d14e4bb15 [libFuzzer] make -runs=N flag also affect the simple runner (will execute every input N times)
llvm-svn: 260649
2016-02-12 02:32:03 +00:00
Matt Arsenault 16f7bcb661 AMDGPU: Fix mishandling alignment when scalarizing vector loads/stores
I don't think this was causing any real problems, so I'm not sure
how to test for this.

llvm-svn: 260646
2016-02-12 02:22:21 +00:00
Matt Arsenault 55d49cfe2d AMDGPU: Initialize SILowerControlFlow
llvm-svn: 260645
2016-02-12 02:16:10 +00:00
Matt Arsenault 806dd0a532 AMDGPU: Remove trailing whitespace
llvm-svn: 260644
2016-02-12 02:16:07 +00:00
Andrew Wilkins 095e22de47 Avoid linking LLVM component libraries with libLLVM
Patch by Jack Howarth.

When linking to libLLVM, don't also link to the component
libraries that constitute libLLVM.

Differential Revision: http://reviews.llvm.org/D16945

llvm-svn: 260641
2016-02-12 01:42:43 +00:00
Evgeniy Stepanov ba6ca87ffb [msan] Put msan constructor in a comdat.
MSan adds a constructor to each translation unit that calls
__msan_init, and does nothing else. The idea is to run __msan_init
before any instrumented code. This results in multiple constructors
and multiple .init_array entries in the final binary, one per
translation unit. This is absolutely unnecessary; one would be
enough.

This change moves the constructors to a comdat group in order to drop
the extra ones.

llvm-svn: 260632
2016-02-12 00:37:52 +00:00
Mike Aizatsky 95149921b2 [sancov] improved object files handling.
Multi-dso programs result in multiple coverage files dumped of the form
'<module_name>.<pid>.sancov'. When analyzing these coverage files it is
important to use correct corresponding object file.

This change removes the "-obj" sancov flag and lets user specify object
file names alongside coverage files. Sancov tool would match them using
<module_name> part of coverage file and short file name of the object
file.

Corresponding changes:
- compiler-rt: http://reviews.llvm.org/D17171
- docs: http://reviews.llvm.org/D17175

Differential Revision: http://reviews.llvm.org/D17169

llvm-svn: 260628
2016-02-12 00:29:07 +00:00
Philip Reames 854a84c0b0 [LVI] Improve select handling to use condition
This patches teaches LVI to recognize clamp idioms (e.g. select(a > 5, a, 5) will always produce something greater than 5.

The tests end up being somewhat simplistic because trying to exercise the case I actually care about (a loop with a range check on a clamped secondary induction variable) ends up tripping across a couple of other imprecisions in the analysis. Ah, the joys of LVI...

Differential Revision: http://reviews.llvm.org/D16827

llvm-svn: 260627
2016-02-12 00:09:18 +00:00
Nicolai Haehnle b80a5811ce AMDGPU: Quick fix for extreme slowness in spill-scavenge-offset.ll test
Summary: Also, some cosmetic fixes.

Reviewers: arsenm, tstellarAMD

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D17161

llvm-svn: 260625
2016-02-12 00:05:34 +00:00
NAKAMURA Takumi e5fc9f3513 llvm/test/CodeGen/NVPTX/debug-file-loc.ll: Tweak expressions for dos path.
llvm-svn: 260623
2016-02-11 23:59:43 +00:00
Tim Northover 94bdbd09d7 ARMv7k: use Cortex-A7 by default even for tvOS
Also actually test the default CPU from those triples.

llvm-svn: 260621
2016-02-11 23:49:08 +00:00
Reid Kleckner 4ab992d1b4 [codeview] Dump def range lengths in hex
It makes it easier to correlate with assembly dumps, which are typically
given with hex offsets.

llvm-svn: 260619
2016-02-11 23:40:14 +00:00
Matthew Simpson a4e43c5b51 [SLP] Add debug output for extract cost (NFC)
llvm-svn: 260614
2016-02-11 23:06:40 +00:00
Quentin Colombet 490cfbe2a2 Re-apply r238452, the bug was in clang and was fixed in r260567.
Original commit message:
[InstCombine] Fold IntToPtr and PtrToInt into preceding loads.

Currently we only fold a BitCast into a Load when the BitCast is its
only user.

Do the same for any no-op cast.

Patch by Philip Pfaffe!

Differential Revision: http://reviews.llvm.org/D9152

llvm-svn: 260612
2016-02-11 22:30:41 +00:00
Mike Aizatsky fcb06b4aa5 [libfuzzer] Removing coverage-related flags from asan options.
Summary:
Reasons to remove are twofold:
 - we don't really need coverage=1 for libfuzzer operation
 - makes controlling coverage for fuzzer processes non-trivial.

Differential Revision: http://reviews.llvm.org/D17168

llvm-svn: 260611
2016-02-11 22:20:34 +00:00
Sanjay Patel ac42fecf74 [x86] simplify getZeroVector() ; NFCI
Let DAG.getConstant() handle the splatting; there's no need
to repeat that logic here.

See also:
http://reviews.llvm.org/rL258833
http://reviews.llvm.org/rL260582

llvm-svn: 260609
2016-02-11 22:17:04 +00:00
Mehdi Amini 9c1c3ac627 Revert "Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()""
This reverts commit r260603.
I didn't intend to push it :(

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260607
2016-02-11 22:09:11 +00:00
Mehdi Amini c5bf5ecc1b Revert "Define the ThinLTO Pipeline"
This reverts commit r260604.
I didn't intend to push this now.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260606
2016-02-11 22:09:07 +00:00
Mehdi Amini 1462b76cdc Revert "Add a new insert_as() method to DenseMap and use it for ConstantUniqueMap"
This reverts commit r260458.

It was backported on an internal branch and broke stage2 build. Since
this can lead to weird random crash I'm reverting upstream as well
while investigating.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260605
2016-02-11 22:00:36 +00:00
Mehdi Amini 484470d605 Define the ThinLTO Pipeline
Summary:
On the contrary to Full LTO, ThinLTO can afford to shift compile time
from the frontend to the linker: both phases are parallel.
This pipeline is based on the proposal in D13443 for full LTO. We ]
didn't move forward on this proposal because the link was far too long
after that.

This patch refactor the "function simplification" passes that are part
of the inliner loop in a helper function (this part is NFC and can be
commited separately to simplify the diff). The ThinLTO pipeline
integrates in the regular O2/O3 flow:

 - The compile phase perform the inliner with a somehow lighter
   function simplification. (TODO: tune the inliner thresholds here)
   This is intendend to simplify the IR and get rid of obvious things
   like linkonce_odr that will be inlined.
 - The link phase will run the pipeline from the start, extended with
   some specific passes that leverage the augmented knowledge we have
   during LTO. Especially after the inliner is done, a sequence of
   globalDCE/globalOpt is performed, followed by another run of the
   "function simplification" passes.

The measurements on the public test suite as well as on our internal
suite show an overall net improvement. The binary size for the clang
executable is reduced by 5%. We're still tuning it with the bringup
of ThinLTO but this should provide a good starting point.

Reviewers: tejohnson

Subscribers: joker.eph, llvm-commits, dexonsmith

Differential Revision: http://reviews.llvm.org/D17115

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260604
2016-02-11 22:00:31 +00:00
Mehdi Amini f9a3718c5a Refactor the PassManagerBuilder: extract a "addFunctionSimplificationPasses()"
It is intended to contains the passes run over a function after the
inliner is done with a function and before it moves to its callers.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 260603
2016-02-11 22:00:25 +00:00
Quentin Colombet ccd7725808 [IRTranslator] Use a single virtual register to represent any Value.
PR26161.

llvm-svn: 260602
2016-02-11 21:48:32 +00:00