hanchenye-llvm-project

Author	SHA1	Message	Date
Dan Gohman	40503396da	Eliminate more uses of llvm-as and llvm-dis. llvm-svn: 81290	2009-09-08 23:54:48 +00:00
Dan Gohman	7948ef5f87	Add explicit -march=x86 to these tests so that they don't default to -march=x86-64 on 64-bit hosts. llvm-svn: 63579	2009-02-03 00:20:22 +00:00
Dan Gohman	e58ab79f33	Make x86's BT instruction matching more thorough, and add some dagcombines that help it match in several more cases. Add several more cases to test/CodeGen/X86/bt.ll. This doesn't yet include matching for BT with an immediate operand, it just covers more register+register cases. llvm-svn: 63266	2009-01-29 01:59:02 +00:00
Dan Gohman	b8f5ba6781	Disable the register+memory forms of the bt instructions for now. Thanks to Eli for pointing out that these forms don't ignore the high bits of their index operands, and as such are not immediately suitable for use by isel. llvm-svn: 62194	2009-01-13 23:23:30 +00:00
Evan Cheng	4c91aa3418	Do not isel load folding bt instructions for pentium m, core, core2, and AMD processors. These are significantly slower than a load followed by a bt of a register. llvm-svn: 61557	2009-01-02 05:35:45 +00:00
Chris Lattner	3d1bce04e0	add PR # llvm-svn: 61427	2008-12-25 05:40:38 +00:00
Chris Lattner	2a7c988627	Add a simple pattern for matching 'bt'. llvm-svn: 61426	2008-12-25 05:34:37 +00:00