Commit Graph

15 Commits

Author SHA1 Message Date
Fangrui Song 54a6f6839b [ELF][AMDGPU][SPARC] Allow PT_LOAD to have overlapping p_offset ranges on EM_AMDGPU and EM_SPARCV9
llvm-svn: 370180
2019-08-28 09:45:06 +00:00
Fangrui Song 12fb52007b [AMDGPU][test] Define local symbols used in amdgpu-relocs.s
Differential Revision: https://reviews.llvm.org/D61594

llvm-svn: 360046
2019-05-06 14:17:59 +00:00
Fangrui Song e8710ef1fb [ELF] Split RW PT_LOAD on the PT_GNU_RELRO boundary
Summary:
Based on Peter Collingbourne's suggestion in D56828.

Before D56828: PT_LOAD(.data PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) .bss)
Old:           PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) .data .bss)
New:           PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro)) PT_LOAD(.data. .bss)

The new layout reflects the runtime memory mappings.
By having two PT_LOAD segments, we can utilize the NOBITS part of the
first PT_LOAD and save bytes for .bss.rel.ro.

.bss.rel.ro is currently small and only used by copy relocations of
symbols in read-only segments, but it can be used for other purposes in
the future, e.g. if a relro section's statically relocated data is all
zeros, we can move it to .bss.rel.ro.

Reviewers: espindola, ruiu, pcc

Reviewed By: ruiu

Subscribers: nemanjai, jvesely, nhaehnle, javed.absar, kbarton, emaste, arichardson, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D58892

llvm-svn: 356226
2019-03-15 01:29:57 +00:00
Fangrui Song 07f8daf05e [ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Old: PT_LOAD(.data | PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .bss)
New: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .data .bss)

The placement of | indicates page alignment caused by PT_GNU_RELRO. The
new layout has simpler rules and saves space for many cases.

Old size: roundup(.data) + roundup(.data.rel.ro)
New size: roundup(.data.rel.ro + .bss.rel.ro) + .data

Other advantages:

* At runtime the 3 memory mappings decrease to 2.
* start(PT_TLS) = start(PT_GNU_RELRO) = start(RW PT_LOAD). This
  simplifies binary manipulation tools.
  GNU strip before 2.31 discards PT_GNU_RELRO if its
  address is not equal to the start of its associated PT_LOAD.
  This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
  But with this change, we will be compatible with GNU strip before 2.31
* Before, .got.plt (non-relro by default) was placed before .got (relro
  by default), which made it impossible to have _GLOBAL_OFFSET_TABLE_
  (start of .got.plt on x86-64) equal to the end of .got (R_GOT*_FROM_END)
  (https://bugs.llvm.org/show_bug.cgi?id=36555). With the new ordering, we
  can improve on this regard if we'd like to.

Reviewers: ruiu, espindola, pcc

Subscribers: emaste, arichardson, llvm-commits, joerg, jdoerfert

Differential Revision: https://reviews.llvm.org/D56828

llvm-svn: 356117
2019-03-14 03:47:45 +00:00
Fangrui Song 3d87323a7e [ELF] Make non-writable non-executable PROGBITS sections closer to .text
This generalizes the old heuristic placing SHT_DYNSYM SHT_DYNSTR first in the readonly SHF_ALLOC segment.

Reviewers: espindola

Subscribers: emaste, arichardson, llvm-commits

Differential Revision: https://reviews.llvm.org/D48406

llvm-svn: 335674
2018-06-26 22:13:32 +00:00
Fangrui Song eb75b8f8f7 [ELF] Move `# REQUIRES:` line to the top
llvm-svn: 335625
2018-06-26 16:58:19 +00:00
Konstantin Zhuravlyov d70c367267 AMDGPU/LLD: Handle R_AMDGPU_REL64 relocation
Requires r334443 from llvm

Differential Revision: https://reviews.llvm.org/D47734

llvm-svn: 334444
2018-06-11 21:42:53 +00:00
Tony Tye 394e1dde6e Add base relative relocation record that can be used for the following case (OpenCL example):
static __global int Var = 0; 
__global int* Ptr[] = {&Var};
...

In this case Var is a non premptable symbol and so its address can be used as the value of Ptr, with a base relative relocation that will add the delta between the ELF address and the actual load address. Such relocations do not require a symbol.

This also fixes LLD which was incorrectly generating a PCREL64 for this case.

Differential Revision: https://reviews.llvm.org/D38910

llvm-svn: 315936
2017-10-16 20:46:53 +00:00
George Rimar d46753e421 [ELF] - Do --hash-style=both by default.
Its PR34712,

GNU linkers recently changed default values to "both" of "sysv".
Patch do the same for all targets except MIPS, where .gnu.hash
section is not yet supported.

Code suggested by Rui Ueyama.

Differential revision: https://reviews.llvm.org/D38407

llvm-svn: 315051
2017-10-06 09:37:44 +00:00
Peter Collingbourne 628ec9f193 ELF: Place relro sections after non-relro sections in r/w segment.
This is in preparation for my next change, which will introduce a relro
nobits section. That requires that relro sections appear at the end of the
progbits part of the r/w segment so that the relro nobits section can appear
contiguously.

Because of the amount of churn required in the test suite, I'm making this
change separately.

llvm-svn: 291523
2017-01-10 01:21:30 +00:00
Konstantin Zhuravlyov b625d17db8 [AMDGPU] Handle R_AMDGPU_ABS64 relocation
This is needed for the following case (OpenCL example):
  __global int Var = 0; 
  __global int* Ptr[] = {&Var}; 
  ...

Differential Revision: https://reviews.llvm.org/D25815

llvm-svn: 284764
2016-10-20 18:34:58 +00:00
Konstantin Zhuravlyov d4327e95dd [ELF/AMDGPU]: Add support for new relocations
Differential Revision: https://reviews.llvm.org/D25563

llvm-svn: 284197
2016-10-14 04:51:43 +00:00
Konstantin Zhuravlyov 667e245e38 ELF/AMDGPU: Add support for R_AMDGPU_ABS32
Differential Revision: https://reviews.llvm.org/D21654

llvm-svn: 276295
2016-07-21 15:30:13 +00:00
Tom Stellard 391e3a873e ELF/AMDGPU: Add support for GOT relocations
Reviewers: arsenm, rafael, tony-tye, kzhuravl, ruiu

Subscribers: llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21481

llvm-svn: 274514
2016-07-04 19:19:07 +00:00
Tom Stellard 1cfb9efdf7 ELF/AMDGPU: Add support for R_AMDGPU_REL32 relocations
Reviewers: rafael, ruiu

Subscribers: kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21294

llvm-svn: 273192
2016-06-20 19:48:29 +00:00