ed6e34fe41
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
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llvm-svn: 48995
2008-03-31 20:40:39 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
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Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
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that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
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e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
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llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
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the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
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- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
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llvm-svn: 43150
2007-10-18 21:29:24 +00:00
1ef9edce5f
Forgot these.
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llvm-svn: 42622
2007-10-05 01:33:45 +00:00
c1e4e3743b
Allow copyRegToReg to emit cross register classes copies.
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Tested with "make check"!
llvm-svn: 42346
2007-09-26 06:25:56 +00:00
383a324735
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
5662b21db1
eliminateFrameIndex() change.
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llvm-svn: 36626
2007-05-01 09:13:03 +00:00
61f39d186c
Added MRegisterInfo hook to re-materialize an instruction.
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llvm-svn: 35205
2007-03-20 08:09:38 +00:00
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
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llvm-svn: 34707
2007-02-28 00:21:17 +00:00
df5899258c
By default, spills kills the register being stored.
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llvm-svn: 34515
2007-02-23 01:10:04 +00:00
3796abea0f
Support to provide exception and selector registers.
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llvm-svn: 34482
2007-02-21 22:54:50 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
9865be6d40
Added getReservedRegs().
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llvm-svn: 34376
2007-02-17 11:06:00 +00:00
6730e12ae4
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
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llvm-svn: 33460
2007-01-23 09:38:11 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
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llvm-svn: 33455
2007-01-23 00:57:47 +00:00
74b46e8c05
Fix naming inconsistency.
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llvm-svn: 32823
2007-01-02 21:33:40 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
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llvm-svn: 32333
2006-12-07 22:21:48 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
dbd3d294e6
Matches MachineInstr changes.
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llvm-svn: 31712
2006-11-13 23:36:35 +00:00
af23f9b5f6
Completely eliminate def&use operands. Now a register operand is EITHER a
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def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
60f1eecd3a
Constify some methods. Patch provided by Anton Vayvod, thanks!
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llvm-svn: 29756
2006-08-17 22:00:08 +00:00
305c49579c
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
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llvm-svn: 28378
2006-05-18 00:12:58 +00:00
10d6341618
Move some methods out of MachineInstr into MachineOperand
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llvm-svn: 28102
2006-05-04 17:52:23 +00:00
fef7a2d0f5
There shalt be only one "immediate" operand type!
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llvm-svn: 28099
2006-05-04 17:21:20 +00:00
2d7298c362
Foundation for call frame information.
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llvm-svn: 27491
2006-04-07 16:34:46 +00:00
d1aa1638c6
Expose base register for DwarfWriter. Refactor code accordingly.
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llvm-svn: 27225
2006-03-28 13:48:33 +00:00
fa53b276d0
Translate llvm target registers to dwarf register numbers properly.
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llvm-svn: 27180
2006-03-27 20:18:45 +00:00
3c43609f1f
Add support to locate local variables in frames (early version.)
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llvm-svn: 26994
2006-03-23 18:12:57 +00:00
c090ac13bd
some hoovering
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llvm-svn: 25643
2006-01-26 09:08:31 +00:00
5ea06a9f13
add bundling! well not really, for now it's just stop-insertion.
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llvm-svn: 25593
2006-01-25 02:23:38 +00:00
cc87402925
fix register corruption! (my god.) r15 is a scratch reg, using that as
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a frame pointer is a pretty doofus thing to do. use r5 instead, and
mark it callee-saved, coz that's what it is!
llvm-svn: 25526
2006-01-23 06:08:46 +00:00
266ff6056a
use proper (82-bit) spills/fills when spilling FP regs, so that
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divides don't get broken. this fixes obsequi, smg2000, and probably
a bunch of other stuff (tm)
llvm-svn: 25385
2006-01-17 02:04:52 +00:00
529169cab2
remove dead stuff
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llvm-svn: 24054
2005-10-28 04:58:24 +00:00
e68a807025
Eliminate getClass, it is not needed
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llvm-svn: 24053
2005-10-28 04:57:11 +00:00
64ca7cda3f
these methods get extra args
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llvm-svn: 23538
2005-09-30 01:30:55 +00:00
f391f286d7
This code has always been dead on itanium
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llvm-svn: 22916
2005-08-19 18:34:37 +00:00
e73e76dc42
Convert tabs to spaces
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llvm-svn: 21452
2005-04-22 17:54:37 +00:00
89b8c8d215
Remove trailing whitespace
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llvm-svn: 21424
2005-04-21 23:13:11 +00:00
fb43ef78c5
assorted fixes:
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* clean up immediates (we use 14, 22 and 64 bit immediates now. sane.)
* fold r0/f0/f1 registers into comparisons against 0/0.0/1.0
* fix nasty thinko - didn't use two-address form of conditional add
for extending bools to integers, so occasionally there would be
garbage in the result. it's amazing how often zeros are just
sitting around in registers ;) - this should fix a bunch of tests.
llvm-svn: 21221
2005-04-11 05:55:56 +00:00
Evan Cheng