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20309 Commits

Author SHA1 Message Date
Chris Lattner 7f718e61e8 silence a bogus warning 
llvm-svn: 23595
 2005-10-02 16:30:51 +00:00
Chris Lattner 9982da2703 silence some warnings 
llvm-svn: 23594
 2005-10-02 16:29:36 +00:00
Chris Lattner c0e655b65d silence a warning 
llvm-svn: 23593
 2005-10-02 16:27:59 +00:00
Chris Lattner 68303a78ff add patterns for float binops and fma ops 
llvm-svn: 23592
 2005-10-02 07:46:28 +00:00
Chris Lattner 98da1d9910 Sort the cpu and features table, so that the alpha backend doesn't fail EVERY 
compile with an assertion that the tables are not sorted!

llvm-svn: 23591
 2005-10-02 07:13:52 +00:00
Chris Lattner 704d97f8b2 Add assertions to the trivial scheduler to check that the value types match 
up between defs and uses.

llvm-svn: 23590
 2005-10-02 07:10:55 +00:00
Chris Lattner 3734d204b8 another solution to the fsel issue. Instead of having 4 variants, just force 
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.

llvm-svn: 23589
 2005-10-02 07:07:49 +00:00
Chris Lattner 9e98672962 fsel can take a different FP type for the comparison and for the result. As such 
split the FSEL family into 4 things instead of just two.

llvm-svn: 23588
 2005-10-02 06:58:23 +00:00
Chris Lattner a17e6c486c fix an f32/f64 type mismatch 
llvm-svn: 23587
 2005-10-02 06:37:13 +00:00
Chris Lattner a038d901fb Codegen CopyFromReg using the regclass that matches the valuetype of the 
destination vreg.

llvm-svn: 23586
 2005-10-02 06:34:16 +00:00
Chris Lattner 4155ae0f74 Adjust to change in ctor 
llvm-svn: 23585
 2005-10-02 06:23:51 +00:00
Chris Lattner d4ff3c1324 Emit the value type for each register class. 
llvm-svn: 23584
 2005-10-02 06:23:37 +00:00
Chris Lattner 0bc697eae7 Expose the actual valuetype of each register class 
llvm-svn: 23583
 2005-10-02 06:23:19 +00:00
Chris Lattner 5ab9d42bb4 Minor tweak to the branch selector. When emitting a two-way branch, and if 
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

llvm-svn: 23582
 2005-10-01 23:06:26 +00:00
Chris Lattner 6f4dc51d6f like the comment says, enable this 
llvm-svn: 23581
 2005-10-01 23:02:40 +00:00
Chris Lattner 5a7bfe0b72 Add some very paranoid checking for operand/result reg class matchup 
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

llvm-svn: 23580
 2005-10-01 07:45:09 +00:00
Jeff Cohen f8a5e5ae6e Fix VC++ warnings. 
llvm-svn: 23579
 2005-10-01 03:57:14 +00:00
Chris Lattner 8713ebf37c fix typo 
llvm-svn: 23578
 2005-10-01 02:51:36 +00:00
Chris Lattner d3eee1a09b Modify the ppc backend to use two register classes for FP: F8RC and F4RC. 
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577
 2005-10-01 01:35:02 +00:00
Chris Lattner afdc9d25db Annotate nodes with their addresses if a graph requests it. 
This is Jim's feature implemented so that graphs could 'opt-in' and get
this behavior.  This is currently used by selection dags.

llvm-svn: 23576
 2005-10-01 00:19:21 +00:00
Chris Lattner fda6944c5b add a method 
llvm-svn: 23575
 2005-10-01 00:17:07 +00:00
Jim Laskey d3850457a1 typo 
llvm-svn: 23574
 2005-10-01 00:08:23 +00:00
Jim Laskey 9d96932879 1. Simplify the gathering of node groups. 
2. Printing node groups when displaying nodes.

llvm-svn: 23573
 2005-10-01 00:03:07 +00:00
Jim Laskey f61232354f Should be using flag and not chain. 
llvm-svn: 23572
 2005-09-30 23:43:37 +00:00
Nate Begeman fbfad0b565 Remove some now-dead code. 
llvm-svn: 23571
 2005-09-30 21:28:27 +00:00
Andrew Lenharth 5b8bd94ab2 more specific tests of subtarget stuff 
llvm-svn: 23570
 2005-09-30 20:30:24 +00:00
Andrew Lenharth 49e48f6234 subtarget support for CIX and FIX extentions (the only 2 I care about right now) 
llvm-svn: 23569
 2005-09-30 20:24:38 +00:00
Jim Laskey 90b34c1865 Reverting change moving to selection dag graph. 
llvm-svn: 23568
 2005-09-30 19:33:41 +00:00
Jim Laskey 3059965a4b Added allnodes_size for scheduling support. 
llvm-svn: 23567
 2005-09-30 19:27:01 +00:00
Jim Laskey 3fe3841c2a 1. Made things node-centric (from operand). 
2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

llvm-svn: 23566
 2005-09-30 19:15:27 +00:00
Jim Laskey fe59ae2b11 Add the node name (thus the address) to node label. 
llvm-svn: 23565
 2005-09-30 19:11:53 +00:00
Chris Lattner c9f4219cfc Rename MRegisterDesc -> TargetRegisterDesc for consistency 
llvm-svn: 23564
 2005-09-30 17:49:27 +00:00
Chris Lattner 57b8ae71e0 Update the discussion of TargetRegisterDesc 
llvm-svn: 23563
 2005-09-30 17:46:55 +00:00
Chris Lattner 3e020bb619 remove some more initializers 
llvm-svn: 23562
 2005-09-30 17:41:05 +00:00
Chris Lattner 81f32a2acb trim down the target info structs now that we have a preferred spill register class for each callee save register 
Why is V9 maintaining these tables manually? ugh!

llvm-svn: 23561
 2005-09-30 17:38:36 +00:00
Chris Lattner ddc69bbbba trim down the target info structs now that we have a preferred spill register class for each callee save register 
llvm-svn: 23560
 2005-09-30 17:35:22 +00:00
Chris Lattner 2e794c9198 now that we have a reg class to spill with, get this info from the regclass 
llvm-svn: 23559
 2005-09-30 17:19:22 +00:00
Chris Lattner 88025e17c5 constant fold these calls 
llvm-svn: 23558
 2005-09-30 17:16:59 +00:00
Chris Lattner bb1c9ecb17 simplify this code using the new regclass info passed in 
llvm-svn: 23557
 2005-09-30 17:12:38 +00:00
Chris Lattner 51878189c5 Now that we have getCalleeSaveRegClasses() info, use it to pass the register 
class into the spill/reload methods.  Targets can now rely on that argument.

llvm-svn: 23556
 2005-09-30 16:59:07 +00:00
Chris Lattner fbc60722b9 expose a new virtual method 
llvm-svn: 23555
 2005-09-30 07:06:37 +00:00
Chris Lattner 8688b92b86 stub out a virtual method 
llvm-svn: 23554
 2005-09-30 06:55:18 +00:00
Chris Lattner da6fcc9f49 Compute a preferred spill register class for each callee-save register 
llvm-svn: 23553
 2005-09-30 06:44:45 +00:00
Chris Lattner 4984e99b83 CR registers are not used by this "target" 
llvm-svn: 23552
 2005-09-30 06:43:58 +00:00
Chris Lattner 6169a78f46 these registers don't belong to any register classes, so don't mark them 
as callee save.  They can never be generated by the compiler.

llvm-svn: 23551
 2005-09-30 06:42:24 +00:00
Chris Lattner 26f5fb1277 Fix a warning 
llvm-svn: 23550
 2005-09-30 06:09:50 +00:00
Chris Lattner 1916ef75cf Regenerate 
llvm-svn: 23549
 2005-09-30 04:53:25 +00:00
Chris Lattner b509577605 Refactor this a bit to move ParsingTemplateArgs to only apply to classes, 
not defs.

Implement support for forward definitions of classes.  This implements
TableGen/ForwardRef.td.

llvm-svn: 23548
 2005-09-30 04:53:04 +00:00
Chris Lattner 41815f2aa2 Add a test that you can forward ref a class. 
llvm-svn: 23547
 2005-09-30 04:52:43 +00:00
Chris Lattner 20b0e3cee4 Regenerate 
llvm-svn: 23546
 2005-09-30 04:42:56 +00:00