af81575b68
Unbreak VC++ build.
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llvm-svn: 36560
2007-04-29 14:22:14 +00:00
50b2d2c6e3
Unbreak build.
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llvm-svn: 36559
2007-04-29 14:21:44 +00:00
8a00ba1c69
Updated aliases test
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llvm-svn: 36558
2007-04-29 10:34:42 +00:00
ca0ea543f5
Implement support to read an arbitrary bitcode file. Next up, dumping the
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file symbolically and actually computing statistics.
llvm-svn: 36557
2007-04-29 08:31:14 +00:00
0399758b5f
very early support for analyzing a bitstream. This opens the file, starts
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reading the stream, and detects whether it is LLVM IR or not.
llvm-svn: 36556
2007-04-29 08:12:22 +00:00
fc4d7cd1ff
make this file self-contained
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llvm-svn: 36555
2007-04-29 08:05:07 +00:00
6694f60bec
Switch the bitcode reader interface to take a MemoryBuffer instead of knowing
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anything about disk I/O itself. This greatly simplifies its interface -
eliminating the need for the ReaderWrappers.cpp file.
This adds a new option to llvm-dis (-bitcode) which instructs it to read
the input file as bitcode. Until/unless the bytecode reader is taught to
read from MemoryBuffer, there is no way to handle stdin reading without it.
I don't plan to switch the bytecode reader over, I'd rather delete it :),
so the option will stay around temporarily.
llvm-svn: 36554
2007-04-29 07:54:31 +00:00
ee2d1f1ed2
Add a new memorybuffer class, to unify all the file reading code in the system
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llvm-svn: 36553
2007-04-29 06:58:52 +00:00
084982501a
new method for creating a path, which does not create a temporary string.
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llvm-svn: 36552
2007-04-29 06:16:32 +00:00
cc18989c14
fit in 80 cols
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llvm-svn: 36551
2007-04-29 05:51:00 +00:00
f0a1ebae4b
Fix this to use the right block ID
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llvm-svn: 36550
2007-04-29 05:49:09 +00:00
87351e2a52
moved Writer.cpp -> BitcodeWriter.cpp to make it more unique in the tree.
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llvm-svn: 36549
2007-04-29 05:31:57 +00:00
222a8a4311
Minor corrections.
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llvm-svn: 36548
2007-04-29 01:07:00 +00:00
401d8db381
memory operands that have a direct operand should have their stores created
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before the copies into physregs are done. This avoids having flag operands
skip the store, causing cycles in the dag at sched time. This fixes infinite
loops on these tests:
test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll for PR1308
test/CodeGen/PowerPC/2007-01-29-lbrx-asm.ll
test/CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll for PR828
llvm-svn: 36547
2007-04-28 21:12:06 +00:00
de339fa55d
eliminate more redundant constraint type analysis
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llvm-svn: 36546
2007-04-28 21:03:16 +00:00
b2e55562ed
merge constraint type analysis stuff together.
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llvm-svn: 36545
2007-04-28 21:01:43 +00:00
d7e3b6c442
Significant refactoring of the inline asm stuff, to support future changes.
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No functionality change.
llvm-svn: 36544
2007-04-28 20:49:53 +00:00
25d797b7ca
Regenerate.
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llvm-svn: 36543
2007-04-28 16:07:31 +00:00
7851765b0a
Revert the premature portion of the last commit.
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llvm-svn: 36542
2007-04-28 16:06:50 +00:00
daf358bbff
This is not "FIXME" anymore
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llvm-svn: 36541
2007-04-28 14:57:59 +00:00
7b2a2f9075
Let Verifier check aliasees
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llvm-svn: 36540
2007-04-28 14:35:41 +00:00
b19636e4af
Fix a compilation error (jump to case label).
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llvm-svn: 36539
2007-04-28 14:13:42 +00:00
511d54f61b
Regenerate
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llvm-svn: 36538
2007-04-28 13:48:45 +00:00
b18f8f85e9
Implement review feedback. Aliasees can be either GlobalValue's or
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bitcasts of them.
llvm-svn: 36537
2007-04-28 13:45:00 +00:00
1deacd61f4
memory inputs to an inline asm are required to have an address available.
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If the operand is not already an indirect operand, spill it to a constant
pool entry or a stack slot.
This fixes PR1356 and CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
llvm-svn: 36536
2007-04-28 06:42:38 +00:00
5f59451529
new testcase for PR1356
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llvm-svn: 36535
2007-04-28 06:41:13 +00:00
d102ed0ac6
Fix CodeGen/Generic/2007-04-27-LargeMemObject.ll and
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CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
llvm-svn: 36534
2007-04-28 06:08:13 +00:00
7141c393b6
ensure the operand prints.
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llvm-svn: 36533
2007-04-28 06:07:55 +00:00
61553c1340
new testcase
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llvm-svn: 36532
2007-04-28 06:05:59 +00:00
193d2f09f0
update syntax
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llvm-svn: 36531
2007-04-28 06:03:12 +00:00
e53e2eeecb
not fully implemented yet.
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llvm-svn: 36530
2007-04-28 06:02:13 +00:00
f40a0a8b9f
add a default parameter
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llvm-svn: 36529
2007-04-28 05:42:38 +00:00
19651c77b2
add a way to make this less brittle
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llvm-svn: 36528
2007-04-28 05:38:52 +00:00
089e35cc57
fix a bug triggered by 403.gcc
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llvm-svn: 36527
2007-04-28 05:27:36 +00:00
73b3b80815
update for new inline asm syntax
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llvm-svn: 36526
2007-04-28 05:20:26 +00:00
6e880871e9
Fix several latent bugs in EmitGEPOffset that didn't manifest with its
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previous clients. This fixes MallocBench/gs
llvm-svn: 36525
2007-04-28 04:52:43 +00:00
4df3e8093b
Fix this to match change to InlineAsm class.
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llvm-svn: 36524
2007-04-28 04:05:59 +00:00
c753800800
uhn zap cvs
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llvm-svn: 36523
2007-04-28 03:50:56 +00:00
c48e2c3100
represent indirect operands explicitly in inline asm strings.
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llvm-svn: 36522
2007-04-28 01:02:58 +00:00
acbf6a401d
Implement PR1345 and Transforms/InstCombine/bitcast-gep.ll
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llvm-svn: 36521
2007-04-28 00:57:34 +00:00
1df6c1c5b0
new testcase
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llvm-svn: 36520
2007-04-28 00:54:45 +00:00
7e7280b538
change per review
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llvm-svn: 36519
2007-04-28 00:36:37 +00:00
29c05756b5
Prevent Thumb code from generating ARM instructions
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llvm-svn: 36518
2007-04-27 22:17:18 +00:00
940b083a63
fix the test tls1.
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llvm-svn: 36517
2007-04-27 21:23:17 +00:00
04750a18be
add TLS tests.
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llvm-svn: 36516
2007-04-27 21:08:48 +00:00
2705829925
add a GEP helper function
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llvm-svn: 36515
2007-04-27 20:35:56 +00:00
99cb63029a
add parenthesis.
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llvm-svn: 36514
2007-04-27 20:10:08 +00:00
559c546453
Doh. ARM::LEApcrel is a single instruction MI.
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llvm-svn: 36513
2007-04-27 18:27:13 +00:00
62f65468bc
In Thumb mode, the frame register must be R7.
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llvm-svn: 36512
2007-04-27 17:58:03 +00:00
1db224db92
refactor some code relating to pointer cast xforms, pulling it out of the codepath
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for unrelated casts.
llvm-svn: 36511
2007-04-27 17:44:50 +00:00
Jeff Cohen