Commit Graph

327139 Commits

Author SHA1 Message Date
Jinsong Ji 6fce46a5f1 [docs][Bugpoint] Revert 5584ead50 a5aa3353
No sure why there are still warnings, revert while I investigate.

llvm-svn: 372161
2019-09-17 18:39:04 +00:00
Jinsong Ji 5584ead50e [docs][Bugpoint] Fix build break.
Bugpoint.rst:124: WARNING: Mismatch: both interpreted text role prefix
and reference suffix.

llvm-svn: 372160
2019-09-17 18:23:06 +00:00
Craig Topper c198ffd8c3 [X86] Use APInt::operator<<= and APInt::lshrInPlace. NFC
llvm-svn: 372159
2019-09-17 18:19:06 +00:00
Craig Topper b5ffbd0b14 [SimplifyDemandedBits] Use APInt::intersects to instead of ANDing and comparing to 0 separately. NFC
llvm-svn: 372158
2019-09-17 18:19:02 +00:00
Jinsong Ji a5aa335394 [docs][Bugpoint]Add notes about multiple crashes
Summary:
    When reducing case for a CodeGenCrash, bugpoint may generate a new
    reduced
    testcase that exposes/causes another crash or break something due to
    limitation.

    Bugpoint does not distiguish different crashes currently,
    so when this happens, bugpoint will go on reducing for the new crash,
    or just abort, we can't get the case reduced for the origial crash.

    An advice is added into usage doc to connect to recommend checking error
    message with scripts and `-compile-command`.

Reviewers: modocache, bogner, sebpop, reames, vsk, MatzeB

Reviewed By: vsk

Subscribers: mehdi_amini, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66832

llvm-svn: 372157
2019-09-17 18:10:09 +00:00
Craig Topper f9a89b6788 [X86] Simplify b2b KSHIFTL+KSHIFTR using demanded elts.
llvm-svn: 372155
2019-09-17 18:02:56 +00:00
Craig Topper f1ba94ade0 [X86] Call SimplifyDemandedVectorElts on KSHIFTL/KSHIFTR nodes during DAG combine.
llvm-svn: 372154
2019-09-17 18:02:52 +00:00
Craig Topper b50894b9c3 [X86] Simplify some code in LowerBUILD_VECTORvXi1. NFCI
The case were Immediate is 0 and HasConstElts is true should never
happen since that would mean the constant elts were all zero. But
we check for all zero build vector earlier. So just use HasConstElts
and blindly take Immediate without checking if its 0.

Move the code that bitcasts and extract the immediate into the
the HasConstElts case since the other code just creates an undef
with the right type. No casting needed.

llvm-svn: 372153
2019-09-17 18:02:46 +00:00
Erik Pilkington a1e29a3407 Use 'BOOL' instead of BOOL in diagnostic messages
Type names should be enclosed in single quotes.

llvm-svn: 372152
2019-09-17 18:02:45 +00:00
Stanislav Mekhanoshin 1fb584f7a2 [AMDGPU] Added MI bit IsDOT
NFC, needed for future commit.

Differential Revision: https://reviews.llvm.org/D67669

llvm-svn: 372151
2019-09-17 17:56:13 +00:00
GN Sync Bot 8c2d2f6ee3 gn build: Merge r372149
llvm-svn: 372150
2019-09-17 17:51:27 +00:00
Greg Clayton c6b156cbb8 GSYM: Add the llvm::gsym::Header header class with tests
This patch adds the llvm::gsym::Header class which appears at the start of a stand alone GSYM file, or in the first bytes of the GSYM data in a GSYM section within a file. Added encode and decode methods with full error handling and full tests.

Differential Revision: https://reviews.llvm.org/D67666

llvm-svn: 372149
2019-09-17 17:46:13 +00:00
Alexey Bataev 5801e62576 [OPENMP] Rework the test, NFC.
llvm-svn: 372148
2019-09-17 17:44:27 +00:00
Alexey Bataev bf5d429094 [OPENMP5.0]Introduce attribute for declare variant directive.
Added attribute for declare variant directive. It will allow to handle
declare variant directive at the codegen and will allow to add extra
checks.

llvm-svn: 372147
2019-09-17 17:36:49 +00:00
Simon Pilgrim c191c24314 [TableGen] CodeGenMapTable - Don't dereference a dyn_cast result. NFCI.
The static analyzer is warning about potential null dereferences of dyn_cast<> results - in these cases we can safely use cast<> directly as we know that these cases should all be the correct type, which is why its working atm and anyway cast<> will assert if they aren't.

llvm-svn: 372146
2019-09-17 17:32:15 +00:00
Simon Pilgrim a9a27d1ded [ARM][AsmParser] Don't dereference a dyn_cast result. NFCI.
The static analyzer is warning about potential null dereferences of dyn_cast<> results - in these cases we can safely use cast<> directly as we know that these cases should all be the correct type, which is why its working atm and anyway cast<> will assert if they aren't.

llvm-svn: 372145
2019-09-17 17:26:14 +00:00
Simon Pilgrim 08a448fcbd Fix MSVC lambda capture warnings. NFCI.
llvm-svn: 372144
2019-09-17 17:24:55 +00:00
David Bolvansky 9a14ee81d2 Remove asan test for strncat(x, y, 0)
llvm-svn: 372143
2019-09-17 17:17:30 +00:00
David Bolvansky 0c0de794f1 Reland "[SLC] Preserve attrs for strncpy(x, "", y) -> memset(align 1 x, '\0', y)"
llvm-svn: 372142
2019-09-17 17:12:24 +00:00
David Bolvansky 5abd6f46ae [ASAN] Adjust asan tests due to new optimizations
llvm-svn: 372141
2019-09-17 17:07:31 +00:00
Nemanja Ivanovic 1461fb6e78 [PowerPC] Exploit single instruction load-and-splat for word and doubleword
We currently produce a load, followed by (possibly a move for integers and) a
splat as separate instructions. VSX has always had a splatting load for
doublewords, but as of Power9, we have it for words as well. This patch just
exploits these instructions.

Differential revision: https://reviews.llvm.org/D63624

llvm-svn: 372139
2019-09-17 16:45:20 +00:00
Alina Sbirlea 4e9082ef95 [MemorySSA] Fix phi insertion when inserting a def.
Summary:
When inserting a Def, the current algorithm is walking edges backward
and inserting new Phis where needed. There may be additional Phis needed
in the IDF of the newly inserted Def and Phis.
Adding Phis in the IDF of the Def was added ina  previous patch, but we
may also need other Phis in the IDF of the newly added Phis.

Reviewers: george.burgess.iv

Subscribers: Prazek, sanjoy.google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67637

llvm-svn: 372138
2019-09-17 16:33:35 +00:00
Alina Sbirlea 6b2d1346d8 [MemorySSA] Update MSSA for non-conventional AA.
Summary:
Regularly when moving an instruction that may not read or write memory,
the instruction is not modelled in MSSA, so not action is necessary.
For a non-conventional AA pipeline, MSSA needs to explicitly check when
creating accesses, so as to not model instructions that may not read and
write memory.

Reviewers: george.burgess.iv

Subscribers: Prazek, sanjoy.google, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67562

llvm-svn: 372137
2019-09-17 16:31:37 +00:00
Petr Hosek 39c5106eec Move DK_Misexpect for compatability with getNextAvailablePluginDiagnosticKind
First identified after D66324 landed.

Patch By: paulkirth
Differential Revision: https://reviews.llvm.org/D67648

llvm-svn: 372136
2019-09-17 16:27:36 +00:00
Greg Clayton b52650d57f GSYM: add encoding and decoding to FunctionInfo
This patch adds encoding and decoding of the FunctionInfo objects along with full error handling and tests. Full details of the FunctionInfo encoding format appear in the FunctionInfo.h header file.

Differential Revision: https://reviews.llvm.org/D67506

llvm-svn: 372135
2019-09-17 16:15:49 +00:00
David Green 91724b8530 [ARM] Add a SelectTAddrModeImm7 for MVE narrow loads and stores
We were previously using the SelectT2AddrModeImm7 for both normal and narrowing
MVE loads/stores. As the narrowing instructions do not accept sp as a register,
it makes little sense to optimise a FrameIndex into the load, only to have to
recover that later on. This adds a SelectTAddrModeImm7 which does not do that
folding, and uses it for narrowing load/store patterns.

Differential Revision: https://reviews.llvm.org/D67489

llvm-svn: 372134
2019-09-17 15:32:28 +00:00
David Green c42ca16cfa [ARM] Fixup pipeline test. NFC
llvm-svn: 372133
2019-09-17 15:25:24 +00:00
David Green 22a2209433 [ARM] Reserve an emergency spill slot for fp16 addressing modes that need it
Similar to D67327, but this time for the FP16 VLDR and VSTR instructions that
use the AddrMode5FP16 addressing mode. We need to reserve an emergency spill
slot for instructions that will be out of range to use sp directly.
AddrMode5FP16 is 8 bits with a scale of 2.

Differential Revision: https://reviews.llvm.org/D67483

llvm-svn: 372132
2019-09-17 15:23:09 +00:00
Alexey Bataev d0cc0a39be [OPENMP]Try to rework the test to pacify the buildbots, NFC.
llvm-svn: 372130
2019-09-17 15:11:52 +00:00
Yitzhak Mandelbaum 45b6ca5cd6 [clang-format] Fix cleanup of `AnnotatedLine` to include children nodes.
Summary:
AnnotatedLine has a tree structure, and things like the body of a lambda will be
a child of the lambda expression. For example,

    [&]() { foo(a); };

will have an AnnotatedLine with a child:

    [&]() {};
     '- foo(a);

Currently, when the `Cleaner` class analyzes the affected lines, it does not
cleanup the lines' children nodes, which results in missed cleanup
opportunities, like the lambda body in the example above.

This revision extends the algorithm to visit children, thereby fixing the above problem.

Patch by Eric Li.

Reviewers: krasimir

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67659

llvm-svn: 372129
2019-09-17 15:10:39 +00:00
Benjamin Kramer 957a6c6bed [clangd] Fix another TSAN issue
llvm-svn: 372128
2019-09-17 14:56:11 +00:00
Benjamin Kramer 167b302075 [RISCV] Unbreak the build
llvm-svn: 372127
2019-09-17 14:27:31 +00:00
Sam Parker 1d9ba08543 [ARM] Fix for buildbots
Remove setPreservesCFG from ARMConstantIslandPass and add a couple
of -verify-machine-dom-info instances into the existing codegen
tests.

llvm-svn: 372126
2019-09-17 14:21:36 +00:00
Krasimir Georgiev bdff164e0e Revert "[SLC] Preserve attrs for strncpy(x, "", y) -> memset(align 1 x, '\0', y)"
Summary:
This reverts commit r372101.

Causes ASAN build bot failures:

http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/14176
From http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/14176/steps/64-bit%20check-asan/logs/stdio:

```
[ RUN      ] AddressSanitizer.StrNCatOOBTest
/home/buildbots/ppc64be-sanitizer/sanitizer-ppc64be/build/llvm-project/compiler-rt/lib/asan/tests/asan_str_test.cpp:462: Failure
Death test: strncat(to - 1, from, 0)
    Result: failed to die.
```

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67658

llvm-svn: 372125
2019-09-17 14:15:23 +00:00
Erich Keane 68b0977e64 Add SpellingNotCalculated to Attribute Enums to suppress UBSan warnings
UBSan downstreams noticed that the assignment of SpellingNotCalculated
to the spellings caused warnings.

llvm-svn: 372124
2019-09-17 14:11:51 +00:00
Nico Weber 84a2f5e8b7 gn build: (manually) merge r372076
llvm-svn: 372123
2019-09-17 14:06:05 +00:00
George Rimar a3569aced0 [llvm-readobj/llvm-objdump] - Improve how tool locate the dynamic table and report warnings about that.
Before this patch we gave a priority to a dynamic table found
from the section header.

It was discussed (here: https://reviews.llvm.org/D67078?id=218356#inline-602082)
that probably preferring the table from PT_DYNAMIC is better,
because it is what runtime loader sees.

This patch makes the table from PT_DYNAMIC be chosen at first place if it is available.
But also it adds logic to fall back to SHT_DYNAMIC if the table from the dynamic segment is
broken or fall back to use no table if both are broken.

It adds a few more diagnostic warnings for the logic above.

Differential revision: https://reviews.llvm.org/D67547

llvm-svn: 372122
2019-09-17 13:58:46 +00:00
Sam Parker f1d069e54d [ARM] Fix for buildbots
Add --verifymachineinstrs and update the remaining low overhead loop
tests.

llvm-svn: 372121
2019-09-17 13:46:26 +00:00
Luis Marques 6cf896b284 [RISCV][NFC] Use NoRegister instead of 0 literal
Summary: Trivial cleanup.

Reviewers: asb, lenary

Reviewed By: lenary

Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67526

llvm-svn: 372120
2019-09-17 13:34:17 +00:00
Sven van Haastregt 47e95ff813 [OpenCL] Tidy up some comments; NFC
llvm-svn: 372119
2019-09-17 13:32:56 +00:00
Simon Pilgrim f12a3da5a7 [X86] X86DAGToDAGISel::tryFoldLoad - assert root/parent pointers are non-null. NFCI.
Silences a static analyzer warning.

llvm-svn: 372118
2019-09-17 13:27:02 +00:00
Simon Pilgrim c52a7093df InterleavedAccessInfo - Don't dereference a dyn_cast result. NFCI.
llvm-svn: 372117
2019-09-17 13:25:56 +00:00
Simon Pilgrim a2719f38c1 [LoopVectorize] Don't dereference a dyn_cast result. NFCI.
The static analyzer is warning about potential null dereferences of dyn_cast<> results, we can use cast<> directly as we know that these cases should all be CastInst, which is why its working atm and anyway cast<> will assert if they aren't.

llvm-svn: 372116
2019-09-17 13:24:54 +00:00
David Green 1ff9553057 [ARM] Fix for MVE load/store stack accesses
MVE loads and stores have a 7 bit immediate range, scaled by the length of the type. This needs to be taught to the stack estimation code to ensure that an emergency spill slot is reserved in case we run out of registers when materialising stack indices.

Also the narrowing loads/stores can be created with frame indices even though they do not accept SP as a register. We need in those cases to make sure we have an emergency register to use as the frame base, as SP can never be used.

Differential Revision: https://reviews.llvm.org/D67327

llvm-svn: 372114
2019-09-17 12:58:51 +00:00
Benjamin Kramer df4b9a3f4f Hide implementation details in namespaces.
llvm-svn: 372113
2019-09-17 12:56:29 +00:00
Krasimir Georgiev 88b4b9f973 lldb: move a test input to the test Inputs dir
Summary:
This makes the input file for a new test added in r372060 directly
available in the Inputs subdirectory of the test dir.

Differential Revision: https://reviews.llvm.org/D67655

llvm-svn: 372112
2019-09-17 12:23:03 +00:00
Sam Parker 36c922278e [ARM][LowOverheadLoops] Add LR def safety check
Converting the *LoopStart pseudo instructions into DLS/WLS results in
LR being defined. These instructions were inserted on the assumption
that LR would already contain the loop counter because a mov is
introduced during ISel as the the consumers in the loop can only use
LR. That assumption proved wrong!

So perform a safety check, finding an appropriate place to insert the
DLS/WLS instructions or revert if this isn't possible.

Differential Revision: https://reviews.llvm.org/D67539

llvm-svn: 372111
2019-09-17 12:19:32 +00:00
George Rimar 589293800a [llvm-readobj] - Test PPC64 relocations properly.
We had a precompiled binary committed and not all of the relocations
supported were tested. This patch fixes this.

Differential revision: https://reviews.llvm.org/D67617

llvm-svn: 372110
2019-09-17 12:05:39 +00:00
George Rimar 82d83733dd [obj2yaml] - Support PPC64 relocation types.
We do not support them and fail with llvm_unreachable currently.
This is not the only target we do not support and also seems we are missing
the tests for those we have already. But I needed this one for another patch,
so posted it separatelly.

Relocation names are taken from llvm\include\llvm\BinaryFormat\ELFRelocs\PowerPC64.def

Differential revision: https://reviews.llvm.org/D67615

llvm-svn: 372109
2019-09-17 12:00:55 +00:00
George Rimar cfc0ba3852 [yaml2obj/obj2yaml] - Allow setting an arbitrary values for e_machine.
Currently we only allow using a known named constants
for `Machine` field in YAML documents.

This patch allows using any numbers (valid or "unknown")
and adds test cases for current and new functionality.

With this it is possible to write a test cases for really unknown
EM_* targets.

Differential revision: https://reviews.llvm.org/D67652

llvm-svn: 372108
2019-09-17 11:51:26 +00:00