This is the final patch in the series of patches that improves
BUILD_VECTOR handling on PowerPC. This adds a few peephole optimizations
to remove redundant instructions. It also adds a large test case which
encompasses a large set of code patterns that build vectors - this test
case was the motivator for this series of patches.
Differential Revision: https://reviews.llvm.org/D26066
llvm-svn: 288800
a hilarious bug and fix it.
We somehow were never verifying the RefSCCs newly formed when
splitting an existing one apart, and when verifying them we weren't
really checking the SCC indices mapping effectively.
If we had been, it would have been blindingly obvious that right after
putting something int `RC.SCCs` we should update `RC.SCCIndices` instead
of `SCCIndices` which we were about to clear and rebuild anyways. =[
Anyways, this is thoroughly covered by existing tests now that we
actually verify things properly.
llvm-svn: 288795
Summary: This patch makes sure FirstCSPop and MBBI never point to DBG_VALUE instructions, which affected the code generated.
Reviewers: mkuper, aprantl, MatzeB
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27343
llvm-svn: 288794
It should already be handled but a typo in the LANGSTANDARD() definition
was introduced in r147220.
Patch by Alexander Richardson, test case by me.
Differential Revision:https://reviews.llvm.org/D27427
llvm-svn: 288793
Reverting because I didn't properly test this patch. Although it's probably
correct to add a stdbool_h module I thought the change fixed more than it did.
I'll re-commit after more investigation.
llvm-svn: 288789
As constructed before this patch, in case we run into case where we
don't actually build the XRay library, we really ought to not be adding
the unit test runs. This should fix the bootstrap build failures.
This is a follow-up further to D26232.
llvm-svn: 288788
The bootstrap buildbot complains about not being able to find the
unittests for XRay, when the conditionals to include or not include
tests and unit tests don't match.
This is a follow-up to D26232.
llvm-svn: 288786
Before this change we would add the unit tests potentially even if we
don't actually include the unit tests.
This is a follow-up on D26232.
llvm-svn: 288785
This pattern turned a vector sqrt/rcp/rsqrt operation of sse_load_f32/f64 into the the scalar instruction for the operation and put undef into the upper bits. For correctness, the resulting code should still perform the sqrt/rcp/rsqrt on the upper bits after the load is extended since that's what the operation asked for. Particularly in the case where the upper bits are 0, in that case we need calculate the sqrt/rcp/rsqrt of the zeroes and keep the result in the upper-bits. This implies we should be using the packed instruction still.
The only test case for this pattern is one I just added so there was no coverage of this.
llvm-svn: 288784
This occurs due to a pattern that uses sse_load_f32/f64 with vector sqrt/rcp/rsqrt operations and turns them into scalar instructions. Perhaps for the case were the upper bits come from undef this is ok. I believe a (vzmovl load64) would do the same thing but those seems to become vzload instead and selectScalarSSELoad doesn't handle that today. In that case we should be performing the vector operation on the zeros in the upper bits which is not equivalent to using a scalar instruction.
I will remove this pattern in a follow up patch. There appears to be no other test content for it.
llvm-svn: 288783
The intrinsics are supposed to pass the upper bits straight through to their output register. This means we need to make sure we still perform the 128-bit load to get those upper bits to pass to give to the instruction since the memory form of the instruction only reads 32 or 64 bits.
llvm-svn: 288781
The sqrtsd instruction only loads 64-bits and writes bits 63:0 with the sqrt result. Bits 127:64 are preserved in the destination register. The semantics of the intrinsic indicate bits 127:64 should come from the intrinsic argument which in this case is a 128-bit load. So the generated code should have a 128-bit load and use a register form of sqrtsd.
llvm-svn: 288780
The intrinsic takes one argument, the lower bits are affected by the operation and the upper bits should be passed through. The instruction itself takes two operands, the high bits of the first operand are passed through and the low bits of the second operand are modified by the operation. To match this to the intrinsic we should pass the single intrinsic input to both operands.
I had to remove the stack folding test for these instructions since they depended on the incorrect behavior. The same register is now used for both inputs so the load can't be folded.
llvm-svn: 288779
Before this, the change committed in D26232 might have an uninitialised
std::atomic<bool> that may or may not have a valid state. On aarch64
this breaks consistently, while it doesn't manifest as a problem in
x86_64.
This is an attempt to un-break this in aarch64.
llvm-svn: 288776
This implements a simple buffer queue to manage a pre-allocated queue of
fixed-sized buffers to hold XRay records. We need this to support
Flight Data Recorder (FDR) mode. We also implement this as a sub-library
first to allow for development before actually using it in an
implementation.
Some important properties of the buffer queue:
- Thread-safe enqueueing/dequeueing of fixed-size buffers.
- Pre-allocation of buffers at construction.
This is a re-roll of the previous attempt to submit, because it caused
failures in arm and aarch64.
Reviewers: majnemer, echristo, rSerge
Subscribers: tberghammer, danalbert, srhines, modocache, mehdi_amini, mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D26232
llvm-svn: 288775
This patch adds the starting support for encoding data from the MachO __DWARF segment. The first section supported is the __debug_str section because it is the simplest.
llvm-svn: 288774
Synthesized functions do not have valid locations,
and so we were not setting a debug location. Recent
changes to DI require that function call instructions
within a function having DI must have a location set.
We just set the debug location to line=0, col=0.
Reviewers: pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22905
llvm-svn: 288772
Summary:
This patch removes the scalar logical operation alias instructions. We can just use reg class copies and use the normal packed instructions instead. This removes the need for putting these instructions in the execution domain fixing tables as was done recently.
I removed the loadf64_128 and loadf32_128 patterns as DAG combine creates a narrower load for (extractelt (loadv4f32)) before we ever get to isel.
I plan to add similar patterns for AVX512DQ in a future commit to allow use of the larger register class when available.
Reviewers: spatel, delena, zvi, RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D27401
llvm-svn: 288771
It is kinda crazy to have llvm/include and llvm/lib/Target in the include path for every tablegen invocation for every tablegen-like tool.
This patch removes those flags from the tablgen function that is called everywhere by instead creating a variable LLVM_TABLEGEN_FLAGS which is setup in the LLVM source directories.
This removes TableGen.cmake's dependency on LLVM_MAIN_SRC_DIR, and LLVM_MAIN_INCLUDE_DIR.
llvm-svn: 288770
A recent commit (r286087) to the LLVM Go bindings that
changed things over to use the new attribute API broke
llgo. This commit updates llgo accordingly.
llvm-svn: 288769
Two recent commits to the LLVM Go bindings caused breaking changes
to llgo:
1. r284707 - Moving the `AlignInBits` field from `DIBasicType` to
`DIAutoVariable`.
2. r284482 - The `AlignInBits` fields going from `uint64` to `uint32`.
This commit updates llgo accordingly.
llvm-svn: 288768
Integers are expressed in the lattice via constant ranges. They can never be represented by constants or not-constants; those are reserved for non-integer types. This code has been dead for literaly years.
llvm-svn: 288767
This completes a small series of patches to hide the stateful updates of LVILatticeVal from the consuming code. The only remaining stateful API is mergeIn.
llvm-svn: 288765
This change seems to make LLD 0.6% faster when linking Clang with
debug info. I don't want us to have lots of local optimizations,
but this function is very hot, and the improvement is small but
not negligible, so I think it's worth doing.
llvm-svn: 288757
- Rename CheckMinZero to CheckMaxUnsignedZero to reflect its actual purpose.
- Remove unused parameters from CheckAbsoluteValueFunction and
CheckMaxUnsignedZero functions.
- Refactor the function name check so both functions can use the same one.
llvm-svn: 288756
Summary:
We recently introduced a feature that enforce at link-time that the
LLVM headers used by a clients are matching the ABI setting of the
LLVM library linked to.
However for clients that are using only headers from ADT and promise
they won't call into LLVM, this is forcing to link libSupport. This
new flag is intended to provide a way to configure LLVM with this
promise for such client.
Reviewers: bob.wilson, compnerd
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D27432
llvm-svn: 288754
test/std/containers/sequences/vector.bool/copy.pass.cpp
test/std/containers/sequences/vector.bool/copy_alloc.pass.cpp
test/std/containers/sequences/vector/vector.cons/copy.pass.cpp
test/std/containers/sequences/vector/vector.cons/copy_alloc.pass.cpp
Change "unsigned s = x.size();" to "typename C::size_type s = x.size();"
because that's what it returns.
test/std/strings/basic.string/string.cons/pointer_alloc.pass.cpp
Include <cstddef>, then change "unsigned n = T::length(s);"
to "std::size_t n = T::length(s);" because that's what char_traits returns.
test/std/strings/basic.string/string.cons/substr.pass.cpp
Change unsigned to typename S::size_type because that's what str.size() returns.
test/std/utilities/template.bitset/bitset.cons/ull_ctor.pass.cpp
This was needlessly truncating std::size_t to unsigned.
It's being used to compare and initialize std::size_t.
llvm-svn: 288753
Rafael Espindola