Commit Graph

4136 Commits

Author SHA1 Message Date
Vladimir Medic 0516a5b686 When disassembler meets compact jump instructions for r6 it crashes as the access to operands array is out of range. This patch removes dedicated decoder method that wrongly handles decoding of these instructions.
llvm-svn: 227084
2015-01-26 10:33:43 +00:00
NAKAMURA Takumi 2081cefdbe Revert llvm/test/MC/ELF/noexec.s in r227074, "Fix a problem where the AArch64 ELF assembler was failing with"
It should be split into target-specific location.

llvm-svn: 227080
2015-01-26 09:30:29 +00:00
Eric Christopher c8c76853b9 Fix a problem where the AArch64 ELF assembler was failing with
-no-exec-stack. This was due to it not deriving from the correct
asm info base class and missing the override for the exec
stack section query. Added another line to the noexec test
line to make sure this doesn't regress.

llvm-svn: 227074
2015-01-26 06:32:17 +00:00
Reid Kleckner f4ebbc6825 mips: Fix "XPASS" test results by removing 'not' commands
These tests are asserting and crashing for me, and 'not' sees that as a
non-zero exit code instead of a signal code for obscure Windows reasons.
This causes the test to pass, giving me an unclean 'ninja check'.

The test is already XFAILd, so just run the test without 'not' and let
lit handle the failure.

llvm-svn: 226958
2015-01-23 22:55:31 +00:00
Toma Tabacu c405c82214 [mips] Add new error message and improve testing for parsing the .module directive.
Summary:
We used to silently ignore any empty .module's and we used to give an error saying that we found
an "unexpected token at start of statement" when the value of the option wasn't an identifier (e.g. if it was a number).

We now give an error saying that we "expected .module option identifier" in both of those cases.

I also fixed the other tests in mips-abi-bad.s, which all seemed to be broken.


Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7095

llvm-svn: 226905
2015-01-23 10:40:19 +00:00
Craig Topper 0271d10d35 [x86] Change u8imm operands to always print as unsigned. This makes shuffle masks and the like make way more sense.
llvm-svn: 226902
2015-01-23 08:00:59 +00:00
Rafael Espindola 5fa925ebf6 Add STB_GNU_UNIQUE to the ELF writer.
This lets llvm-mc assemble files produced by gcc.

llvm-svn: 226895
2015-01-23 04:44:35 +00:00
Rafael Espindola 5a67ed1038 [pr21886] Change MCJIT/ELF to support MSVC C++ mangled symbol.
The ELF format is used on Windows by the MCJIT engine. Thus, on Windows, the
ELFObjectWriter can encounter symbols mangled using the MS Visual Studio C++
name mangling. Symbols mangled using the MSVC C++ name mangling can legally
have "@@@" as a substring. The EFLObjectWriter should not interpret the "@@@"
substring as specifying GNU-style symbol versioning. The ELFObjectWriter
therefore check for the MSVC C++ name mangling prefix which is either "?", "@?",
"imp_?" or "imp_?@".

llvm-svn: 226830
2015-01-22 14:20:45 +00:00
Saleem Abdulrasool 10ed0babd3 ARM: fail less catastrophically on invalid Windows input
Windows supports a restricted set of relocations (compared to ARM ELF).  In some
cases, we may end up generating an unsupported relocation.  This can occur with
bad input to the assembler in particular (the frontend should never generate
code that cannot be compiled).  Generate an error rather than just aborting.

The change in the API is driven by the desire to provide a slightly more helpful
message for debugging purposes.

llvm-svn: 226779
2015-01-22 04:03:32 +00:00
Jozef Kolek 5cfebdde2b [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226657
2015-01-21 12:39:30 +00:00
Jozef Kolek 2c6d73207e [mips][microMIPS] Implement ADDIUPC instruction
Differential Revision: http://reviews.llvm.org/D6582

llvm-svn: 226656
2015-01-21 12:10:11 +00:00
Vladimir Medic 435cf8a415 [Mips][Disassembler]When disassembler meets load/store from coprocessor 2 instructions for mips r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method that properly handles decoding of these instructions.
llvm-svn: 226652
2015-01-21 10:47:36 +00:00
Craig Topper 620b50cc23 [X86] Convert all the i8imm used by SSE and AVX instructions to u8imm.
This makes the assembler check their size and removes a hack from the disassembler to avoid sign extending the immediate.

llvm-svn: 226645
2015-01-21 08:15:54 +00:00
Craig Topper f38dea1cfa [x86] Add assembly parser bounds checking to the immediate value for cmpss/cmpsd/cmpps/cmppd.
llvm-svn: 226642
2015-01-21 06:07:53 +00:00
Jozef Kolek 0d49117769 Reverted revision 226577.
llvm-svn: 226595
2015-01-20 19:29:28 +00:00
Jozef Kolek 45f7f9c1ab [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B
Implement microMIPS 16-bit unconditional branch instruction B.

Implemented 16-bit microMIPS unconditional instruction has real name B16, and
B is an alias which expands to either B16 or BEQ according to the rules:
b 256 --> b16 256 # R_MICROMIPS_PC10_S1
b 12256 --> beq $zero, $zero, 12256 # R_MICROMIPS_PC16_S1
b label --> beq $zero, $zero, label # R_MICROMIPS_PC16_S1

Differential Revision: http://reviews.llvm.org/D3514

llvm-svn: 226577
2015-01-20 16:45:27 +00:00
Kai Nacke 63072f81b3 [mips] Add octeon branch instructions bbit0/bbit032/bbit1/bbit132
This commits adds the octeon branch instructions bbit0/bbit032/bbit1/bbit132.
It also includes patterns for instruction selection and test cases.

Reviewed by D. Sanders

llvm-svn: 226573
2015-01-20 16:10:51 +00:00
Rafael Espindola 2658554aec Add r224985 back with fixes.
The fixes are to note that AArch64 has additional restrictions on when local
relocations can be used. In particular, ld64 requires that relocations to
cstring/cfstrings use linker visible symbols.

Original message:

In an assembly expression like

bar:
  .long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

llvm-svn: 226503
2015-01-19 21:11:14 +00:00
Rafael Espindola c569ac46eb Produce errors when an assignment expression would use a common symbol.
An assignment will produce a symbol with a given section and offset. There is
no way to represent something like "1 byte after a common symbol".

This matches the behavior of GNU as.

Part of PR22217.

llvm-svn: 226470
2015-01-19 17:30:24 +00:00
Bradley Smith 3131e85edd [ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encoding rather than unpredictable
llvm-svn: 226469
2015-01-19 16:37:17 +00:00
Bradley Smith 30057b245e [ARM] Fixup sign extend instruction availability w.r.t. DSP extension
llvm-svn: 226468
2015-01-19 16:36:02 +00:00
Rafael Espindola 12ca34f53f Bring r226038 back.
No change in this commit, but clang was changed to also produce trivial comdats when
needed.

Original message:

Don't create new comdats in CodeGen.

This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

llvm-svn: 226467
2015-01-19 15:16:06 +00:00
Daniel Sanders 01dce6c931 [mips] 'CHECK :' is not a valid check directive. Fixed.
llvm-svn: 226409
2015-01-18 18:43:10 +00:00
Daniel Sanders 0cb9dc6e68 [mips] Make whitespace in disassembler tests more consistent. NFC.
The tests for the ISA's should now be approximately diffable. That is, the
output of 'diff valid-mips1.txt valid-mips2.txt' should be emit the lines
for instructions that were added/removed to/from MIPS-I by MIPS-II. This
doesn't work perfectly at the moment due to ordering differences but it
should be close.

llvm-svn: 226408
2015-01-18 18:38:36 +00:00
Daniel Sanders 46ad7cbfce [mips] Make whitespace of disassembler tests more consistent by removing blank lines. NFC.
llvm-svn: 226407
2015-01-18 18:21:19 +00:00
Timur Iskhodzhanov 60b721363c Revert r226242 - Revert Revert Don't create new comdats in CodeGen
This breaks AddressSanitizer (ninja check-asan) on Windows

llvm-svn: 226251
2015-01-16 08:38:45 +00:00
Rafael Espindola 67a79e72f5 Revert "Revert Don't create new comdats in CodeGen"
This reverts commit r226173, adding r226038 back.

No change in this commit, but clang was changed to also produce trivial comdats for
costructors, destructors and vtables when needed.

Original message:

Don't create new comdats in CodeGen.

This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

llvm-svn: 226242
2015-01-16 02:22:55 +00:00
Colin LeMahieu cd9c4e3e07 [Hexagon] Adding new-value store and bit reverse instructions.
llvm-svn: 226224
2015-01-15 23:10:29 +00:00
Colin LeMahieu 538b85810c [Hexagon] Removing old versions of vsplice, valign, cl0, ct0 and updating references to new versions.
llvm-svn: 226194
2015-01-15 19:28:32 +00:00
Colin LeMahieu 504157f1ae [Hexagon] Adding vmux instruction. Removing old transfer instructions and updating references.
llvm-svn: 226184
2015-01-15 18:16:00 +00:00
Joerg Sonnenberger b6956e113a Support @PLT loads on 32bit x86.
llvm-svn: 226182
2015-01-15 17:59:02 +00:00
Timur Iskhodzhanov f5adf13fac Revert Don't create new comdats in CodeGen
It breaks AddressSanitizer on Windows.

llvm-svn: 226173
2015-01-15 16:14:34 +00:00
Vladimir Medic df3ed1c9d6 Add disassembler tests for mips64r6 platform. There are no functional changes.
llvm-svn: 226166
2015-01-15 14:18:12 +00:00
Vladimir Medic d6d486ddcc Add disassembler tests for mips32r6 platform. There are no functional changes.
llvm-svn: 226165
2015-01-15 14:11:38 +00:00
Vladimir Medic 5dcf17b881 Add disassembler tests for mips64r2 platform. There are no functional changes.
llvm-svn: 226164
2015-01-15 14:06:34 +00:00
Vladimir Medic e993dac523 Add disassembler tests for mips64 platform. There are no functional changes.
llvm-svn: 226151
2015-01-15 08:50:20 +00:00
Hal Finkel 64202167c5 [PowerPC] Add assembler support for mcrfs and friends
Fill out our support for the floating-point status and control register
instructions (mcrfs and friends). As it turns out, these are necessary for
compiling src/test/harness_fp.h in TBB for PowerPC.

Thanks to Raf Schietekat for reporting the issue!

llvm-svn: 226070
2015-01-15 01:00:53 +00:00
Duncan P. N. Exon Smith 9885469922 IR: Move MDLocation into place
This commit moves `MDLocation`, finishing off PR21433.  There's an
accompanying clang commit for frontend testcases.  I'll attach the
testcase upgrade script I used to PR21433 to help out-of-tree
frontends/backends.

This changes the schema for `DebugLoc` and `DILocation` from:

    !{i32 3, i32 7, !7, !8}

to:

    !MDLocation(line: 3, column: 7, scope: !7, inlinedAt: !8)

Note that empty fields (line/column: 0 and inlinedAt: null) don't get
printed by the assembly writer.

llvm-svn: 226048
2015-01-14 22:27:36 +00:00
Rafael Espindola fad1639a12 Don't create new comdats in CodeGen.
This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

llvm-svn: 226038
2015-01-14 20:55:48 +00:00
Rafael Espindola a371989f66 Add a test that would have found the issue with r225644.
llvm-svn: 226035
2015-01-14 20:24:46 +00:00
Rafael Espindola 7244bb3c17 Revert "Add r224985 back with two fixes."
This reverts commit r225644 while I debug a regression.

llvm-svn: 226022
2015-01-14 19:07:23 +00:00
Vladimir Medic 1080666e80 Add disassembler tests for mips32r2 platform. There are no functional changes.
llvm-svn: 225980
2015-01-14 11:35:22 +00:00
Jyoti Allur 5a1391410d Correct POP handling for v7m
llvm-svn: 225972
2015-01-14 10:48:16 +00:00
Vladimir Medic 62dfce3240 Add disassembler tests for mips32r2 platform. There are no functional changes.
llvm-svn: 225967
2015-01-14 10:18:56 +00:00
Saleem Abdulrasool ca24b1d638 X86: validate 'int' instruction
The int instruction takes as an operand an 8-bit immediate value.  Validate that
the input is valid rather than silently truncating the value.

llvm-svn: 225941
2015-01-14 05:10:21 +00:00
Rafael Espindola d9c3e308f5 Add r224985 back with two fixes.
One is that AArch64 has additional restrictions on when local relocations can
be used. We have to take those into consideration when deciding to put a L
symbol in the symbol table or not.

The other is that ld64 requires the relocations to cstring to use linker
visible symbols on AArch64.

Thanks to Michael Zolotukhin for testing this!

Remove doesSectionRequireSymbols.

In an assembly expression like

bar:
.long L0 + 1

the intended semantics is that bar will contain a pointer one byte past L0.

In sections that are merged by content (strings, 4 byte constants, etc), a
single position in the section doesn't give the linker enough information.
For example, it would not be able to tell a relocation must point to the
end of a string, since that would look just like the start of the next.

The solution used in ELF to use relocation with symbols if there is a non-zero
addend.

In MachO before this patch we would just keep all symbols in some sections.

This would miss some cases (only cstrings on x86_64 were implemented) and was
inefficient since most relocations have an addend of 0 and can be represented
without the symbol.

This patch implements the non-zero addend logic for MachO too.

llvm-svn: 225644
2015-01-12 18:13:07 +00:00
Jozef Kolek 9761e96b01 [mips][microMIPS] Implement BEQZ16 and BNEZ16 instructions
Differential Revision: http://reviews.llvm.org/D5271

llvm-svn: 225627
2015-01-12 12:03:34 +00:00
Saleem Abdulrasool fe781977b9 ARM: add support for segment base relocations (SBREL)
This adds support for parsing and emitting the SBREL relocation variant for the
ARM target.  Handling this relocation variant is necessary for supporting the
full ARM ELF specification.  Addresses PR22128.

llvm-svn: 225595
2015-01-11 04:39:18 +00:00
Saleem Abdulrasool c552218e28 tests: fix previous commit
The previous commit accidentally missed changes to the test output checking,
resulting in an errant failure.

llvm-svn: 225577
2015-01-10 02:53:25 +00:00
Saleem Abdulrasool 48bbb6c821 test: merge ARM relocations test
There is a fair number of relocations that are part of the AAELF specification.
Simply merge the tests into a single test file, otherwise, we will end up with
far too many test files to test each relocation type.  NFC.

llvm-svn: 225576
2015-01-10 02:48:29 +00:00