b21ec54e61
Add #include
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llvm-svn: 11285
2004-02-10 21:18:55 +00:00
1cb6d2697d
Stop using this method
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llvm-svn: 11282
2004-02-10 21:12:06 +00:00
8d0dc12c3e
Remove uses of MachineOperand::isVirtualRegister
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llvm-svn: 11281
2004-02-10 20:55:47 +00:00
2d5feb5e04
Remvoe use of MO.isVirtualRegister(), turn an assertion into an assert()
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llvm-svn: 11280
2004-02-10 20:47:24 +00:00
2aea68ccfd
Remove use of isPhysicalRegister
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llvm-svn: 11277
2004-02-10 20:35:42 +00:00
92252f42c3
Don't use MachineOperator::is(Phys|Virt)Register
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llvm-svn: 11276
2004-02-10 20:31:28 +00:00
259e98ed27
Tighten up checks
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llvm-svn: 11274
2004-02-10 20:25:13 +00:00
ff04d76c57
Fix PR228: [sparc] Boolean constants are emitted as true and false
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I will observe that the concept of using WriteAsOperand is completely broken,
but then we all knew that, didn't we?
llvm-svn: 11255
2004-02-10 05:16:44 +00:00
7f7a842bd6
Doxygenify comments.
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llvm-svn: 11252
2004-02-09 23:18:42 +00:00
4dc5478fbc
Fix PR#226: When emitting padding, always emit it as bytes. Bytes can be
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placed into any alignment situation.
llvm-svn: 11247
2004-02-09 22:15:33 +00:00
ac6db755c3
Adjust to the changed StructType interface. In particular, getElementTypes() is gone.
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llvm-svn: 11228
2004-02-09 04:37:31 +00:00
56f9b190e1
Add a new (hidden) option that is useful for profiling.
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llvm-svn: 11218
2004-02-09 01:47:10 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
94b5c3cb91
Take away the default iostream argument of createMachineFunctionPrinterPass(),
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at Chris's request.
llvm-svn: 11120
2004-02-04 21:41:01 +00:00
dbf4b42fde
IMULri* instructions do not require their first two registers operands
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to be the same (IOW they are not two address instructions).
llvm-svn: 11117
2004-02-04 17:21:04 +00:00
d1b1992495
Generate ftst instructions for comparison against zero
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llvm-svn: 11098
2004-02-03 18:54:04 +00:00
3c8c72c54f
Add the ftst instruction
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llvm-svn: 11095
2004-02-03 07:27:50 +00:00
8161306139
Add support for one argument OneArgFP instructions
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llvm-svn: 11094
2004-02-03 07:27:34 +00:00
63b61e8739
No need to declare implicit uses/defs of ST0
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llvm-svn: 11081
2004-02-02 19:57:45 +00:00
30d26ac561
Generate the fchs instruction to negate a floating point number
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llvm-svn: 11078
2004-02-02 19:31:38 +00:00
7af8ad6444
Add support for OneArgFPRW instructions, fix a couple of typeos
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llvm-svn: 11077
2004-02-02 19:23:15 +00:00
ac2ced8554
Include PowerPC.h. Flesh out the stub versions of addPassesToEmitAssembly()
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and addPassesToJITCompile() slightly.
llvm-svn: 11076
2004-02-02 19:06:36 +00:00
2458bd6507
Add comments describing how you would add prototypes for factory methods for
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PowerPC-specific passes here.
llvm-svn: 11073
2004-02-02 19:05:28 +00:00
298fdd7eb1
Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg.
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llvm-svn: 11070
2004-02-02 18:56:30 +00:00
aeb8a80c71
FpMOV is also a move instruction.
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llvm-svn: 11055
2004-02-01 08:22:16 +00:00
112902772a
Add some comments sketching out how this is to work eventually.
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llvm-svn: 11026
2004-01-30 22:25:18 +00:00
201c487ad2
Add a new flag, which is only used for symmetry.
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llvm-svn: 11025
2004-01-30 22:24:18 +00:00
4710add9dd
Add (currently disabled) support to the instruction selector to only insert
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FP_REG_KILL instructions at the end of blocks involved with critical edges.
Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches. Perhaps this will fix some linscan problems?
llvm-svn: 11019
2004-01-30 22:13:44 +00:00
f429a0e6dd
Add a new (static inline) std::ostream& << AllocInfo& method. Use it.
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llvm-svn: 11002
2004-01-28 19:05:43 +00:00
f0cc848602
Add the JITInfo object, accessor & initializer.
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llvm-svn: 10972
2004-01-23 06:39:30 +00:00
4880432af8
Add CodeEmitter and JITInfo stubs. Dump the old
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PowerPCTargetMachine::addPassesToJITCompile() method, in favor of the
TargetJITInfo interface.
llvm-svn: 10971
2004-01-23 06:35:43 +00:00
c38abbd571
Build the PowerPC directory, so it is less likely to bit-rot (again)
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llvm-svn: 10938
2004-01-21 21:16:10 +00:00
b14a3f73cd
Import of skeletal PowerPC backend I have had laying around for months...
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llvm-svn: 10937
2004-01-21 21:13:19 +00:00
929d1d1ca1
Use the LLVM standard name mangling infrastructure instead of reinventing the
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wheel.
llvm-svn: 10891
2004-01-15 22:44:19 +00:00
16d4009a1b
Include TargetRegInfo.h and declare SparcTargetMachine forward, to make this
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header more easily includable.
llvm-svn: 10880
2004-01-15 18:17:07 +00:00
361c004b88
Make this assertion more self-explanatory.
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llvm-svn: 10879
2004-01-15 18:15:58 +00:00
93cd755c05
Eliminate the isStringCompatible function, using ConstantArray::isString.
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It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away. This also fixes
compatibility with arrays of [us]byte that have constantexprs in them.
Also slightly restructure some code to be cleaner.
llvm-svn: 10854
2004-01-14 17:15:17 +00:00
ac2b198ec5
Eliminate the isStringCompatible function, using ConstantArray::isString.
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It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.
llvm-svn: 10853
2004-01-14 17:14:42 +00:00
66f33ff6c2
Finegrainify namespacification
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Using the SlotCalculator is total overkill for this file, a simple map
will suffice. Why doesn't this use the NameMangler interface?
llvm-svn: 10823
2004-01-13 21:27:59 +00:00
dbd9c33e5e
Remove dump-input option.
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Make addPassesToEmitAssembly() look slightly more like addPassesToJITCompile().
llvm-svn: 10818
2004-01-13 19:26:21 +00:00
fe2aafe08a
Eliminate use of ConstantHandling itf
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llvm-svn: 10782
2004-01-12 18:08:18 +00:00
975c8bde79
Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a
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register so that LiveVariable analysis is not confused.
llvm-svn: 10773
2004-01-12 07:22:45 +00:00
4ee36320f4
Move sparc-specific livevar code into lib/Target/Sparc
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llvm-svn: 10733
2004-01-09 18:15:24 +00:00
bb6fa4b327
Fix more incestuous #includage.
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llvm-svn: 10732
2004-01-09 16:17:09 +00:00
3d874aebc2
Move InstrSelection into lib/Target/Sparc, as it's sparc specific. This
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makes the incestuous #include'ing of sparc internal headers much less
disturbing. :)
llvm-svn: 10729
2004-01-09 06:22:34 +00:00
b9c7999881
Move lib/Codegen/RegAlloc into lib/Target/Sparc, as it is sparc specific
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llvm-svn: 10728
2004-01-09 06:17:12 +00:00
5d236005b0
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
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implementation from the TargetMachine directly.
llvm-svn: 10636
2003-12-28 21:23:38 +00:00
52564b2071
Add TargetInstrInfo::isMoveInstr() to support coalescing in register
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allocation.
llvm-svn: 10633
2003-12-28 17:35:08 +00:00
10cac58d23
Whoops, don't try to lower non intrinsic calls
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llvm-svn: 10632
2003-12-28 09:53:23 +00:00
c45a033b42
implement support for the intrinsic lowering functionality
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llvm-svn: 10629
2003-12-28 09:47:19 +00:00
Chris Lattner