Dan Gohman
0f731017dd
Fix another isFirstClassType that now needs to be isSingleValueType.
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This fixes recent CBE regressions.
llvm-svn: 51483
2008-05-23 16:57:00 +00:00
Chris Lattner
3546c2b4e4
we compile multiply-by-constant into horrible code. Doesn't sse4 have some
...
instruction for doing this?
llvm-svn: 51473
2008-05-23 04:29:53 +00:00
Evan Cheng
f3be7a7ea7
Bug: rcpps can only folds a load if the address is 16-byte aligned. Fixed many 'ps' load folding patterns in X86InstrSSE.td which are missing the proper alignment checks.
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Also fixed some 80 col. violations.
llvm-svn: 51462
2008-05-23 00:37:07 +00:00
Dale Johannesen
6b4dcc1c14
Put const weak stuff in appropriate section on Darwin.
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g++.dg/abi/key2.C
llvm-svn: 51458
2008-05-23 00:16:59 +00:00
Evan Cheng
97b020e61e
X86CodeEmitter should not set PIC style to None at initialization time. This will break codegen if relocation model is changed to PIC_ later.
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llvm-svn: 51455
2008-05-22 23:55:24 +00:00
Evan Cheng
53963b775e
Add missing patterns.
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llvm-svn: 51435
2008-05-22 18:56:56 +00:00
Chris Lattner
3d1797ccaa
fix an off-by-one error in my previous patch, don't treat the callee as a incoming arg.
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llvm-svn: 51422
2008-05-22 06:29:38 +00:00
Chris Lattner
79be90c3c7
Add support for multiple-return values in inline asm. This should
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get inline asm working as well as it did previously with the CBE
with the new MRV support for inline asm.
llvm-svn: 51420
2008-05-22 06:19:37 +00:00
Evan Cheng
f945f94397
movsd and movq do not require 16-byte alignment. This fixes vec_set-5.ll on Linux.
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llvm-svn: 51327
2008-05-20 18:24:47 +00:00
Evan Cheng
974722b16f
runOnMachineFunction should set IsPIC because relocation model may have been changed.
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llvm-svn: 51291
2008-05-20 01:56:59 +00:00
Dale Johannesen
5bf742f2aa
Handle quoted names when constructing $stub's,
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$non_lazy_ptr's and $lazy_ptr's.
llvm-svn: 51277
2008-05-19 21:38:18 +00:00
Chris Lattner
1bafa6c886
trip count computation deficiency
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llvm-svn: 51222
2008-05-17 15:37:38 +00:00
Dale Johannesen
2e1d5e487b
Record weak external linkage in a case where we were
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missing it. gcc.dg/darwin-weakimport-2.c.
Handle common and weak differently for darwin ppc32.
llvm-svn: 51201
2008-05-16 20:09:25 +00:00
Gabor Greif
e1f6e4b21d
API change for {BinaryOperator|CmpInst|CastInst}::create*() --> Create. Legacy interfaces will be in place for some time. (Merge from use-diet branch.)
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llvm-svn: 51200
2008-05-16 19:29:10 +00:00
Dale Johannesen
876dd3ca9e
Treat common as distinct from weak global on Darwin x86.
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llvm-svn: 51172
2008-05-16 00:52:06 +00:00
Evan Cheng
29e59ad6c9
Fix typos and comments.
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llvm-svn: 51165
2008-05-15 22:13:02 +00:00
Evan Cheng
ef377adca0
Make use of vector load and store operations to implement memcpy, memmove, and memset. Currently only X86 target is taking advantage of these.
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llvm-svn: 51140
2008-05-15 08:39:06 +00:00
Evan Cheng
ad2b7a7b97
Silence warnings.
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llvm-svn: 51129
2008-05-14 20:33:21 +00:00
Dale Johannesen
ce4396bc92
Add CommonLinkage; currently tentative definitions
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are represented as "weak", but there are subtle differences
in some cases on Darwin, so we need both. The intent
is that "common" will behave identically to "weak" unless
somebody changes their target to do something else.
No functional change as yet.
llvm-svn: 51118
2008-05-14 20:12:51 +00:00
Sanjiv Gupta
7fc6027873
Detabification. Fixed indentation and spacing.
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Changed cout to DOUT, and TODOs to FIXMEs.
Other changes as per coding conventions.
llvm-svn: 51105
2008-05-14 11:31:39 +00:00
Nicolas Geoffray
fbdca96469
Fix typo in ParameterAttribute fields usage. Add an include
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to make the Cpp backend output compilable.
llvm-svn: 51095
2008-05-14 07:52:03 +00:00
Sanjiv Gupta
1f8c9ef4cc
Fixed the file description header at the top to remove the developer name.
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llvm-svn: 51094
2008-05-14 06:50:01 +00:00
Evan Cheng
6f34ed0d36
Doh. Alignment is in bytes, not in bits.
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llvm-svn: 51092
2008-05-14 02:49:43 +00:00
Dan Gohman
eabd647cd5
Change target-specific classes to use more precise static types.
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This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.
llvm-svn: 51091
2008-05-14 01:58:56 +00:00
Chris Lattner
03ce206143
add a note
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llvm-svn: 51062
2008-05-13 19:56:20 +00:00
Evan Cheng
f8ab712fa9
- Fix the pasto in the fix for a previous pasto.
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- Incorporate Chris' comment suggestion.
llvm-svn: 51061
2008-05-13 18:59:59 +00:00
Chris Lattner
d17f58ae6e
add a note
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llvm-svn: 51060
2008-05-13 18:48:54 +00:00
Nate Begeman
6645714f16
Fix one more encoding bug.
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llvm-svn: 51057
2008-05-13 17:52:09 +00:00
Evan Cheng
595e226085
- Don't treat anyext 16-bit load as a 32-bit load if it's volatile.
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- Correct a pasto.
llvm-svn: 51054
2008-05-13 16:45:56 +00:00
Sanjiv Gupta
4394c2376c
Adding files for Microchip's PIC16 target.
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A brief description about PIC16:
===============================
PIC16 is an 8-bit microcontroller with only one 8-bit register which is the
accumulator. All arithmetic/load/store operations are 8-bit only.
The architecture has two address spaces: program and data. The program memory
is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory.
It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register).
Two classes of registers exist: (8-bit class which is only one
accumulator) (16-bit class, which contains one or more 16 bit
pointer(s))
llvm-svn: 51027
2008-05-13 09:02:57 +00:00
Evan Cheng
1120279ae6
Instead of a vector load, shuffle and then extract an element. Load the element from address with an offset.
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pshufd $1, (%rdi), %xmm0
movd %xmm0, %eax
=>
movl 4(%rdi), %eax
llvm-svn: 51026
2008-05-13 08:35:03 +00:00
Nate Begeman
50f7ef30bb
Fix and encoding error in the psrad xmm, imm8 instruction.
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llvm-svn: 51020
2008-05-13 01:47:52 +00:00
Evan Cheng
3f40c69083
On x86, it's safe to treat i32 load anyext as a normal i32 load. Ditto for i8 anyext load to i16.
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llvm-svn: 51019
2008-05-13 00:54:02 +00:00
Dan Gohman
d78c400b5b
Clean up the use of static and anonymous namespaces. This turned up
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several things that were neither in an anonymous namespace nor static
but not intended to be global.
llvm-svn: 51017
2008-05-13 00:00:25 +00:00
Nate Begeman
b87e63a730
Teach Legalize how to scalarize VSETCC
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Teach X86 a few more vsetcc patterns. Custom lowering for unsupported ones is next.
llvm-svn: 51009
2008-05-12 23:09:43 +00:00
Evan Cheng
b980f6fb3d
Xform bitconvert(build_pair(load a, load b)) to a single load if the load locations are at the right offset from each other.
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llvm-svn: 51008
2008-05-12 23:04:07 +00:00
Bill Wendling
1e11768a4f
Constify the machine instruction passed into the
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"is{Trivially,Really}ReMaterializable" methods.
llvm-svn: 51001
2008-05-12 20:54:26 +00:00
Nate Begeman
d875c3e2fd
Initial X86 codegen support for VSETCC.
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llvm-svn: 51000
2008-05-12 20:34:32 +00:00
Dan Gohman
0863b19ae6
Fix a copy+paste bug; pseudo-instructions shouldn't have
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encoding information.
llvm-svn: 50997
2008-05-12 20:22:45 +00:00
Evan Cheng
2609d5e779
Refactor isConsecutiveLoad from X86 to TargetLowering so DAG combiner can make use of it.
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llvm-svn: 50991
2008-05-12 19:56:52 +00:00
Nate Begeman
cfcb56091b
Add support for vicmp/vfcmp codegen, more legalize support coming.
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This is necessary to unbreak the build.
llvm-svn: 50988
2008-05-12 19:40:03 +00:00
Dan Gohman
906716c40f
Fix a compile error on compilers that still want a return value
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in a non-void function that calls abort.
llvm-svn: 50969
2008-05-12 16:17:19 +00:00
Anton Korobeynikov
a38e72d247
Add note
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llvm-svn: 50959
2008-05-11 14:33:15 +00:00
Evan Cheng
71b9afb053
When transforming a vector_shuffle to a load, the base address must not be an undef.
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llvm-svn: 50940
2008-05-10 06:46:49 +00:00
Dan Gohman
3c0e11af64
For now, abort when an ISD::VAARG is encountered on x86-64, rather
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than silently generate invalid code.
llvm-gcc does not currently use VAArgInst; it lowers va_arg in the
front-end.
llvm-svn: 50930
2008-05-10 01:26:14 +00:00
Evan Cheng
da2587cedc
Some clean up.
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llvm-svn: 50929
2008-05-10 00:59:18 +00:00
Evan Cheng
bb48d55a88
If movl top bits are undef, let it be selected to movlps, etc.
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llvm-svn: 50928
2008-05-10 00:58:41 +00:00
Evan Cheng
867af2678f
Add a pattern to do move the low element of a v4f32 and zero extend the rest.
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llvm-svn: 50922
2008-05-09 23:37:55 +00:00
Evan Cheng
961339bbdb
Handle a few more cases of folding load i64 into xmm and zero top bits.
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Note, some of the code will be moved into target independent part of DAG combiner in a subsequent patch.
llvm-svn: 50918
2008-05-09 21:53:03 +00:00
Evan Cheng
0360ecbec1
Use movq to move low half of XMM register and zero-extend the rest.
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llvm-svn: 50874
2008-05-08 22:35:02 +00:00