67a636c587
More bulletproofing of llvm.dbg.declare.
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llvm-svn: 27224
2006-03-28 13:45:20 +00:00
457e54efc1
Added missing paren on behalf of Ramana Radhakrishnan.
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llvm-svn: 27223
2006-03-28 10:17:11 +00:00
21e5476deb
Missed X86::isUNPCKHMask
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llvm-svn: 27222
2006-03-28 08:27:15 +00:00
be2d9a0e99
movlps and movlpd should be modeled as two address code.
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llvm-svn: 27221
2006-03-28 07:01:28 +00:00
dc57ae0711
Update
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llvm-svn: 27220
2006-03-28 06:55:45 +00:00
4e7374ff8a
Typo
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llvm-svn: 27219
2006-03-28 06:53:49 +00:00
1a194a5264
* Prefer using operation of matching types. e.g unpcklpd rather than movlhps.
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* Bug fixes.
llvm-svn: 27218
2006-03-28 06:50:32 +00:00
af8c373e77
Fix a couple typos
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llvm-svn: 27216
2006-03-28 04:18:18 +00:00
1b3928765d
Add a few more altivec intrinsics
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llvm-svn: 27215
2006-03-28 04:15:58 +00:00
08b473c619
Added a couple of entries about movhps and movlhps.
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llvm-svn: 27212
2006-03-28 02:49:12 +00:00
3765fadef6
All unpack cases are now being handled.
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llvm-svn: 27211
2006-03-28 02:44:05 +00:00
2bc3280659
- Clean up / consoladate various shuffle masks.
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- Some misc. bug fixes.
- Use MOVHPDrm to load from m64 to upper half of a XMM register.
llvm-svn: 27210
2006-03-28 02:43:26 +00:00
3710fca2b8
implement a bunch more intrinsics.
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llvm-svn: 27209
2006-03-28 02:29:37 +00:00
cb5ec07cc3
Use normal lvx for scalar_to_vector instead of lve*x. They do the exact
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same thing and we have a dag node for the former.
llvm-svn: 27205
2006-03-28 01:43:22 +00:00
8374e9c4eb
More bulletproofing of DebugInfoDesc verify.
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llvm-svn: 27203
2006-03-28 01:30:18 +00:00
e55d171ccd
Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value. Split them into separate enums.
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llvm-svn: 27201
2006-03-28 00:40:33 +00:00
5df75889db
Model unpack lower and interleave as vector_shuffle so we can lower the
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intrinsics as such.
llvm-svn: 27200
2006-03-28 00:39:58 +00:00
d7e612bbc4
If adding a link to a collapsed, node, ignore offset.
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Fixes 2006-03-27-LinkedCollapsed.ll
llvm-svn: 27194
2006-03-27 23:39:58 +00:00
d387cc5cde
Reactivate llvm.dbg.declare.
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llvm-svn: 27192
2006-03-27 23:31:10 +00:00
5bb1d90afd
Disable dbg_declare, it currently breaks the CFE build
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llvm-svn: 27182
2006-03-27 21:36:03 +00:00
d5f94c9574
Fix legalization of intrinsics with chain and result values
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llvm-svn: 27181
2006-03-27 20:28:29 +00:00
fa53b276d0
Translate llvm target registers to dwarf register numbers properly.
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llvm-svn: 27180
2006-03-27 20:18:45 +00:00
018e17c8de
unbreak the build
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llvm-svn: 27174
2006-03-27 16:52:45 +00:00
0e84f1e532
Unbreak the build on non-apple compilers :-(
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llvm-svn: 27173
2006-03-27 16:10:59 +00:00
d09b05b0bc
Try again
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llvm-svn: 27171
2006-03-27 08:10:26 +00:00
939c9ab88f
Add a bunch of notes from my journey thus far.
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llvm-svn: 27170
2006-03-27 07:41:00 +00:00
64efb35c32
Incorrect check for FP all one's
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llvm-svn: 27169
2006-03-27 07:26:17 +00:00
22ec3e7b7e
Split out altivec notes into their own README
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llvm-svn: 27168
2006-03-27 07:04:16 +00:00
9b9cc4fb39
Use pcmpeq to generate vector of all ones.
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llvm-svn: 27167
2006-03-27 07:00:16 +00:00
a74792fa9d
Changed isBuildVectorAllOnesInteger to isBuildVectorAllOnes.
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llvm-svn: 27166
2006-03-27 06:59:32 +00:00
c70e33cd6e
Change isBuildVectorAllOnesInteger to isBuildVectorAllOnes. Also check for
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floating point cases.
llvm-svn: 27165
2006-03-27 06:58:47 +00:00
52fcad3a37
Instead of printing "INTRINSIC" on intrinsic node, print the intrinsic name.
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llvm-svn: 27164
2006-03-27 06:45:25 +00:00
42e0ba09aa
teach the inliner to work with packed constants
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llvm-svn: 27161
2006-03-27 05:50:18 +00:00
1738c293b5
Fix the JIT encoding of VSEL
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llvm-svn: 27160
2006-03-27 03:34:17 +00:00
df59d5314c
Fix the JIT encoding of VSPLTI*
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llvm-svn: 27159
2006-03-27 03:28:57 +00:00
6e792f9ff8
Pass llvm/test/Regression/CodeGen/Generic/debug-info.ll.
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llvm-svn: 27158
2006-03-27 01:51:47 +00:00
ed728c1291
SelectionDAGISel can now natively handle Switch instructions, in the same
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manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks. The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.
This functionality is currently only enabled on x86, but should be safe for
every target. In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.
llvm-svn: 27156
2006-03-27 01:32:24 +00:00
7092888bcc
Bullet proof against undefined args produced by upgrading ols-style debug info.
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llvm-svn: 27155
2006-03-26 22:46:27 +00:00
84c2f0a705
How to be dumb on $5/day. Need a tri-state to track valid debug descriptors.
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llvm-svn: 27154
2006-03-26 22:45:20 +00:00
65473e20d8
add vsel
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llvm-svn: 27153
2006-03-26 22:38:43 +00:00
68cc9d4540
Readme note
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llvm-svn: 27152
2006-03-26 19:19:27 +00:00
6961fc76bb
Codegen vector predicate compares.
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llvm-svn: 27151
2006-03-26 10:06:40 +00:00
ed6184aef2
Remove X86:isZeroVector, use ISD::isBuildVectorAllZeros instead; some fixes / cleanups
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llvm-svn: 27150
2006-03-26 09:53:12 +00:00
b1ddc988af
Remove PPC:isZeroVector, use ISD::isBuildVectorAllZeros instead
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llvm-svn: 27149
2006-03-26 09:52:32 +00:00
5562f2092f
Add immAllZerosV helper
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llvm-svn: 27148
2006-03-26 09:51:39 +00:00
a67899195f
Add ISD::isBuildVectorAllZeros predicate
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llvm-svn: 27147
2006-03-26 09:50:58 +00:00
30ee72586d
Allow targets to custom lower their own intrinsics if desired.
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llvm-svn: 27146
2006-03-26 09:12:51 +00:00
563c7022a5
Update dependencies to reflect split of the Intrinsics.td file
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llvm-svn: 27144
2006-03-26 07:45:48 +00:00
793cbcb4fd
Add all of the altivec comparison instructions. Add patterns for the
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non-predicate altivec compare intrinsics.
llvm-svn: 27143
2006-03-26 04:57:17 +00:00
c6c88b2ea1
Add and 8/16-bit adds, add all integer subtracts, add saturating subtract
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intrinsics.
llvm-svn: 27142
2006-03-26 02:39:02 +00:00
Jim Laskey