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Author SHA1 Message Date
Evan Cheng cb78e5558b Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE. 
llvm-svn: 103833
 2010-05-14 22:54:52 +00:00
Dan Gohman 88fb253562 Fast ISel trivially coalesces away no-op casts, so check for this when 
setting kill flags.

llvm-svn: 103832
 2010-05-14 22:53:18 +00:00
Jakob Stoklund Olesen 089e9421d2 Don't bother spilling before a return 
llvm-svn: 103831
 2010-05-14 22:40:43 +00:00
Jakob Stoklund Olesen cdef6bc8de RegAllocLocal can count copies too 
llvm-svn: 103830
 2010-05-14 22:40:40 +00:00
Bill Wendling 0160e55893 SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 
replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829
 2010-05-14 22:17:42 +00:00
Jakob Stoklund Olesen b16013936b Track allocatable instead of reserved regs, and never take an unallocatable hint. 
llvm-svn: 103828
 2010-05-14 22:02:56 +00:00
Dan Gohman 2f277c866d Don't set kill flags for instructions which the scheduler has cloned. 
llvm-svn: 103827
 2010-05-14 22:01:14 +00:00
Dan Gohman 062a97f0f6 BR is a barrier. 
llvm-svn: 103826
 2010-05-14 22:00:27 +00:00
Bill Wendling 1713d95874 Several tail call tests apparently rely upon this being "adjusts stack" instead 
of "has calls". That's probably wrong, but it needs further
investigation. Revert to the original behavior until this is settled.

llvm-svn: 103824
 2010-05-14 21:58:35 +00:00
Jakob Stoklund Olesen e68b814c8c Avoid scanning the long tail of physreg operands on calls 
llvm-svn: 103823
 2010-05-14 21:55:52 +00:00
Devang Patel 36debf8046 Do not forget to mark prcessed arguments. 
llvm-svn: 103822
 2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen 6c038e33e9 Count coalesced copies 
llvm-svn: 103821
 2010-05-14 21:55:50 +00:00
Jakob Stoklund Olesen 33af4fcdea Allow virtreg redefines when verifying for RegAllocFast 
llvm-svn: 103820
 2010-05-14 21:55:44 +00:00
Bill Wendling e9ac7ad68c This should happen if there are no calls, not if it just doesn't adjust the 
stack.

llvm-svn: 103813
 2010-05-14 21:38:44 +00:00
Bill Wendling db4bc54c4f Revert r103804. The comment is correct. 
llvm-svn: 103808
 2010-05-14 21:28:24 +00:00
Jim Grosbach 866b74ba8b Remove trailing whitespace 
llvm-svn: 103807
 2010-05-14 21:20:46 +00:00
Jim Grosbach d772bdeb7e 80 column and trailing whitespace cleanup 
llvm-svn: 103806
 2010-05-14 21:19:48 +00:00
Jim Grosbach 25749ad5c2 add cmd line option to leave dbgvalues in during post-RA sceduling. Useful 
while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805
 2010-05-14 21:18:04 +00:00
Bill Wendling 7bf4bae5dc Fix comment. 
llvm-svn: 103804
 2010-05-14 21:17:29 +00:00
Bill Wendling 95f6ebcb37 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what 
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
 2010-05-14 21:14:32 +00:00
Dan Gohman 35dd005d22 Lowering of atomic instructions can result in operands being 
used more than once. If ISel had put a kill flag on one of them,
it's not valid to transfer the kill flag to each new instance.

llvm-svn: 103799
 2010-05-14 21:01:44 +00:00
Devang Patel e0a94bfe9f Add support to preserve type info for the variables that are removed by the optimizer. 
llvm-svn: 103798
 2010-05-14 21:01:35 +00:00
Jakob Stoklund Olesen 670492c8ee When verifying two-address instructions, check the following: 
- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797
 2010-05-14 20:28:32 +00:00
Kevin Enderby 7bc111f5a9 Fix so "int3" is correctly accepted, added "into" and fixed "int" with an 
argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791
 2010-05-14 19:16:02 +00:00
Evan Cheng cfa7d02d6e Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE. 
llvm-svn: 103790
 2010-05-14 18:54:59 +00:00
Daniel Dunbar 2493ddfe42 MC/Mach-O/x86_64: Darwin's special "signed_N" relocation types should only be 
used to replace a normal relocation, not a reference to a GOT entry.

llvm-svn: 103789
 2010-05-14 18:53:40 +00:00
Jakob Stoklund Olesen 4d5c1061e3 Simplify the handling of physreg defs and uses in RegAllocFast. 
This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784
 2010-05-14 18:03:25 +00:00
Dan Gohman 30e3db2ba3 Set isTerminator on TRAP instructions. 
llvm-svn: 103778
 2010-05-14 16:46:02 +00:00
Dan Gohman c56ca22616 Don't use isBarrier for the PowerPC sync instruction. isBarrier is for 
control barriers, not memory ordering barriers.

llvm-svn: 103777
 2010-05-14 16:42:16 +00:00
Dan Gohman 02d9947e60 Add mayLoad and mayStore flags to instructions which missed them. 
llvm-svn: 103776
 2010-05-14 16:34:55 +00:00
Daniel Dunbar 148e876ac2 XFAIL the test I added with vg_leak, apparently it is the first and only llc 
-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769
 2010-05-14 07:47:51 +00:00
Daniel Dunbar 3439ed6324 Inline Asm: Ensure buffer is newline terminated to match how the text is printed. 
- This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765
 2010-05-14 04:31:50 +00:00
Jakob Stoklund Olesen ceb5a7ada2 Enable opportunistic coalescing 
llvm-svn: 103764
 2010-05-14 04:30:51 +00:00
Evan Cheng cd67c21407 Added a QQQQ register file to model 4-consecutive Q registers. 
llvm-svn: 103760
 2010-05-14 02:13:41 +00:00
Eric Christopher 9fb6bb07ca Add AsmParser support for darwin tbss directive. 
Nothing uses this yet.

llvm-svn: 103757
 2010-05-14 01:50:28 +00:00
Eric Christopher bc81885ff7 Fix a couple of typos. 
llvm-svn: 103756
 2010-05-14 01:38:54 +00:00
Daniel Dunbar 4bce748aa2 MC: Switch to completely lazy layout. 
- The eliminates the last major algorithmic problem with MC.

llvm-svn: 103754
 2010-05-14 00:51:14 +00:00
Daniel Dunbar 9abade1017 MC: Extend MCAsmLayout to explicitly track which fragments have been layed out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order. 
llvm-svn: 103753
 2010-05-14 00:37:21 +00:00
Daniel Dunbar 3eedc26e18 MC: Implicitly assign section addresses when the previous fragment is layed out. 
llvm-svn: 103752
 2010-05-14 00:37:17 +00:00
Daniel Dunbar 8f9d2266e6 MC: Switch MCFragment to storing the layout order index, not its index in the file. 
llvm-svn: 103751
 2010-05-14 00:37:14 +00:00
Daniel Dunbar a99a23b061 MC: Change LayoutSection() to only do the section initializiation. 
Also, elimminate MCAsmLayout::set*, which are no longer needed.

llvm-svn: 103750
 2010-05-14 00:37:11 +00:00
Evan Cheng ca21cc8b13 Fix comments. 
llvm-svn: 103749
 2010-05-14 00:21:45 +00:00
Jakob Stoklund Olesen 68c235bd4d Trust kill flags from isel and later passes. 
llvm-svn: 103748
 2010-05-14 00:02:23 +00:00
Jakob Stoklund Olesen 41f8dc897e Fix an embarrassing runtime regression for RegAllocFast. 
This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747
 2010-05-14 00:02:20 +00:00
Evan Cheng 670a4104a9 Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 
llvm-svn: 103746
 2010-05-13 23:55:47 +00:00
Dale Johannesen 1ae94b9394 Implement a correct ui64->f32 conversion. The old 
one was subject to double rounding in extreme cases.

llvm-svn: 103744
 2010-05-13 23:50:42 +00:00
Jakob Stoklund Olesen d74a564feb Clean up RegAllocFast debug output 
llvm-svn: 103739
 2010-05-13 20:43:17 +00:00
Daniel Dunbar b9f6ac094a MC: Move Layout{Fragment,Section} into MCAsmLayout, and add LayoutFile(). 
llvm-svn: 103738
 2010-05-13 20:40:12 +00:00
Dan Gohman c90f51c00b Teach MachineLICM and MachineSink how to clear kill flags conservatively 
when they move instructions.

llvm-svn: 103737
 2010-05-13 20:34:42 +00:00
Evan Cheng 2ca1bd119e Add comment about the pseudo registers QQ, each of which is a pair of Q registers. 
llvm-svn: 103731
 2010-05-13 20:02:08 +00:00