This is simply to help clarity of the code. The functions are built as thumb
only if Thumb2 is available (__ARM_ARCH_ISA_THUMB == 2). Sink the selection
into the location of the definition and make DEFINE_COMPILERRT_THUMB_FUNCTION
always define a thumb function while DEFINE_COMPILERRT_FUNCTION always selects
the default.
Since the .thumb_func directive is always available (at least on Linux, Windows,
and BSD), sinking the macro right into the macro works just as well.
No functional change intended.
llvm-svn: 219182
The arm builtins converted into thumb in r213481 are not working
on darwin. On apple platforms, .thumb_func directive is required
to generated correct symbols for thumb functions.
<rdar://problem/18523605>
llvm-svn: 219040
The ldrexd and strexd instructions are undefined for the ARMv7M
architecture, so we cannot use them to implement the
__sync_fetch_and_*_8 builtins. There is no other way to implement
these without OS support, so this patch #ifdef's these functions out
for M-class architectures.
There are no tests as I cannot find any existing tests for these
builtins.
I used the __ARM_ARCH_PROFILE predefine because __ARM_FEATURE_LDREX is
deprecated and not set by clang.
llvm-svn: 218601
Add the missing AEABI functions that are part of the base platform ABI
specification. The provided implementation does the bare minimum to avoid
requiring libc headers. This permits the use of compiler-rt on bare-metal
environments which conform to EABI.
llvm-svn: 217322
When building the builtins for a modern CPU (idiv support), __umodsi3 was
completely incorrect as it would behave as __udivmosi3, which takes a tertiary
parameter which is a pointer.
__udivsi3 was also incorrect, returning the remainder in r1. Although this
would not result in any crash or invalid behaviour as r1 is a caller saved
register in AAPCS, this is unnecessary. Simply perform the division ignoring
the remainder.
llvm-svn: 215295
The LLVM IAS seems to accept wide instructions for add and sub in ARM mode even
though it is not permitted. This uses a macro to ensure that the wide modifier
is only applied when building in THUMB mode.
This repairs building with GCC/GAS in ARM mode.
llvm-svn: 214046
The macro definitions are shared across multiple files. Define them once in the
assembly.h header rather than redefining it in each file.
llvm-svn: 214045
Convert the CBNZ backward branch instruction to CMP and BNE
avoiding illegal backwards branch and making the assembly code
in synh-ops.h to be UAL compliant.
Patch by: Sumanth Gundapaneni
llvm-svn: 213685
For ARM cores that are ARMv6T2+ but not ARMv7ve or ARMv7-r and not an updated
ARMv7-a that has the idiv extension (chips with clz but not idiv), an incorrect
jump would be calculated due to the preference to thumb instructions over ARM.
Rather than computing the target at runtime, use a jumptable instead. This
trades a bit of storage for performance. The overhead is 32-bytes for each of
the three routines, but avoid the calculation of the offset.
Because clz was introduced in ARMv6T2 and idiv in certain versions of ARMv7,
the non-clz, non-idiv case implies a target which does not support Thumb-2, and
thus we cannot use Thumb on those targets (as it is unlikely that the assembly
will assemble).
Take the opportunity to refactor the IT block macros into assembly.h rather than
redefining them in the TUs where they are used.
Existing tests cover the full change already, so no new tests are added.
This effectively reverts SVN r213309.
llvm-svn: 213467
The udivmodsi4/modsi3/umodsi3 code computes jump targets based on ARM encodings
(if CLZ is present and IDIV is not present).
Reverts parts of r211032 and r211035.
llvm-svn: 213309
When possible, use Thumb or Thumb-2 over ARM instructions. This is particularly
important for pure-Thumb environments (e.g. Windows on ARM). Although, it is
possible to conditionalise this for that target specifically, this is available
on most newer ARM CPUs, and the code remains compatible with older CPUs with no
adverse effects. It therefore feels better to always prefer Thumb when
possible.
llvm-svn: 211032
Make the whitespace a bit more uniform in the various assembly routines. This
also makes the assembly files a bit more uniform on the ARM side by explicitly
stating that it is using the unified syntax and that the contents of the code is
in the text section (or segment). No functional change.
llvm-svn: 209985
The .align statements in ARM assembly routines is actually meant to be a power
of 2 alignment (e.g. .align 2 == 4 byte alignment, not 2). Switch to using
.p2align. .p2align is guaranteed to be a power-of-two alignment always and much
more explicit.
The .align in the case of x86_64 is byte alignment, use .balign instead of
.align.
llvm-svn: 208578
Since these are primarily useful for deeply embedded targets where code size is
very important, they are each in a separate file making use of infrastructure
in sync-ops.h. This allows a linker to include just the functions that are
actually used.
rdar://problem/14736665
llvm-svn: 202812
Saleem Abdulrasool