5bc0957f5b
the mid-level optimizer removes this stuff.
...
llvm-svn: 47108
2008-02-14 05:43:18 +00:00
b43983b274
this one is easy.
...
llvm-svn: 47107
2008-02-14 05:41:38 +00:00
3bd37f549a
This readme entry is done, testcase here: CodeGen/X86/zero-remat.ll
...
llvm-svn: 47106
2008-02-14 05:39:46 +00:00
9ca025f1dc
Assigning an APInt to 0 with plain assignment gives it a one-bit
...
size. Initialize these APInts to properly-sized zero values.
llvm-svn: 47099
2008-02-13 23:07:24 +00:00
e1d9ee66ed
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
...
to pass the mask APInt by value, not by reference.
llvm-svn: 47096
2008-02-13 22:28:48 +00:00
21ad494f67
Enable exception handling int JIT
...
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
d973e836f1
Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.
...
llvm-svn: 47067
2008-02-13 17:24:14 +00:00
f6518cf4ab
don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
...
DAGCombine is now quite good at zapifying them.
llvm-svn: 47053
2008-02-13 07:35:30 +00:00
eea32990a9
readme updates
...
llvm-svn: 47051
2008-02-13 07:06:12 +00:00
87abe955fc
Make register scavenging happy by not using a reg (CR0) that isn't defined
...
llvm-svn: 47045
2008-02-13 02:58:33 +00:00
244183ef0d
commuteInstr() can now commute non-ssa machine instrs.
...
llvm-svn: 47043
2008-02-13 02:46:49 +00:00
f990faf23b
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
...
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
llvm-svn: 47039
2008-02-13 00:35:47 +00:00
ffde4ff5b1
__DATA not __DATA__ is the right segment name on darwin.
...
Spotted by Nick Kledzik.
llvm-svn: 47037
2008-02-12 23:35:09 +00:00
bcc182f50d
Remove some dead code
...
llvm-svn: 47036
2008-02-12 22:54:40 +00:00
8ef50214f0
SSE4.1 64b integer insert/extract pattern support
...
Move formats into the formats file
llvm-svn: 47035
2008-02-12 22:51:28 +00:00
83af1197ca
Revert r46916 PPCTargetAsmInfo.cpp.
...
llvm-svn: 47020
2008-02-12 19:25:12 +00:00
8a25d6ac53
Only using x86-64 rip relative addressing in non-staic mode?
...
llvm-svn: 47019
2008-02-12 19:20:46 +00:00
352acec37e
Update comment.
...
llvm-svn: 47002
2008-02-12 07:59:55 +00:00
4d8c98b8f9
Unbreak various insert_vector_elt and extract_vector_elt tests in presence of SSE4.
...
llvm-svn: 47001
2008-02-12 07:59:45 +00:00
fd82c308e5
Stuff noticed while grepping code
...
llvm-svn: 46979
2008-02-11 23:47:56 +00:00
2d77e8e446
Enable SSE4 codegen and pattern matching.
...
Add some notes to the README.
llvm-svn: 46949
2008-02-11 04:19:36 +00:00
3090b0fbd1
additional missing feature
...
llvm-svn: 46948
2008-02-11 04:16:09 +00:00
3050f74a1d
xmm0 variable blends
...
llvm-svn: 46931
2008-02-10 18:47:57 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
52ea27db17
Match GCC's behaviour for these sections.
...
llvm-svn: 46916
2008-02-10 00:03:54 +00:00
727c7634c7
memopv16i8 had wrong alignment requirement, would have broken pabsb
...
pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes
llvm-svn: 46915
2008-02-09 23:46:37 +00:00
6715f755cc
Skeleton of insert and extract matching, more to come
...
llvm-svn: 46902
2008-02-09 01:38:08 +00:00
17bedbc500
Tablegen support for insert & extract element matching
...
llvm-svn: 46901
2008-02-09 01:37:05 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
...
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
36c2967d89
64-bit (MMX) vectors do not need restrictive alignment.
...
128-bit vectors need it only when SSE is on.
llvm-svn: 46890
2008-02-08 19:48:20 +00:00
7a55a94ba1
Avoid needlessly casting away const qualifiers.
...
llvm-svn: 46877
2008-02-08 03:29:40 +00:00
8d59dd119b
Added missing entries in X86 load / store folding tables.
...
llvm-svn: 46866
2008-02-08 00:12:56 +00:00
16d4bc3dc0
Follow Chris' suggestion; change the PseudoSourceValue accessors
...
to return pointers instead of references, since this is always what
is needed.
llvm-svn: 46857
2008-02-07 18:41:25 +00:00
63a8452e9c
Add SourceValue information for outgoing argument stores on x86.
...
llvm-svn: 46854
2008-02-07 16:28:05 +00:00
a20a773654
Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode.
...
Before:
_main:
subq $8, %rsp
leaq _X(%rip), %rax
movsd 8(%rax), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Now:
_main:
subq $8, %rsp
movsd _X+8(%rip), %xmm1
movss _X(%rip), %xmm0
call _t
xorl %ecx, %ecx
movl %ecx, %eax
addq $8, %rsp
ret
Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl %ecx, %ecx
movl %ecx, %eax
llvm-svn: 46850
2008-02-07 08:53:49 +00:00
1bc1cae318
In some cases, e.g. ADD32ri, no transformation is made. Guide against it.
...
llvm-svn: 46849
2008-02-07 08:29:53 +00:00
2d489b5081
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
0f32916111
Move to getCALLSEQ_END to ensure CALLSEQ_END node produces a flag. This is consistent with the definition in td file.
...
llvm-svn: 46775
2008-02-05 22:44:06 +00:00
d88f1d060e
Implement sseregparm.
...
llvm-svn: 46764
2008-02-05 20:46:33 +00:00
f3c89be368
Ident mnemonics appropriately
...
llvm-svn: 46746
2008-02-05 08:49:09 +00:00
2cb9068c78
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
...
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
5420516b3f
This method should be virtual
...
llvm-svn: 46723
2008-02-04 23:04:24 +00:00
ef14d5f926
Eliminate some redundant code.
...
llvm-svn: 46720
2008-02-04 21:44:06 +00:00
e146c0e3fd
The rest of the SSE4.1 intrinsic patterns that are obvious to me. Getting
...
Evan's help with the rest.
llvm-svn: 46697
2008-02-04 06:00:24 +00:00
ccdfd4aa17
Some more SSE 4.1 intrinsic patterns.
...
llvm-svn: 46696
2008-02-04 05:34:34 +00:00
e14fdfaecd
SSE 4.1 Intrinsics and detection
...
llvm-svn: 46681
2008-02-03 07:18:54 +00:00
1770fb883b
explicitly include Compiler.h instead of getting it from tblgen in the middle of a class.
...
llvm-svn: 46676
2008-02-03 05:43:57 +00:00
e99faac423
don't do ReplaceUses on a result that doesn't exist.
...
llvm-svn: 46673
2008-02-03 03:20:59 +00:00
32e5347eb8
Get rid of the annoying blank lines before labels.
...
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
f5b9938ef6
Don't use uninitialized values. Fixes vec_align.ll on X86 Linux.
...
llvm-svn: 46666
2008-02-02 08:29:58 +00:00
Chris Lattner