11b0a5dbd4
Committing X86-64 support.
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llvm-svn: 30177
2006-09-08 06:48:29 +00:00
13a5dcddce
Fix a long-standing wart in the code generator: two-address instruction lowering
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actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
llvm-svn: 30108
2006-09-05 02:12:02 +00:00
305c49579c
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
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llvm-svn: 28378
2006-05-18 00:12:58 +00:00
ddb6cc1d8e
Better implementation of truncate. ISel matches it to a pseudo instruction
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that gets emitted as movl (for r32 to i16, i8) or a movw (for r16 to i8). And
if the destination gets allocated a subregister of the source operand, then
the instruction will not be emitted at all.
llvm-svn: 28119
2006-05-05 05:40:20 +00:00
2d7298c362
Foundation for call frame information.
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llvm-svn: 27491
2006-04-07 16:34:46 +00:00
d1aa1638c6
Expose base register for DwarfWriter. Refactor code accordingly.
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llvm-svn: 27225
2006-03-28 13:48:33 +00:00
3c43609f1f
Add support to locate local variables in frames (early version.)
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llvm-svn: 26994
2006-03-23 18:12:57 +00:00
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
0acc90c67e
add a method
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llvm-svn: 25910
2006-02-02 19:57:16 +00:00
a654525c1c
Pass extra regclasses into spilling code
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llvm-svn: 23537
2005-09-30 01:29:42 +00:00
de3c87a2ab
Implement the isLoadFromStackSlot interface
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llvm-svn: 23387
2005-09-19 05:23:44 +00:00
8ad3700a3e
The simple isel being gone makes this dead!
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llvm-svn: 22914
2005-08-19 18:32:03 +00:00
c88330ad13
* Remove trailing whitespace
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* Convert tabs to spaces
llvm-svn: 21426
2005-04-21 23:38:14 +00:00
a0b38d3cb1
Code insertion methods now return void instead of an int.
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llvm-svn: 15780
2004-08-15 22:15:11 +00:00
98de1d7795
These methods no longer take a TargetRegisterClass* operand.
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llvm-svn: 15774
2004-08-15 21:56:44 +00:00
a4da0d6294
Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent
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llvm-svn: 15739
2004-08-14 22:05:10 +00:00
4837f6c0d9
Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
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MachineBasicBlock::iterator take a MachineInstr*.
llvm-svn: 12392
2004-03-14 20:14:27 +00:00
48da2f8a6d
Change MRegisterInfo::foldMemoryOperand to return the folded
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instruction to make the API more flexible.
llvm-svn: 12386
2004-03-14 07:19:51 +00:00
01dded2e69
Change to match the newer, simpler, interface
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llvm-svn: 11525
2004-02-17 05:54:57 +00:00
cde4ade314
Add API to check and fold memory operands into instructions.
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llvm-svn: 11519
2004-02-17 04:33:18 +00:00
7dceed5ff9
The prologue/epilogue related method calls have no reason to return a value,
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make them return void.
This allows us to avoid some costly MBB.size() calls
llvm-svn: 11448
2004-02-14 19:49:54 +00:00
537805f315
Change interface so that we can add to the end of a basic block
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without getting an assertion from ilist that we are dereferencing
ilist<T>::end().
llvm-svn: 11345
2004-02-12 08:11:04 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
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ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
9118a426d3
Change all machine basic block modifier functions in MRegisterInfo to
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return the number of instructions added to/removed from the basic block
passed as their first argument.
Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.
llvm-svn: 9704
2003-11-04 22:57:09 +00:00
29265fe981
Added LLVM copyright header.
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llvm-svn: 9321
2003-10-21 15:17:13 +00:00
a4741a94ff
Switch over to TableGen generated register file description
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llvm-svn: 7511
2003-08-03 15:48:14 +00:00
238dadc37c
This method is long dead
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llvm-svn: 7460
2003-08-01 03:48:42 +00:00
e6fb194716
Changes to match new MRegisterInfo api
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llvm-svn: 5187
2002-12-28 20:32:54 +00:00
4997a840bc
Adjustments to match new simpler spill interface
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llvm-svn: 5147
2002-12-25 05:06:43 +00:00
4cb8af96b3
Update to use new interface for register info
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llvm-svn: 5098
2002-12-17 04:19:17 +00:00
e2533336f5
Simplify interfaces used by regalloc to insert code
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llvm-svn: 5052
2002-12-15 20:06:35 +00:00
0d1447d64a
* Simplify TargetRegisterClass implementations
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* Change regclass iterators to use an extra level of pointers
llvm-svn: 5047
2002-12-15 18:40:36 +00:00
78401cbb3c
Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
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PHI nodes.
llvm-svn: 5001
2002-12-13 09:54:12 +00:00
83e62f14dd
Implemented functions for emitting prologues and epilogues;
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removed EBP from the list of callee-saved registers (it isn't one).
llvm-svn: 4929
2002-12-04 23:57:03 +00:00
1af9bebcda
storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
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instead of by reference, since they return the modified iterator.
llvm-svn: 4914
2002-12-04 17:14:13 +00:00
0d28502c32
Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
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it is target-independent.
llvm-svn: 4911
2002-12-04 16:47:04 +00:00
d9522256d3
Added support for callee- and caller-save registers.
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llvm-svn: 4897
2002-12-03 23:11:21 +00:00
bde217d7a9
Added methods to read/write values to stack in .h, fixed implementation in
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.cpp to return the iterator correctly.
llvm-svn: 4827
2002-11-22 22:43:47 +00:00
53d2de923a
Add definitions for function headers from MRegisterInfo.h:
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Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
llvm-svn: 4784
2002-11-20 18:59:43 +00:00
d92fb0058b
Initial checkin of X86 backend.
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We can instruction select exactly one instruction 'ret void'. Wow.
llvm-svn: 4284
2002-10-25 22:55:53 +00:00
Evan Cheng