Commit Graph

329683 Commits

Author SHA1 Message Date
Michal Gorny 9c9bd1657c [clang-tools-extra] Fix overzealous linking of dylib to clangTidy
Fix accidentally making clangTidy library link to dylib.  This causes
libclang.so to also link to dylib which results in duplicate symbols
from shared and static libraries, and effectively to registering
command-line options twice.

Thanks to Sylvestre Ledru for noticing this and tracking it down
to r373786.  Fixes PR#43589.

Differential Revision: https://reviews.llvm.org/D68927

llvm-svn: 374885
2019-10-15 13:05:38 +00:00
Guillaume Chatelet b65fa48305 [Alignment] Migrate Attribute::getWith(Stack)Alignment
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet, jdoerfert

Reviewed By: courbet

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68792

llvm-svn: 374884
2019-10-15 12:56:24 +00:00
GN Sync Bot a945469875 gn build: Merge r374882
llvm-svn: 374883
2019-10-15 11:55:38 +00:00
Saar Raz ec87b00382 [Concepts] Concept Specialization Expressions
Part of C++20 Concepts implementation effort. Added Concept Specialization Expressions that are created when a concept is referenced with arguments, and tests thereof.

llvm-svn: 374882
2019-10-15 11:48:58 +00:00
David Stenberg 1ae2d9a2bd [DebugInfo] Add a DW_OP_LLVM_entry_value operation
Summary:
Internally in LLVM's metadata we use DW_OP_entry_value operations with
the same semantics as DWARF; that is, its operand specifies the number
of bytes that the entry value covers.

At the time of emitting entry values we don't know the emitted size of
the DWARF expression that the entry value will cover. Currently the size
is hardcoded to 1 in DIExpression, and other values causes the verifier
to fail. As the size is 1, that effectively means that we can only have
valid entry values for registers that can be encoded in one byte, which
are the registers with DWARF numbers 0 to 31 (as they can be encoded as
single-byte DW_OP_reg0..DW_OP_reg31 rather than a multi-byte
DW_OP_regx). It is a bit confusing, but it seems like llvm-dwarfdump
will print an operation "correctly", even if the byte size is less than
that, which may make it seem that we emit correct DWARF for registers
with DWARF numbers > 31. If you instead use readelf for such cases, it
will interpret the number of specified bytes as a DWARF expression. This
seems like a limitation in llvm-dwarfdump.

As suggested in D66746, a way forward would be to add an internal
variant of DW_OP_entry_value, DW_OP_LLVM_entry_value, whose operand
instead specifies the number of operations that the entry value covers,
and we then translate that into the byte size at the time of emission.

In this patch that internal operation is added. This patch keeps the
limitation that a entry value can only be applied to simple register
locations, but it will fix the issue with the size operand being
incorrect for DWARF numbers > 31.

Reviewers: aprantl, vsk, djtodoro, NikolaPrica

Reviewed By: aprantl

Subscribers: jyknight, fedor.sergeev, hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D67492

llvm-svn: 374881
2019-10-15 11:31:21 +00:00
Guillaume Chatelet 0e62011df8 [Alignment][NFC] Remove dependency on GlobalObject::setAlignment(unsigned)
Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: arsenm, mehdi_amini, jvesely, nhaehnle, hiraditya, steven_wu, dexonsmith, dang, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68944

llvm-svn: 374880
2019-10-15 11:24:36 +00:00
David Stenberg 284827f32b [DebugInfo] Add interface for pre-calculating the size of emitted DWARF
Summary:
DWARF's DW_OP_entry_value operation has two operands; the first is a
ULEB128 operand that specifies the size of the second operand, which is
a DWARF block. This means that we need to be able to pre-calculate and
emit the size of DWARF expressions before emitting them. There is
currently no interface for doing this in DwarfExpression, so this patch
introduces that.

When implementing this I initially thought about running through
DwarfExpression's emission two times; first with a temporary buffer to
emit the expression, in order to being able to calculate the size of
that emitted data. However, DwarfExpression is a quite complex state
machine, so I decided against that, as it seemed like the two runs could
get out of sync, resulting in incorrect size operands. Therefore I have
implemented this in a way that we only have to run DwarfExpression once.
The idea is to emit DWARF to a temporary buffer, for which it is
possible to query the size. The data in the temporary buffer can then be
emitted to DwarfExpression's main output.

In the case of DIEDwarfExpression, a temporary DIE is used. The values
are all allocated using the same BumpPtrAllocator as for all other DIEs,
and the values are then transferred to the real value list. In the case
of DebugLocDwarfExpression, the temporary buffer is implemented using a
BufferByteStreamer which emits to a buffer in the DwarfExpression
object.

Reviewers: aprantl, vsk, NikolaPrica, djtodoro

Reviewed By: aprantl

Subscribers: hiraditya, llvm-commits

Tags: #debug-info, #llvm

Differential Revision: https://reviews.llvm.org/D67768

llvm-svn: 374879
2019-10-15 11:14:35 +00:00
Simon Pilgrim 70778444c7 [X86] Resolve KnownUndef/KnownZero bits into target shuffle masks in helper. NFCI.
llvm-svn: 374878
2019-10-15 11:13:51 +00:00
Jeremy Morse ed29dbaafa [DebugInfo] Remove some users of DBG_VALUEs IsIndirect field
This patch kills off a significant user of the "IsIndirect" field of
DBG_VALUE machine insts. Brought up in in PR41675, IsIndirect is
techncally redundant as it can be expressed by the DIExpression of a
DBG_VALUE inst, and it isn't helpful to have two ways of expressing
things.

Rather than setting IsIndirect, have DBG_VALUE creators add an extra deref
to the insts DIExpression. There should now be no appearences of
IsIndirect=True from isel down to LiveDebugVariables / VirtRegRewriter,
which is ensured by an assertion in LDVImpl::handleDebugValue. This means
we also get to delete the IsIndirect handling in LiveDebugVariables. Tests
can be upgraded by for example swapping the following IsIndirect=True
DBG_VALUE:

  DBG_VALUE $somereg, 0, !123, !DIExpression(DW_OP_foo)

With one where the indirection is in the DIExpression, by _appending_
a deref:

  DBG_VALUE $somereg, $noreg, !123, !DIExpression(DW_OP_foo, DW_OP_deref)

Which both mean the same thing. 

Most of the test changes in this patch are updates of that form; also some
changes in how the textual assembly printer handles these insts.

Differential Revision: https://reviews.llvm.org/D68945

llvm-svn: 374877
2019-10-15 10:46:24 +00:00
Simon Pilgrim 4706f3be88 Fix uninitialized variable warnings. NFCI.
llvm-svn: 374876
2019-10-15 10:23:05 +00:00
Djordje Todorovic 095531ea94 [llvm-locstats] Fix 'only params' no entry value stats
Adding the missing line.

llvm-svn: 374875
2019-10-15 10:12:14 +00:00
Martin Storsjo e0916f4fbe [LLD] [COFF] Update a leftover comment after SVN r374869. NFC.
llvm-svn: 374874
2019-10-15 09:46:33 +00:00
Martin Storsjo cd8759c3c2 [LLD] [COFF] Fix -Wmissing-field-initializers warnings. NFC.
llvm-svn: 374873
2019-10-15 09:33:14 +00:00
Petar Avramovic 599591f3d4 [MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store
Add vector MSA register classes to fprb, they are 128 bit wide.
MSA instructions use the same registers for both integer and floating
point operations. Therefore we only need to check for vector element
size during legalization or instruction selection.

Add helper function in MipsLegalizerInfo and switch to legalIf
LegalizeRuleSet to keep legalization rules compact since they depend
on MipsSubtarget and presence of MSA.
fprb is assigned to all vector operands.
Move selectLoadStoreOpCode to MipsInstructionSelector in order to
reduce number of arguments.

Differential Revision: https://reviews.llvm.org/D68867

llvm-svn: 374872
2019-10-15 09:30:08 +00:00
David Stenberg d46ac44ecd Change Comments SmallVector to std::vector in DebugLocStream [NFC]
This changes the 32-element SmallVector to a std::vector. When building
a RelWithDebInfo clang-8 binary, the average size of the vector was
~10000, so it does not seem very beneficial or practical to use a small
vector for that.

The DWARFBytes SmallVector grows in the same way as Comments, so perhaps
that also should be changed to a purely dynamically allocated structure,
but that requires some more code changes, so I let that remain as a
SmallVector for now.

llvm-svn: 374871
2019-10-15 09:21:09 +00:00
Petar Avramovic f7c213c9c4 [MIPS GlobalISel] Refactor MipsRegisterBankInfo [NFC]
Check if size of operand LLT matches sizes of available register banks
before inspecting the opcode in order to reduce number of checks.
Factor commonly used pieces of code into functions.

Differential Revision: https://reviews.llvm.org/D68866

llvm-svn: 374870
2019-10-15 09:18:42 +00:00
Martin Storsjo 9318c94ebb [LLD] [COFF] Wrap file location pair<StringRef,int> in Optional<>. NFC.
This makes use of it slightly clearer, and makes it match the
same construct in the lld ELF linker.

Differential Revision: https://reviews.llvm.org/D68935

llvm-svn: 374869
2019-10-15 09:18:18 +00:00
Dmitry Vyukov cc2f68ea2d tsan: fix Go ppc64le build
This #define is in the non-Go ppc64le build but not in the Go build.

Reviewed-in: https://reviews.llvm.org/D68046
Author: randall77 (Keith Randall)
llvm-svn: 374868
2019-10-15 08:38:58 +00:00
Martin Storsjo 674d55438d [LLDB] [PECOFF] Use a "pc" vendor name in aarch64 triples
This matches all other architectures listed in the same file.

This fixes debugging aarch64 executables with lldb-server, which
otherwise fails, with log messages like these:

Target::SetArchitecture changing architecture to aarch64 (aarch64-pc-windows-msvc)
Target::SetArchitecture Trying to select executable file architecture aarch64 (aarch64-pc-windows-msvc)

ArchSpec::SetArchitecture sets the vendor to llvm::Triple::PC
for any coff/win32 combination, and if this doesn't match the triple
set by the PECOFF module, things doesn't seem to work with when
using lldb-server.

Differential Revision: https://reviews.llvm.org/D68939

llvm-svn: 374867
2019-10-15 08:32:46 +00:00
Martin Storsjo b1f6ba2a2e [LLDB] [Windows] Initial support for ARM64 register contexts
Differential Revision: https://reviews.llvm.org/D67954

llvm-svn: 374866
2019-10-15 08:31:52 +00:00
Martin Storsjo da92ed8365 [Demangle] Add a few more options to the microsoft demangler
This corresponds to commonly used options to UnDecorateSymbolName
within llvm.

Add them as hidden options in llvm-undname. MS undname.exe takes
numeric flags, corresponding to the UNDNAME_* constants, but instead
of hardcoding in mappings for those numbers, just add textual
options instead, as it the use of them here is primarily intended
for testing.

Differential Revision: https://reviews.llvm.org/D68917

llvm-svn: 374865
2019-10-15 08:29:56 +00:00
Sam McCall bbb8eade69 [Format] Add machine-readable SPDX license ID to clang-format.el
llvm-svn: 374864
2019-10-15 07:25:18 +00:00
Pavel Labath 8d49995795 Fix TestDisassemble_VST1_64
- use a full triple instead of just the architecture (makes the test
  pass on non-apple hosts)
- skip the test if the ARM llvm target is not built

llvm-svn: 374863
2019-10-15 07:20:01 +00:00
Craig Topper b2661a2d15 [X86] Don't check for VBROADCAST_LOAD being a user of the source of a VBROADCAST when trying to share broadcasts.
The only things VBROADCAST_LOAD uses is an address and a chain
node. It has no vector inputs.

So if its a user of the source of another broadcast that could
only mean one of two things. The other broadcast is broadcasting
the address of the broadcast_load. Or the source is a load and
the use we're seeing is the chain result from that load. Neither
of these cases make sense to combine here.

This issue was reported post-commit r373871. Test case has not
been reduced yet.

llvm-svn: 374862
2019-10-15 06:10:11 +00:00
David L. Jones 6bfdebb412 Revert [SROA] Reuse existing lifetime markers if possible
This reverts r374692 (git commit 92694eba93)

Reproducer sent to commit thread on llvm-commits.

llvm-svn: 374859
2019-10-15 04:32:07 +00:00
Shiva Chen 078bec6c48 [RISCV] Support fast calling convention
LLVM may annotate the function with fastcc if there has only one caller
and there're no other caller out of the module and the function is not
naked or contain variable arguments.

The fastcc functions could pass the arguments by the caller saved registers.

Differential Revision: https://reviews.llvm.org/D68559

llvm-svn: 374857
2019-10-15 02:04:29 +00:00
Thomas Lively 232fd99d9e [WebAssembly] Trapping fptoint builtins and intrinsics
Summary:
The WebAssembly backend lowers fptoint instructions to a code sequence
that checks for overflow to avoid traps because fptoint is supposed to
be speculatable. These new builtins and intrinsics give users a way to
depend on the trapping semantics of the underlying instructions and
avoid the extra code generated normally.

Patch by coffee and tlively.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D68902

llvm-svn: 374856
2019-10-15 01:11:51 +00:00
Casey Carter 6f0768f64d [libc++][test] Use <version> to get config on MSVC
...instead of `<ciso646>`.

Also includes some NFC comment changes.

llvm-svn: 374854
2019-10-15 00:22:38 +00:00
Walter Erquinigo d04855f820 [lldb-server/android] Show more processes by relaxing some checks
By default `platform process list` only shows the processes of the current user that lldb-server can parse.
There are several problems:
- apk programs don't have an executable file. They instead use a package name as identifier. We should show them instead.
- each apk also runs under a different user. That's how android works
- because of the user permission, some files like /proc/<pid>/{environ,exe} can't be read.

This results in a very small process list.

This is a local run on my machine
```
(lldb) platform process list
2 matching processes were found on "remote-android"
PID    PARENT USER       TRIPLE                   NAME
====== ====== ========== ======================== ============================
23291  3177              aarch64-unknown-linux-android sh
23301  23291            aarch64-unknown-linux-android lldb-server
```
However, I have 700 processes running at this time.

By implementing a few fallbacks for android, I've expanded this list to 202, filtering out kernel processes, which would presumably appear in this list if the device was rooted.

```
(lldb) platform process list
202 matching processes were found on "remote-android"
PID    PARENT USER       TRIPLE                   NAME
====== ====== ========== ======================== ============================
...
12647  3208              aarch64-unknown-linux-android sh
12649  12647             aarch64-unknown-linux-android lldb-server
12653  982                                        com.samsung.faceservice
13185  982                                        com.samsung.vvm
15899  982                                        com.samsung.android.spay
16220  982                                        com.sec.spp.push
17126  982                                        com.sec.spp.push:RemoteDlcProcess
19772  983                                        com.android.chrome
20209  982                                        com.samsung.cmh:CMH
20380  982                                        com.google.android.inputmethod.latin
20879  982                                        com.samsung.android.oneconnect:Receiver
21212  983                                        com.tencent.mm
24459  1                 aarch64-unknown-linux-android wpa_supplicant
25974  982                                        com.samsung.android.contacts
26293  982                                        com.samsung.android.messaging
28714  982                                        com.samsung.android.dialer
31605  982                                        com.samsung.android.MtpApplication
32256  982                                        com.bezobidny
```

Something to notice is that the architecture is unkonwn for all apks. And that's fine, because run-as would be required to gather this information and that would make this entire functionality massively slow.

There are still several improvements to make here, like displaying actual user names, which I'll try to do in a following diff.

Note: Regarding overall apk debugging support from lldb. I'm planning on having lldb spawn lldb-server by itself with the correct user, so that everything works well. The initial lldb-server used for connecting to the remote platform can be reused for such purpose. Furthermore, eventually lldb could also launch that initial lldb-server on its own.

Differential Revision: D68289

llvm-svn: 374853
2019-10-15 00:00:05 +00:00
Walter Erquinigo 1473b9f205 Revert "fix"
This reverts commit d8af64c9a0228301f6fd0e1c841e4abe0b6f4801.

llvm-svn: 374852
2019-10-14 23:56:54 +00:00
Sanjay Patel 4335d8f0e8 Revert [InstCombine] fold a shifted bool zext to a select
This reverts r374828 (git commit 1f40f15d54) due to bot breakage

llvm-svn: 374851
2019-10-14 23:55:39 +00:00
Alina Sbirlea b7a3353061 [MemorySSA] Update for partial unswitch.
Update MSSA for blocks cloned when doing partial unswitching.
Enable additional testing with MSSA.
Resolves PR43641.

llvm-svn: 374850
2019-10-14 23:52:39 +00:00
Craig Topper 9586d85ab3 [X86] Teach X86MCodeEmitter to properly encode zmm16-zmm31 as index register to vgatherpf/vscatterpf.
We need to encode bit 4 into the EVEX.V' bit. We do this right
for regular gather/scatter which use either MRMSrcMem or MRMDestMem
formats.  The prefetches use MRM*m formats.

Fixes an issue recently added to PR36202.

llvm-svn: 374849
2019-10-14 23:48:24 +00:00
Craig Topper 5e80715508 [X86] Add encoding tests for avx512pf vgatherpf/vscatterpf instructions.
llvm-svn: 374848
2019-10-14 23:48:12 +00:00
Julian Lettner 98aa3c1de9 [lit] Add argument check: --timeout must be non-negative integer
llvm-svn: 374847
2019-10-14 23:43:18 +00:00
Walter Erquinigo ed57fb7665 fix
llvm-svn: 374846
2019-10-14 23:32:46 +00:00
Jorge Gorbe Moya b052331bd6 Revert "Dead Virtual Function Elimination"
This reverts commit 9f6a873268.

llvm-svn: 374844
2019-10-14 23:25:25 +00:00
Eric Christopher 3be9169caa Temporarily Revert [Modules][PCH] Hash input files content
as it's breaking a few bots.

This reverts r374841 (git commit 2a1386c81d)

llvm-svn: 374842
2019-10-14 23:14:24 +00:00
Bruno Cardoso Lopes 2a1386c81d [Modules][PCH] Hash input files content
Summary:
When files often get touched during builds, the mtime based validation
leads to different problems in implicit modules builds, even when the
content doesn't actually change:

- Modules only: module invalidation due to out of date files. Usually causing rebuild traffic.
- Modules + PCH: build failures because clang cannot rebuild a module if it comes from building a PCH.
- PCH: build failures because clang cannot rebuild a PCH in case one of the input headers has different mtime.

This patch proposes hashing the content of input files (headers and
module maps), which is performed during serialization time. When looking
at input files for validation, clang only computes the hash in case
there's a mtime mismatch.

I've tested a couple of different hash algorithms availble in LLVM in
face of building modules+pch for `#import <Cocoa/Cocoa.h>`:
- `hash_code`: performace diff within the noise, total module cache increased by 0.07%.
- `SHA1`: 5% slowdown. Haven't done real size measurements, but it'd be BLOCK_ID+20 bytes per input file, instead of BLOCK_ID+8 bytes from `hash_code`.
- `MD5`: 3% slowdown. Like above, but BLOCK_ID+16 bytes per input file.

Given the numbers above, the patch uses `hash_code`. The patch also
improves invalidation error msgs to point out which type of problem the
user is facing: "mtime", "size" or "content".

rdar://problem/29320105

Reviewers: dexonsmith, arphaman, rsmith, aprantl

Subscribers: jkorous, cfe-commits, ributzka

Tags: #clang

Differential Revision: https://reviews.llvm.org/D67249

llvm-svn: 374841
2019-10-14 23:02:03 +00:00
Eric Christopher d93d001cba Add -fno-experimental-pass-manager to make clear which pass manager
we're running and to make flipping the default not regress testing.

llvm-svn: 374840
2019-10-14 23:01:48 +00:00
Eric Christopher c3649a0871 In the new pass manager use PTO.LoopUnrolling to determine when and how
we will unroll loops. Also comment a few occasions where we need to
know whether or not we're forcing the unwinder or not.

The default before and after this patch is for LoopUnroll to be enabled,
and for it to use a cost model to determine whether to unroll the loop
(`OnlyWhenForced = false`). Before this patch, disabling loop unroll
would not run the LoopUnroll pass. After this patch, the LoopUnroll pass
is being run, but it restricts unrolling to only the loops marked by a
pragma (`OnlyWhenForced = true`).

In addition, this patch disables the UnrollAndJam pass when disabling unrolling.

Testcase is in clang because it's controlling how the loop optimizer
is being set up and there's no other way to trigger the behavior.

llvm-svn: 374838
2019-10-14 22:56:07 +00:00
Jian Cai 72593d3bdc [clang] add requirements to -Wa,-W test cases.
Include linux as a test requirement.

llvm-svn: 374837
2019-10-14 22:51:12 +00:00
Eli Friedman 4498d41932 [test] Fix test failure
The version mismatch symbol is version 9 on 32 bit android. Since
this test isn't actually testing any android specific functionality,
we force the target triple to x86_64-unknown-unknown in order to have
a consistent version number. It seems the test was already trying to
do this, just not doing it right

Patch by Christopher Tetrault

Differential Revision: https://reviews.llvm.org/D68882

llvm-svn: 374836
2019-10-14 22:44:42 +00:00
Philip Reames a40162d475 [Tests] Add a SCEV analysis test for llvm.widenable.condition
Mostly because we don't appear to have one and a prototype patch I just saw would have broken the example committed.

llvm-svn: 374835
2019-10-14 22:42:35 +00:00
Jian Cai 4ec5205da7 Add support to -Wa,-W in clang
Summary:
Currently clang does not support -Wa,-W, which suppresses warning
messages in GNU assembler. Add this option for gcc compatibility.
https://bugs.llvm.org/show_bug.cgi?id=43651. Reland with differential
information.

Reviewers: bcain

Reviewed By: bcain

Subscribers: george.burgess.iv, gbiv, llozano, manojgupta, nickdesaulniers, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D68884

llvm-svn: 374834
2019-10-14 22:28:03 +00:00
Jian Cai 89478148d8 Revert "Add support to -Wa,-W in clang"
This reverts commit e72eeca43b9577be2aae55f7603febbf223a6ab3.

llvm-svn: 374833
2019-10-14 22:28:01 +00:00
Jian Cai e9089c223c [ARM][AsmParser] handles offset expression in parentheses
Summary:
Integrated assembler does not accept offset expressions surrounded by
parenthesis. Handle this case for GAS compability.
https://bugs.llvm.org/show_bug.cgi?id=43631

Subscribers: kristof.beyls, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68764

llvm-svn: 374832
2019-10-14 22:22:26 +00:00
David Blaikie be744ea54f DebugInfo: Remove unnecessary/mistaken inclusion of Bitcode/BitcodeAnalyzer.h
Introduced in r374582, Michael Spencer pointed out this broke the
modules build due to a missing tblgen dependency on
llvm/IR/Attributes.inc.

Michael fixed the dependency in r374827.

So this removes the inclusion and the new dependency (effectively
reverting r374827 and including the alternative fix of removing rather
than supporting the new dependency).

Thanks for the quick fix/notice, Michael!

llvm-svn: 374831
2019-10-14 22:12:45 +00:00
Roman Tereshin 044297ccbf [update_mir_test_checks] Handle MI flags properly
previously we would generate literal check lines w/ no reg-exps for
vregs as MI flags (nsw, ninf, etc.) won't be recognized as a part of MI.

Fixing that. Includes updating the MIR tests that suffered from the
problem.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D68905

llvm-svn: 374829
2019-10-14 22:01:58 +00:00
Sanjay Patel 1f40f15d54 [InstCombine] fold a shifted bool zext to a select
For a constant shift amount, add the following fold.
shl (zext (i1 X)), ShAmt --> select (X, 1 << ShAmt, 0)

https://rise4fun.com/Alive/IZ9

Fixes PR42257.

Based on original patch by @zvi (Zvi Rackover)

Differential Revision: https://reviews.llvm.org/D63382

llvm-svn: 374828
2019-10-14 21:56:40 +00:00