Commit Graph

12 Commits

Author SHA1 Message Date
Nate Begeman b11b8e44fa Pattern-match return. Includes gross hack!
llvm-svn: 24874
2005-12-20 00:26:01 +00:00
Nate Begeman 40f081d8e0 Add support for fmul node of type v4f32.
void %foo(<4 x float> * %a) {
entry:
  %tmp1 = load <4 x float> * %a;
  %tmp2 = mul <4 x float> %tmp1, %tmp1
  store <4 x float> %tmp2, <4 x float> *%a
  ret void
}

Is selected to:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vxor v1, v1, v1
        vmaddfp v0, v0, v0, v1
        stvx v0, r2, r3
        blr

llvm-svn: 24701
2005-12-14 00:34:09 +00:00
Nate Begeman ade6f9a255 Add support patterns to many load and store instructions which will
hopefully use patterns in the near future.

llvm-svn: 24651
2005-12-09 23:54:18 +00:00
Chris Lattner d9d18aff6a Define BR in the .td file now that Evan made tblgen smarter.
llvm-svn: 24589
2005-12-04 18:42:54 +00:00
Nate Begeman 048b26387b Represent the encoding of the SPR instructions as they actually are, so
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.

llvm-svn: 24521
2005-11-29 22:42:50 +00:00
Nate Begeman c138118cdb Add the remainder of the AltiVec 4 x float instructions. Further
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.

llvm-svn: 24516
2005-11-29 08:04:45 +00:00
Nate Begeman 11fd6b22b1 Small tweaks noticed while on the plane.
llvm-svn: 24492
2005-11-26 22:39:34 +00:00
Nate Begeman 8492fd30ab Some first bits of AltiVec stuff: Instruction Formats, Encodings, and
Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.

llvm-svn: 24489
2005-11-23 05:29:52 +00:00
Chris Lattner b439dad538 Allow pseudos to have patterns, no functionality change
llvm-svn: 23988
2005-10-25 20:58:43 +00:00
Jim Laskey 74ab9960f2 Added InstrSchedClass to each of the PowerPC Instructions.
Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830
2005-10-19 19:51:16 +00:00
Nate Begeman 9f3c26c4ea Write patterns for the various shl and srl patterns that don't involve
doing something clever.

llvm-svn: 23824
2005-10-19 18:42:01 +00:00
Chris Lattner 7503d46feb Rename PowerPC*.td -> PPC*.td
llvm-svn: 23740
2005-10-14 23:40:39 +00:00