98e541457b
Add support for unreachable
...
llvm-svn: 17056
2004-10-16 18:21:33 +00:00
61753bf847
Add support for undef
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llvm-svn: 17055
2004-10-16 18:19:26 +00:00
770709befe
Add support for undef, unreachable, and function flags
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llvm-svn: 17054
2004-10-16 18:18:16 +00:00
4ff314968e
Parse undef and unreachable
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llvm-svn: 17053
2004-10-16 18:17:13 +00:00
2978437b76
Add support
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llvm-svn: 17052
2004-10-16 18:16:19 +00:00
ea9a85abe4
Add support for undef and unreachable
...
llvm-svn: 17051
2004-10-16 18:14:10 +00:00
a3f3c8a1ad
ADd support for undef and unreachable
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llvm-svn: 17050
2004-10-16 18:13:47 +00:00
e4bea062c7
Teach the X86 backend about unreachable and undef. Among other things, we
...
now compile:
'foo() {}' into "ret" instead of "mov EAX, 0; ret"
llvm-svn: 17049
2004-10-16 18:13:05 +00:00
583dfdcf86
Add support for unreachable and undef
...
llvm-svn: 17048
2004-10-16 18:12:13 +00:00
81a7a23494
Optimize instructions involving undef values. For example X+undef == undef.
...
llvm-svn: 17047
2004-10-16 18:11:37 +00:00
7e6d4a12b5
Add support for UndefValue
...
llvm-svn: 17046
2004-10-16 18:10:31 +00:00
c0e2e82477
When promoting mem2reg, make uninitialized values become undef isntead of 0.
...
llvm-svn: 17045
2004-10-16 18:10:06 +00:00
646354bae1
Handle undef values as undefined on the constant lattice
...
ignore unreachable instructions
llvm-svn: 17044
2004-10-16 18:09:41 +00:00
6ac3ef950d
Add note
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llvm-svn: 17043
2004-10-16 18:09:25 +00:00
8e71c6a33d
Add support for the undef value. Implement a new optimization based on globals
...
that are initialized with undef. When promoting malloc to a global, start out
initialized to undef
llvm-svn: 17042
2004-10-16 18:09:00 +00:00
5e0b9f2eec
Add support for undef and unreachable
...
llvm-svn: 17041
2004-10-16 18:08:06 +00:00
d5f67d8ca6
Implement UndefValue class
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llvm-svn: 17040
2004-10-16 18:07:16 +00:00
38a6969894
Add support for the unreachable instruction
...
llvm-svn: 17039
2004-10-16 18:06:43 +00:00
bcf508cf6f
Add new UndefValueVal type
...
llvm-svn: 17038
2004-10-16 18:06:07 +00:00
3384f9ad40
Add new UnreachableInst class
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llvm-svn: 17037
2004-10-16 18:05:54 +00:00
278e1dab8e
Add new unreachable instruction
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llvm-svn: 17036
2004-10-16 18:05:37 +00:00
9d4d20b71c
Add new UndefValue class
...
llvm-svn: 17035
2004-10-16 18:05:25 +00:00
d57b37d1fa
UndefValue's are constants
...
llvm-svn: 17034
2004-10-16 18:05:10 +00:00
08b7d5b032
Document unreachable instruction
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llvm-svn: 17033
2004-10-16 18:04:13 +00:00
cd196a9444
Add missing 'Instruction Opcodes' bullet to TOC
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Update for changes in LLVM 1.4 bytecode format.
llvm-svn: 17032
2004-10-16 18:03:55 +00:00
1a709646e7
Add a missing dependency
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llvm-svn: 17031
2004-10-16 17:12:55 +00:00
947ecace14
Fix file header
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llvm-svn: 17030
2004-10-16 16:37:42 +00:00
3c3e058406
Be more careful about looking for constants when we really want constantint's.
...
llvm-svn: 17029
2004-10-16 16:07:10 +00:00
db6a9fdf38
None of these have actually been implemented yet.
...
llvm-svn: 17027
2004-10-16 00:29:30 +00:00
f22be93428
Move the implementation of the instructions clone methods to this file so
...
that the vtables for these classes are only instantiated in this translation
unit, not in every xlation unit they are used.
llvm-svn: 17026
2004-10-15 23:52:53 +00:00
a47839f165
Move the implementation of the clone method for these classes to
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Instructions.cpp, so that a vtable is not emitted into every translation unit
that uses the classes.
llvm-svn: 17025
2004-10-15 23:52:05 +00:00
b889b2ad97
Fix hyphenation and quoting style for great justice
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llvm-svn: 17024
2004-10-15 23:22:48 +00:00
c4f93ac159
There is no reason not to build these in parallel
...
llvm-svn: 17023
2004-10-15 23:22:15 +00:00
65c23ee5d3
Add a space between the type and name of value when printing error message
...
llvm-svn: 17022
2004-10-15 23:08:50 +00:00
0bc0f1d8de
Don't print a bunch of metrics that are meaningless for external functions
...
llvm-svn: 17017
2004-10-15 19:40:31 +00:00
cf809786dc
Fix broken links
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llvm-svn: 17016
2004-10-15 17:04:28 +00:00
15914416ec
Instruction select globals with offsets better. For example, on this test
...
case:
int C[100];
int foo() {
return C[4];
}
We now codegen:
foo:
mov %EAX, DWORD PTR [C + 16]
ret
instead of:
foo:
mov %EAX, OFFSET C
mov %EAX, DWORD PTR [%EAX + 16]
ret
Other impressive features may be coming later.
This patch is contributed by Jeff Cohen!
llvm-svn: 17011
2004-10-15 05:05:29 +00:00
3b78938b9e
Give the X86 JIT the ability to encode global+disp constants. Patch
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contributed by Jeff Cohen!
llvm-svn: 17010
2004-10-15 04:53:13 +00:00
19025d5ad0
Give the X86 asm printer the ability to print out addressing modes that have
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constant displacements from global variables. Patch by Jeff Cohen!
llvm-svn: 17009
2004-10-15 04:44:53 +00:00
df7b984f5a
Allow X86 addressing modes to represent globals with offsets. Patch contributed
...
by Jeff Cohen!
llvm-svn: 17008
2004-10-15 04:43:20 +00:00
3065220deb
Allow machine operands to represent global variables with offsets. This is
...
useful when you have a reference like:
int A[100];
void foo() { A[10] = 1; }
In this case, &A[10] is a single constant and should be treated as such.
Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.
This is another fine patch contributed by Jeff Cohen!!
llvm-svn: 17007
2004-10-15 04:38:41 +00:00
2152236351
This patch fixes the nasty bug that caused 175.vpr to fail for X86 last night.
...
The problem occurred when trying to reload this instruction:
MOV32mr %reg2326, 8, %reg2297, 4, %reg2295
The value of reg2326 was available in EBX, so it was reused from there, instead
of reloading it into EDX.
The value of reg2297 was available in EDX, so it was reused from there, instead
of reloading it into EDI.
The value of reg2295 was not available, so we tried reloading it into EBX, its
assigned register. However, we checked and saw that we already reloaded
something into EBX, so we chose what reg2326 was assigned to (EDX) and reloaded
into that register instead.
Unfortunately EDX had already been used by reg2297, so reloading into EDX
clobbered the value used by the reg2326 operand, breaking the program.
The fix for this is to check that the newly picked register is ok. In this
case we now find that EDX is already used and try using EDI, which succeeds.
llvm-svn: 17006
2004-10-15 03:19:31 +00:00
9af0572a37
This patch adds and improves debugging output. No functionality changes.
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llvm-svn: 17005
2004-10-15 03:16:29 +00:00
a15c246af9
Better codegen of binary integer ops with 32 bit immediate operands.
...
This transformation fires a few dozen times across the testsuite.
For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
lis r2, 4080
ori r2, r2, 4080
xor r3, r3, r2
blr
New:
_test2:
xoris r3, r3, 4080
xori r3, r3, 4080
blr
llvm-svn: 17004
2004-10-15 00:50:19 +00:00
aa8f87c83c
The field is called `imm22', not simply `imm'
...
llvm-svn: 17003
2004-10-14 22:33:32 +00:00
b03f27c96c
Synthetic instructions RET and RETL need to have all 3 parameters specified
...
llvm-svn: 17002
2004-10-14 22:32:49 +00:00
b34fcdaa46
Class F2_1 already inherits the imm22 field from class F2
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llvm-svn: 17001
2004-10-14 22:32:24 +00:00
7183fc3a84
Generate the SparcV8 code emitter from .td files
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llvm-svn: 17000
2004-10-14 21:57:19 +00:00
98ebcd88f2
* In the F3_1 class, default asi to 0 because it's not currently used
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* In the F3_3 class, remove mention of asi because it's not part of the format
llvm-svn: 16999
2004-10-14 21:53:39 +00:00
692979c1e2
* We don't use the ENABLE_*_JIT flags in the source base anymore
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* Convert references to Sparc to SparcV9 to clearly identify CPU type
llvm-svn: 16998
2004-10-14 20:06:36 +00:00
Chris Lattner