d11ea81db0
Add code to handle a "frameless" unwind stack.
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The frameless unwind stack has a special encoding, the algorithm for which is in
"permuteEncode".
llvm-svn: 135103
2011-07-13 23:03:31 +00:00
507ba77465
ARM Assembler support for DBG instruction.
...
Add range checking and testing for parsing and encoding of DBG instruction.
llvm-svn: 135102
2011-07-13 22:59:38 +00:00
48d2464c3f
PR8800: When building a conversion to A& using a member operatorA&(), do not require A to be a complete type.
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llvm-svn: 135101
2011-07-13 22:53:21 +00:00
13ea11afde
Modify the test script to better handle the different inlining behaviors of
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clang/gcc/llvm-gcc. If the first breakpoint is due to stop at an inlined
frame, test that the call site corresponds to where it should be. Also add
an expecr for a second break stop, if the first break stop corresponds to an
inlined call frame #0 .
rdar://problem/9741470
llvm-svn: 135100
2011-07-13 22:34:29 +00:00
3c4d652210
We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases.
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llvm-svn: 135099
2011-07-13 22:28:55 +00:00
307de01867
ARM parsing and encoding tests for CMN/CMP.
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llvm-svn: 135098
2011-07-13 22:26:58 +00:00
9908c17666
struct Init -> class Init
...
Rename struct Init to class Init for consistency and in preparation
for making Init a FoldingSetNode.
llvm-svn: 135097
2011-07-13 22:25:51 +00:00
fae30b240b
Revert r135074 and r135080. They broke clamscan.
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llvm-svn: 135096
2011-07-13 22:20:09 +00:00
9559d360e5
Shuffle ARM assembly tests a bit.
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llvm-svn: 135095
2011-07-13 22:19:10 +00:00
c5b4019a0d
Revert 135093. Think-o.
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llvm-svn: 135094
2011-07-13 22:06:11 +00:00
ccc207773d
Correct range for thumb co-processor immediate
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llvm-svn: 135093
2011-07-13 22:03:11 +00:00
31756c2283
Range checking for CDP[2] immediates.
...
llvm-svn: 135092
2011-07-13 22:01:08 +00:00
98154a76fd
Reapply r134946 with fixes. Tested on Benjamin testcase and other test-suite failures.
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llvm-svn: 135091
2011-07-13 21:58:55 +00:00
ad69e65a39
Add 'mutable' to the function declarator chunk, to be used when
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parsing lambda expressions, from John Freeman!
llvm-svn: 135090
2011-07-13 21:47:47 +00:00
9613b64916
Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more
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general version of X86ISD::ANDNP also opened the room for a little bit
of refactoring.
llvm-svn: 135088
2011-07-13 21:36:51 +00:00
7ba479d22f
The target specific node PANDN name is misleading. That happens because
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it's later selected to a ANDNPD/ANDNPS instruction instead of the PANDN
instruction. Rename it.
llvm-svn: 135087
2011-07-13 21:36:47 +00:00
385cfc073e
Fix an incorrect namespace typo-correction diagnostic, from Kaelyn
...
Uhrain! Fixes PR10318.
llvm-svn: 135086
2011-07-13 21:36:26 +00:00
ca7150b54d
Cleanup Thumb co-processor instructions a bit.
...
Combine redundant base classes and such. No indended functional change.
llvm-svn: 135085
2011-07-13 21:35:10 +00:00
344ec79715
Make sure we don't combine a large displacement and a frame index in the same addressing mode on x86-64. It can overflow, leading to a crash/miscompile.
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<rdar://problem/9763308>
llvm-svn: 135084
2011-07-13 21:29:53 +00:00
f0335ce632
Emit debug info for extended vectors.
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llvm-svn: 135083
2011-07-13 21:23:30 +00:00
cabb48d511
Parameterize away the ARM T1Cop class.
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llvm-svn: 135082
2011-07-13 21:17:59 +00:00
adb29b6dbb
Fix predicates for Thumb co-processor instructions.
...
They're all Thumb2 only, not just some of them. More refactoring cleanup
coming.
llvm-svn: 135081
2011-07-13 21:14:23 +00:00
5fba5b8eb9
Only keep the global split candidates that work out.
...
Some pysical registers create split solutions that would spill anywhere.
They should not even be considered in future multi-way global splits.
This does not affect code generation (yet).
llvm-svn: 135080
2011-07-13 20:49:46 +00:00
ef67e7d623
Refactor out checking for displacements on x86-64 addressing modes. No functionality change. Refactoring in preparation for an additional safety check in FoldOffsetIntoAddress.
...
Part of <rdar://problem/9763308>.
llvm-svn: 135079
2011-07-13 20:44:23 +00:00
ec8989115d
Testcases for ARM assembly BX/BXJ instructions.
...
llvm-svn: 135078
2011-07-13 20:25:46 +00:00
e2f9840cdb
Fix encoding for ARM BXJ instruction.
...
llvm-svn: 135077
2011-07-13 20:25:01 +00:00
801d3ad1b2
Fix encoding of predicate bits on ARM BX_pred.
...
llvm-svn: 135076
2011-07-13 20:21:31 +00:00
60654d697a
format string checking: long and int have the same widths on 32-bit, so we shouldn't warn about using
...
an "int" format specifier with a "long" type in 32-bit.
llvm-svn: 135075
2011-07-13 20:20:58 +00:00
7bb72e2824
Move the InterferenceCache cursor into the GlobalSplitCand struct.
...
This is in preparation of supporting multiple global split candidates in
a single live range split operation.
llvm-svn: 135074
2011-07-13 20:14:52 +00:00
928a25714e
Enforce access control for the destructor in a new[] expression and mark
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it as used. Otherwise, we can fail to instantiate or validate the destructor,
which can lead to crashes in IR gen like PR10351.
llvm-svn: 135073
2011-07-13 20:12:57 +00:00
2371a3f14a
Testcases for ARM assembly BLX/BL instructions.
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llvm-svn: 135072
2011-07-13 20:11:04 +00:00
975b641ee8
Range checking for 16-bit immediates in ARM assembly.
...
llvm-svn: 135071
2011-07-13 20:10:10 +00:00
5e4416e8c9
Revert r135042. As Chris pointed out, it had no effect, and was based on
...
a complete misunderstanding of the code.
llvm-svn: 135070
2011-07-13 20:05:31 +00:00
10d6ce494b
Add @expectedFailure decorator for test_target_variable_command_with_dsym().
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rdar://problem/9763907
llvm-svn: 135069
2011-07-13 20:03:51 +00:00
2d7faa5e3e
Fix up TargetLoweringObjectFile ctors to properly initialize fields.
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llvm-svn: 135068
2011-07-13 19:54:59 +00:00
de223c3a7b
[arcmt] Add weak/unsafe_unretained for "@property (readonly)" when we are @synthesizing it.
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llvm-svn: 135067
2011-07-13 19:47:57 +00:00
e255be93a8
Give the ARM BKPT instruction the right operand type.
...
The immediate is of limited range and the operand type should reflect that.
llvm-svn: 135066
2011-07-13 19:24:09 +00:00
c8b3619773
[arcmt] For properties rewrite 'assign' -> 'weak or unsafe_unretained', 'retain' -> 'strong', and add
...
'weak or unsafe_unretained' when 'assign' is missing. rdar://9496219&9602589.
llvm-svn: 135065
2011-07-13 19:22:00 +00:00
4a40a747ba
Change test case, one that actually failed before my commit.
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llvm-svn: 135064
2011-07-13 19:19:44 +00:00
c845e55374
Add tests for ARM parsing of 'BKPT' instruction.
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llvm-svn: 135063
2011-07-13 19:17:36 +00:00
43b45e2790
Fix copy-pasto.
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llvm-svn: 135062
2011-07-13 19:16:30 +00:00
4f0f2ac757
Add tests for ARM parsing of 'BIC' instruction.
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llvm-svn: 135061
2011-07-13 19:12:32 +00:00
6cfb1573bf
Add some FIXMEs.
...
Keeping the instructions in alphabetical order, just like in the ARM ARM.
Adding FIXMEs for skipped instructions when adding tests out of order.
llvm-svn: 135060
2011-07-13 19:10:23 +00:00
d78e0c22fb
Revert accidental commit.
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llvm-svn: 135059
2011-07-13 19:09:08 +00:00
b94674b325
It's not safe to fold (fptrunc (sqrt (fpext x))) to (sqrtf x) if there is another use of sqrt. rdar://9763193
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llvm-svn: 135058
2011-07-13 19:08:16 +00:00
9a881019a5
With -Wselector, don't warn about unimplemented optional method
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used in @selector expression because, well, their implementation
is optional. // rdar://9545564
llvm-svn: 135057
2011-07-13 19:05:43 +00:00
b7cdd8772c
Add tests for ARM parsing of 'AND' instruction.
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llvm-svn: 135056
2011-07-13 18:55:14 +00:00
bb24c595f7
Improve ARM assembly parsing diagnostics a bit.
...
Catch potential cascading errors on a malformed so_reg operand and bail after
the first error.
Add some tests for the diagnostics we do want.
llvm-svn: 135055
2011-07-13 18:49:30 +00:00
dffafded6c
Don't crash if defining -dealloc in a category.
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llvm-svn: 135054
2011-07-13 18:26:47 +00:00
61a9f2af9e
Add tests for ARM parsing of 'ADD' instruction
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llvm-svn: 135053
2011-07-13 18:12:46 +00:00
Bill Wendling