2 Commits

Author	SHA1	Message	Date
Peter Collingbourne	628ec9f193	ELF: Place relro sections after non-relro sections in r/w segment. ... This is in preparation for my next change, which will introduce a relro nobits section. That requires that relro sections appear at the end of the progbits part of the r/w segment so that the relro nobits section can appear contiguously. Because of the amount of churn required in the test suite, I'm making this change separately. llvm-svn: 291523	2017-01-10 01:21:30 +00:00
Peter Smith	fde6213fe8	[ARM] ARM TLS shouldn't use relaxations ... The ARM TLS relocations are placed on literal data and not the code-sequence, it is therefore not possible to implement the relaxTls* functions. This change updates handleMipsTlsRelocation() to handleNoRelaxTlsRelocation() and incorporates ARM as well as Mips. The ARM support in handleNoRelaxTlsRelocation() currently needs to ouput the module index dynamic relocation in all cases as it is relying on the dynamic linker to set the module index in the got. Should address PR30218 Differential Revision: https://reviews.llvm.org/D24827 llvm-svn: 282250	2016-09-23 13:54:48 +00:00