527da1b6e2
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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llvm-svn: 119990
2010-11-23 03:31:01 +00:00
0eecf5d201
Move hasFP() and few related hooks to TargetFrameInfo.
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llvm-svn: 119740
2010-11-18 21:19:35 +00:00
51d2e9ca29
Attempt to unbreak cmake-based builds
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llvm-svn: 119098
2010-11-15 00:48:12 +00:00
f7183edb59
First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place
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llvm-svn: 119097
2010-11-15 00:06:54 +00:00
66031ed839
move all the target's asmprinters into the main target. The piece
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that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
llvm-svn: 119056
2010-11-14 18:43:56 +00:00
dab307c6f4
fix cmake
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llvm-svn: 119053
2010-11-14 18:27:11 +00:00
9007c368c6
remove JIT support from the Alpha backend. The JIT will be moving to MC,
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and the Alpha backend isn't MCized yet. Approved by Andrew.
llvm-svn: 119051
2010-11-14 18:24:41 +00:00
e8360b7182
Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
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llvm-svn: 117667
2010-10-29 17:29:13 +00:00
a7b6d58f45
Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.
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llvm-svn: 116018
2010-10-08 00:21:28 +00:00
0097dd0d5a
Add support to model pipeline bypass / forwarding.
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llvm-svn: 115005
2010-09-28 23:50:49 +00:00
b4b12535e8
Removed a bunch of unnecessary target_link_libraries.
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llvm-svn: 114999
2010-09-28 22:39:14 +00:00
676c61db0e
update a bunch of code to use the MachinePointerInfo version of getStore.
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llvm-svn: 114461
2010-09-21 18:41:36 +00:00
6963c1f789
eliminate an old SelectionDAG::getTruncStore method, propagating
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MachinePointerInfo around more.
llvm-svn: 114452
2010-09-21 17:42:31 +00:00
3d178ed4d4
propagate MachinePointerInfo through various uses of the old
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SelectionDAG::getExtLoad overload, and eliminate it.
llvm-svn: 114446
2010-09-21 17:04:51 +00:00
7727d05dbb
convert the targets off the non-MachinePointerInfo of getLoad.
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llvm-svn: 114410
2010-09-21 06:44:06 +00:00
018f965a77
AlphaSchedule.td: 7bit-ize.
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llvm-svn: 114173
2010-09-17 09:56:43 +00:00
65b48b5dfc
zap dead code.
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llvm-svn: 113073
2010-09-04 18:12:00 +00:00
6a77066913
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
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to try to re-use scavenged frame index reference registers. rdar://8277890
llvm-svn: 112241
2010-08-26 23:32:16 +00:00
2edfdd289f
remove some dead code.
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llvm-svn: 111345
2010-08-18 02:42:11 +00:00
a7aed18624
Reapply r110396, with fixes to appease the Linux buildbot gods.
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llvm-svn: 110460
2010-08-06 18:33:48 +00:00
bda59bd247
Revert r110396 to fix buildbots.
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llvm-svn: 110410
2010-08-06 00:23:35 +00:00
755aceb5d0
Don't use PassInfo* as a type identifier for passes. Instead, use the address of the static
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ID member as the sole unique type identifier. Clean up APIs related to this change.
llvm-svn: 110396
2010-08-05 23:42:04 +00:00
1b2bc1b844
PR7774: Fix undefined shifts in Alpha backend. As a bonus, this actually
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improves the generated code in some cases.
llvm-svn: 109985
2010-08-01 21:13:28 +00:00
8289f78569
Remove the isMoveInstr() hook.
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llvm-svn: 108567
2010-07-16 22:35:46 +00:00
92d8998348
Don't pass StringRef by reference.
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llvm-svn: 108366
2010-07-14 22:38:02 +00:00
0961c55161
RISC architectures get their memory operand folding for free.
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The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
7198d32fc6
Replace copyRegToReg with copyPhysReg for Alpha.
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llvm-svn: 108065
2010-07-11 01:08:23 +00:00
60af0681cb
Use COPY in targets
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llvm-svn: 108063
2010-07-10 22:43:03 +00:00
1c349f18f8
Move getExtLoad() and (some) getLoad() DebugLoc argument after EVT argument for consistency sake.
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llvm-svn: 107820
2010-07-07 22:15:37 +00:00
fe7532a308
Split the SDValue out of OutputArg so that SelectionDAG-independent
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code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
a3ca21b228
Propagate debug loc.
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llvm-svn: 107710
2010-07-06 22:08:15 +00:00
3439629239
Reapply r107655 with fixes; insert the pseudo instruction into
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the block before calling the expansion hook. And don't
put EFLAGS in a mbb's live-in list twice.
llvm-svn: 107691
2010-07-06 20:24:04 +00:00
f4f04107ef
Revert r107655.
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llvm-svn: 107668
2010-07-06 15:49:48 +00:00
12205645a6
Fix a bunch of custom-inserter functions to handle the case where
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the pseudo instruction is not at the end of the block.
llvm-svn: 107655
2010-07-06 15:18:19 +00:00
0664a67fe1
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
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llvm-svn: 107550
2010-07-03 00:40:23 +00:00
e159407231
Remove isTwoAddress from Alpha.
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llvm-svn: 106445
2010-06-21 18:48:55 +00:00
0125b6410a
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
ef2b6ce00a
cleanup
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llvm-svn: 105322
2010-06-02 13:53:17 +00:00
062a97f0f6
BR is a barrier.
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llvm-svn: 103826
2010-05-14 22:00:27 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
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Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
f62cd20b62
No-ops emitted for scheduling don't correspond with anything in the
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user's source, so don't arbitrarily assign them a debug location.
llvm-svn: 103121
2010-05-05 20:58:01 +00:00
25c1653700
Get rid of the EdgeMapping map. Instead, just check for BasicBlock
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changes before doing phi lowering for switches.
llvm-svn: 102809
2010-05-01 00:01:06 +00:00
0cb06d64e8
Fix a typo.
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llvm-svn: 102799
2010-04-30 22:38:11 +00:00
12f6855f85
Use MachineOperand::is* predicates.
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llvm-svn: 102472
2010-04-27 22:24:37 +00:00
7d62e33291
Make processor FUs unique for given itinerary. This extends the limit of 32
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FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
8422e57baa
Delete now-unnecessary const_casts.
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llvm-svn: 101637
2010-04-17 15:32:28 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
31ae586c74
Move per-function state out of TargetLowering subclasses and into
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MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Wesley Peck