Commit Graph

10 Commits

Author SHA1 Message Date
Ahmed Bougacha 0b938284da [CodeGen] Teach X86_64ABIInfo about AVX512.
As specified in the SysV AVX512 ABI drafts. It follows the same scheme
as AVX2: 

    Arguments of type __m512 are split into eight eightbyte chunks.
    The least significant one belongs to class SSE and all the others
    to class SSEUP.

This also means we change the OpenMP SIMD default alignment on AVX512.

Based on r240337.
Differential Revision: http://reviews.llvm.org/D9894

llvm-svn: 240338
2015-06-22 21:31:43 +00:00
Ahmed Bougacha b55d416ef1 [OpenMP] Test AVX default SIMD alignment. NFC.
llvm-svn: 237991
2015-05-22 02:51:49 +00:00
Alexey Bataev db39021cee [OPENMP] -fopenmp enables OpenMP support (fix for http://llvm.org/PR23492)
-fopenmp turns on OpenMP support and links libiomp5 as OpenMP library. Also there is -fopenmp={libiomp5|libgomp} option that allows to override effect of -fopenmp and link libgomp library (if -fopenmp=libgomp is specified).
Differential Revision: http://reviews.llvm.org/D9736

llvm-svn: 237769
2015-05-20 04:24:19 +00:00
Hal Finkel 0d0a1a53e3 [PowerPC] ABI support for the QPX vector instruction set
Support for the QPX vector instruction set, used on the IBM BG/Q supercomputer,
has recently been added to the LLVM PowerPC backend. This vector instruction
set requires some ABI modifications because the ABI on the BG/Q expects
<4 x double> vectors to be provided with 32-byte stack alignment, and to be
handled as native vector types (similar to how Altivec vectors are handled on
mainline PPC systems). I've named this ABI variant elfv1-qpx, have made this
the default ABI when QPX is supported, and have updated the ABI handling code
to provide QPX vectors with the correct stack alignment and associated
register-assignment logic.

llvm-svn: 231960
2015-03-11 19:14:15 +00:00
Duncan P. N. Exon Smith 4bbe428cc5 IR: Add 'distinct' MDNodes to bitcode and assembly (clang)
Update testcases for LLVM change in r225474 to make `MDNode`s explicitly
distinct (when they aren't uniqued).

Part of PR22111.

llvm-svn: 225475
2015-01-08 22:39:28 +00:00
Duncan P. N. Exon Smith b3a66691f8 IR: Make metadata typeless in assembly, clang side
Match LLVM changes from r224257.

llvm-svn: 224259
2014-12-15 19:10:08 +00:00
Hal Finkel 92e31a5ead Add getOpenMPSimdDefaultAlignment for PowerPC
When the aligned clause of an OpenMP simd pragma is not provided with an
explicit alignment, a target-dependent default must be used. This adds such a
default of PPC targets.

This will become slightly more complicated when BG/Q support is added (because
then it will depend on the type). For now, 16 is a correct value for all
systems, and covers Altivec and VSX vectors.

llvm-svn: 218994
2014-10-03 17:45:20 +00:00
Alexander Musman 09184fedc0 [OPENMP] Codegen of the ‘aligned’ clause for the ‘omp simd’ directive.
Differential Revision: http://reviews.llvm.org/D5499

llvm-svn: 218660
2014-09-30 05:29:28 +00:00
Eli Bendersky b198b4e864 Rename loop unrolling and loop vectorizer metadata to have a common prefix.
[Clang part]

These patches rename the loop unrolling and loop vectorizer metadata
such that they have a common 'llvm.loop.' prefix.  Metadata name
changes:

llvm.vectorizer.* => llvm.loop.vectorizer.*
llvm.loopunroll.* => llvm.loop.unroll.*

This was a suggestion from an earlier review
(http://reviews.llvm.org/D4090) which added the loop unrolling
metadata. 

Patch by Mark Heffernan.

llvm-svn: 211712
2014-06-25 15:42:16 +00:00
Alexander Musman 515ad8c490 This patch adds a helper class (CGLoopInfo) for marking memory instructions with llvm.mem.parallel_loop_access metadata.
It also adds a simple initial version of codegen for pragma omp simd (it will change in the future to support all the clauses).

Differential revision: http://reviews.llvm.org/D3644

llvm-svn: 209411
2014-05-22 08:54:05 +00:00