3d7efa2586
implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
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llvm-svn: 35327
2007-03-25 04:35:41 +00:00
6089146aa3
new testcase
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llvm-svn: 35326
2007-03-25 04:35:23 +00:00
cd99fbdf3b
Make more uses of getHighBitsSet and get rid of some pointless & of an
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APInt with its type mask.
llvm-svn: 35325
2007-03-25 04:26:16 +00:00
843e44503c
Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
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llvm-svn: 35324
2007-03-25 02:18:14 +00:00
f4579c7872
new testcase
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llvm-svn: 35323
2007-03-25 02:17:58 +00:00
d685514e2e
switch TargetLowering::getConstraintType to take the entire constraint,
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not just the first letter. No functionality change.
llvm-svn: 35322
2007-03-25 02:14:49 +00:00
d8aad61d4d
More APIntification:
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* Convert the last use of a uint64_t that should have been an APInt.
* Change ComputeMaskedBits to have a const reference argument for the Mask
so that recursions don't cause unneeded temporaries. This causes temps
to be needed in other places (where the mask has to change) but this
change optimizes for the recursion which is more frequent.
* Remove two instances of &ing a Mask with getAllOnesValue. Its not
needed any more because APInt is accurate in its bit computations.
* Start using the getLowBitsSet and getHighBits set methods on APInt
instead of shifting. This makes it more clear in the code what is
going on.
llvm-svn: 35321
2007-03-25 02:03:12 +00:00
927f30da08
Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.
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llvm-svn: 35320
2007-03-25 02:01:03 +00:00
03a643aa69
enforce the proper range for the i386 N constraint.
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llvm-svn: 35319
2007-03-25 01:57:35 +00:00
c8ddca703d
Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
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llvm-svn: 35318
2007-03-25 01:44:57 +00:00
421ac38bd6
new testcase
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llvm-svn: 35317
2007-03-25 01:44:40 +00:00
9bb967ec5c
Fix a typo in a comment.
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llvm-svn: 35316
2007-03-25 01:13:46 +00:00
d4e07f200a
Actually, for getHighBitsSet and getLowBitsSet, don't make a 0 bit size
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illegal. Instead do the 0 valued construction for the user. This is because
the caller may not know (or care to check) that the number of bits set is
zero.
llvm-svn: 35315
2007-03-25 00:01:47 +00:00
3a8248f79d
fix a regression on vector or instructions.
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llvm-svn: 35314
2007-03-24 23:56:43 +00:00
42fbb4fbe3
Make it illegal to set 0 bits in getHighBitsSet and getLowBitsSet. For that
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they should have used the uint64_t constructor. This avoids causing
undefined results via shifts by the word size when the bit width is an
exact multiple of the word size.
llvm-svn: 35313
2007-03-24 23:47:58 +00:00
790631ff2d
In the getBitsSet function, don't optimize for a common case that is
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already covered by getLowBitsSet (i.e. when loBits==0). Consequently, remove
the default value for loBits and reorder the arguments to the more natural
loBits, hiBits order. This makes it more clear that this function is for bit
groups in the middle of the bit width and not towards one end or the other.
llvm-svn: 35312
2007-03-24 23:42:47 +00:00
cf3a678d40
Don't invoke undefined behavior in shifts in the functions getHighBitsSet
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and getLowBitsSet.
llvm-svn: 35311
2007-03-24 23:35:54 +00:00
b334e8ac57
Implement the getBitsSet function.
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llvm-svn: 35310
2007-03-24 23:27:48 +00:00
e3d00119e6
Remove the last vestiges of this directory.
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llvm-svn: 35309
2007-03-24 23:07:49 +00:00
30e83dfc4b
Implement the getHighBitsSet and getLowBitsSet functions.
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llvm-svn: 35308
2007-03-24 23:05:35 +00:00
41eadeb49d
Get the signs in the right place!
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llvm-svn: 35307
2007-03-24 22:50:43 +00:00
db3b93bbb2
Fix a link.
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llvm-svn: 35306
2007-03-24 22:40:44 +00:00
709a820a53
Undo the last change and make this really implement remainder and not
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modulus. The previous change was a result of incorrect documentation in
the LangRef.html.
llvm-svn: 35305
2007-03-24 22:37:23 +00:00
c10869bb57
Flip the srem tests around. Previous commit was to correct an apparent
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bug in the srem implementation. Turns out it was a documentation bug
instead.
llvm-svn: 35304
2007-03-24 22:34:10 +00:00
806ad6afb8
Correct the description of srem. remainder follows the dividend not the
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divisor!
llvm-svn: 35303
2007-03-24 22:23:39 +00:00
3e51cacd4f
Correct the implementation of srem to be remainder, not modulus. The sign of
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the result must follow the sign of the divisor.
llvm-svn: 35302
2007-03-24 21:56:22 +00:00
71a6ef7f0e
Fix incorrect test cases for srem. The definition of srem is a remainder so
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that the sign of the result follows the sign of the divisor.
llvm-svn: 35301
2007-03-24 21:55:26 +00:00
77859c2d49
Clean up this interface:
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1. Group similar methods into doxygen groups
2. Reorganize the groups into a consist flow.
3. Significantly improve the quality of the documentation on several methods
4. Rewrite srem and sdiv to eliminate a copy and improve readability.
5. Eliminate unneeded forward references.
llvm-svn: 35300
2007-03-24 18:09:18 +00:00
2a991268f7
don't rely on ADL
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llvm-svn: 35299
2007-03-24 17:37:03 +00:00
7750e344d3
add a valuetype for v1i64, which is needed by mmx.
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llvm-svn: 35298
2007-03-24 17:36:26 +00:00
e9ebd3f6ba
Make some codes more efficient.
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llvm-svn: 35297
2007-03-24 15:34:37 +00:00
43cab75914
add a bad case evan though of.
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llvm-svn: 35296
2007-03-24 06:01:32 +00:00
a962d18774
For PR1205:
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Convert some calls to ConstantInt::getZExtValue() into getValue() and
use APInt facilities in the subsequent computations.
llvm-svn: 35294
2007-03-24 00:42:08 +00:00
b7051f596a
Adjust offset to compensate for big endian machines.
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llvm-svn: 35293
2007-03-24 00:02:43 +00:00
8aae2d7e1c
Autodetect MMX & SSE stuff for AMD processors
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llvm-svn: 35292
2007-03-23 23:46:48 +00:00
3ab6e72143
This is dead. DEAD I tells you!!
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llvm-svn: 35291
2007-03-23 22:42:04 +00:00
871c77cda1
PR1260:
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Add final support to get the QT example to compile.
llvm-svn: 35290
2007-03-23 22:35:46 +00:00
a883b58caf
Make sure SEXTLOAD of the specific type is supported on the target.
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llvm-svn: 35289
2007-03-23 22:13:36 +00:00
562b715dd1
Add more test cases for APIntified InstCombine.
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llvm-svn: 35288
2007-03-23 21:57:47 +00:00
959a21d3dc
For PR1205:
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* APIntify visitAdd and visitSelectInst
* Remove unused uint64_t versions of utility functions that have been
replaced with APInt versions.
This completes most of the changes for APIntification of InstCombine. This
passes llvm-test and llvm/test/Transforms/InstCombine/APInt.
Patch by Zhou Sheng.
llvm-svn: 35287
2007-03-23 21:24:59 +00:00
e2f5f24e8e
Also replace uses of SRL if that's also folded during ReduceLoadWidth().
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llvm-svn: 35286
2007-03-23 20:55:21 +00:00
ea8b07ee6b
Add test case for testing InstCombine with arbitrary precision integer
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types. These tests mimic the integer test cases in the normal InstCombine
test suite but use "strange" integer bit widths.
Most tests written by Zhou Sheng, a few by me.
llvm-svn: 35284
2007-03-23 20:48:34 +00:00
6d39206bc2
For PR1205:
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APIntify visitDiv, visitMul and visitRem.
Patch by Zhou Sheng.
llvm-svn: 35283
2007-03-23 20:05:17 +00:00
12b89cc148
switch AddReachableCodeToWorklist from being recursive to being iterative.
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llvm-svn: 35282
2007-03-23 19:17:18 +00:00
6274c72ee1
For PR1205:
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APIntify several utility functions supporting logical operators and shift
operators.
Patch by Zhou Sheng.
llvm-svn: 35281
2007-03-23 18:46:34 +00:00
ac8fe43024
Add the 'explicit' keyword to several constructors that accept one
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argument that don't appear intended as implicit-conversion operators.
llvm-svn: 35280
2007-03-23 18:44:11 +00:00
96719d1667
Test handling of switches with wide case ranges.
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llvm-svn: 35279
2007-03-23 07:17:52 +00:00
d96dc9020a
Fix constant fold of div by zero and rem by zero to match IEEE 754
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requirements. We must return NaN in some cases and correctly signed
infinity in other cases. Passes CFP2006 (not that that says much).
llvm-svn: 35277
2007-03-23 05:33:23 +00:00
0900993ebc
Make the "KnownZero ^ TypeMask" computation just once.
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llvm-svn: 35276
2007-03-23 03:13:21 +00:00
755f04b5d7
Simplify the code.
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llvm-svn: 35275
2007-03-23 02:39:25 +00:00
Chris Lattner