3c3dd902ec
Achieve what the incorrect test was trying to do by simply requiring that all
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critical edges be split before we begin.
llvm-svn: 37949
2007-07-06 18:12:36 +00:00
bcdd7ec4c9
Remove an incorrect check.
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llvm-svn: 37948
2007-07-06 16:52:47 +00:00
9d97420473
The exception handling intrinsics return values,
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so must be lowered to a value, not nothing at all.
Subtle point: I made eh_selector return 0 and
eh_typeid_for return 1. This means that only
cleanups (destructors) will be run as the exception
unwinds [if eh_typeid_for returned 0 then it would
be as if the first catch always matched, and the
corresponding handler would be run], which is
probably want you want in the CBE.
llvm-svn: 37947
2007-07-06 14:46:23 +00:00
71ed4aaa31
Remove redundant declarations.
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llvm-svn: 37946
2007-07-06 13:59:28 +00:00
3d3fc3296e
eliminate residual cruft related to recognizing bytecode
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files.
bitcode files are the only LLVM format left.
llvm-svn: 37945
2007-07-06 13:38:17 +00:00
fd404813e8
Fix a comment so that the element numbering match the actual element
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operand numbering.
llvm-svn: 37944
2007-07-06 13:27:33 +00:00
bab5355ff4
Add an explicit triple to the big-endian tests so that the assembly
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output format is always consistent with what the greps are looking for.
llvm-svn: 37943
2007-07-06 13:15:51 +00:00
c5b1984f57
Indexes into the list of filter ids cannot be output
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directly: they need to be turned into byte offsets
(often the same, but may not be if there are many
type infos).
llvm-svn: 37942
2007-07-06 12:46:24 +00:00
6ddf75174a
Test that byte offsets are used to index into the list
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of filter ids, and not simply the id index. Testing
this requires at least 128 type infos!
llvm-svn: 37941
2007-07-06 12:38:27 +00:00
b567e3ffb0
Add the byval attribute
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llvm-svn: 37940
2007-07-06 10:57:03 +00:00
0e21980704
Solaris 2.x does not have RLIMIT_RSS, check for this symbol (analog NetBSD below), should subsume Cygwin
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llvm-svn: 37939
2007-07-06 10:31:27 +00:00
003c0b1f90
Remove propagateEHRegister in favour of a more limited
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fix, that is adequate while PR1508 remains unresolved.
llvm-svn: 37938
2007-07-06 09:18:59 +00:00
81df18a50a
Remove ExtractGlobalVariable - use StripPointerCasts
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instead.
llvm-svn: 37937
2007-07-06 09:10:03 +00:00
1ee941dac4
Correct a typo.
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llvm-svn: 37936
2007-07-06 06:01:16 +00:00
fc7010d962
Workaround of getCopyToRegs and getCopyFromRegs bugs for big-endian machines.
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llvm-svn: 37935
2007-07-06 01:47:35 +00:00
642be16bbf
Change CalculateHeights and CalculateDepths to be non-recursive.
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llvm-svn: 37934
2007-07-06 01:37:28 +00:00
a7d41aad4f
Refactor code to add initial support for OptionalDefOperand.
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llvm-svn: 37933
2007-07-06 01:05:26 +00:00
0a42fdf346
Print the s bit if the instruction is toggled to its CPSR setting form.
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llvm-svn: 37932
2007-07-06 01:01:34 +00:00
5c66888580
PredicateDefOperand -> OptionalDefOperand.
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llvm-svn: 37931
2007-07-06 01:00:49 +00:00
eaa82198c4
Add OptionalDefOperand to stand for optionally defined result.
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llvm-svn: 37930
2007-07-06 01:00:16 +00:00
02e9698293
Fix a bunch of issues found in a testcase from 400.perlbench.
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llvm-svn: 37929
2007-07-05 23:11:26 +00:00
da784693c3
Fix test.
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llvm-svn: 37928
2007-07-05 23:00:50 +00:00
feba62c719
avoid ambiguity in target selection
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llvm-svn: 37927
2007-07-05 22:16:19 +00:00
9546a5c7de
Initial ARM JIT support by Raul Fernandes Herbster.
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llvm-svn: 37926
2007-07-05 21:15:40 +00:00
929624f461
Add explicit keywords.
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llvm-svn: 37925
2007-07-05 20:40:15 +00:00
83b095df36
Make MachineFunctionPass::runOnFunction non-virtual. Subclasses override
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the virtual function runOnMachineFunction instead. And add access specifiers.
llvm-svn: 37924
2007-07-05 20:39:35 +00:00
de9c825859
Proper flag __alloca call
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llvm-svn: 37923
2007-07-05 20:36:08 +00:00
a282694acf
Make the debug string for ISD::MERGE_VALUES consistent with the others.
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llvm-svn: 37922
2007-07-05 20:15:43 +00:00
d258e80583
Add a parameter to getCopyToParts and getCopyFromParts to specify whether
...
endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.
llvm-svn: 37921
2007-07-05 20:12:34 +00:00
fb0b269032
This enum is dead
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llvm-svn: 37920
2007-07-05 17:28:01 +00:00
622178dfc1
update the .cvs files.
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llvm-svn: 37919
2007-07-05 17:27:31 +00:00
f997e37fbb
update the .cvs files
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llvm-svn: 37918
2007-07-05 17:26:49 +00:00
cee44d3d1d
Doh
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llvm-svn: 37917
2007-07-05 17:21:33 +00:00
de8c7b6981
remove a dead case
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llvm-svn: 37916
2007-07-05 17:18:32 +00:00
a6246f4346
Unbreak the build.
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llvm-svn: 37915
2007-07-05 17:13:56 +00:00
085314b455
Unbreak the build.
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llvm-svn: 37914
2007-07-05 17:13:19 +00:00
e16561cd5d
Here is the bulk of the sanitizing.
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Almost all occurrences of "bytecode" in the sources have been eliminated.
llvm-svn: 37913
2007-07-05 17:07:56 +00:00
5892cfd263
Record my recent work.
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llvm-svn: 37912
2007-07-05 16:56:24 +00:00
6d1cf76c97
the arm backend is not building, temporarily disable it.
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llvm-svn: 37911
2007-07-05 16:11:52 +00:00
f5a15dd9da
Fix PR1539. Add LoopPassPrinter.
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llvm-svn: 37909
2007-07-05 15:32:03 +00:00
4836e3a6f8
Make sure only one copy of a filter is placed in the
...
exception handling table if we encounter it multiple
times. Filters could be folded harder than this, but
that would mean a lot more work for not much gain.
llvm-svn: 37908
2007-07-05 15:15:01 +00:00
ed4f3743c2
Test commit.
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llvm-svn: 37907
2007-07-05 10:32:33 +00:00
a9c32e6b49
Add a note about llvm2cpp's dubious future.
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llvm-svn: 37906
2007-07-05 10:12:19 +00:00
98f56b50d1
Get the version number right, finally.
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llvm-svn: 37905
2007-07-05 10:00:19 +00:00
ffabff11c0
Teach DAGISelEmitter about zero_reg.
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llvm-svn: 37900
2007-07-05 07:19:45 +00:00
e32e7fb40d
Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time.
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llvm-svn: 37899
2007-07-05 07:19:29 +00:00
94f04c6fc9
Reflects the chanegs made to PredicateOperand.
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llvm-svn: 37898
2007-07-05 07:18:20 +00:00
a7f77599a4
Added ARM::CPSR to represent ARM CPSR status register.
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llvm-svn: 37897
2007-07-05 07:17:13 +00:00
7e90b11550
Unfortunately we now require C++ code to isel Bcc, conditional moves, etc.
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llvm-svn: 37896
2007-07-05 07:15:27 +00:00
aa3b8014bd
Each ARM use predicate operand is now made up of two components. The new component is the CPSR register.
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llvm-svn: 37895
2007-07-05 07:13:32 +00:00
Owen Anderson