Commit Graph

300713 Commits

Author SHA1 Message Date
Zachary Turner 9f6ac4c264 Fix a compilation failure on non-MSVC compilers.
llvm-svn: 343952
2018-10-08 04:34:41 +00:00
Zachary Turner 94926a6db8 [PDB] Add the ability to lookup global symbols by name.
The Globals table is a hash table keyed on symbol name, so
it's possible to lookup symbols by name in O(1) time.  Add
a function to the globals stream to do this, and add an option
to llvm-pdbutil to exercise this, then use it to write some
tests to verify correctness.

llvm-svn: 343951
2018-10-08 04:19:16 +00:00
Craig Topper 98dd9d6896 Revert r343948 "[LegalizeDAG] Make one of the ReplaceNode signatures take an ArrayRef instead a pointer to an array. Add assert on size of array. NFC"
The assert is failing some asan tests on the bots.

llvm-svn: 343950
2018-10-08 03:12:12 +00:00
Brian Gesiak 0b56830011 [coro]Pass rvalue reference for named local variable to return_value
Summary:
Addressing https://bugs.llvm.org/show_bug.cgi?id=37265.

Implements [class.copy]/33 of coroutines TS.

When the criteria for elision of a copy/move operation are met, but not
for an exception-declaration, and the object to be copied is designated by an
lvalue, or when the expression in a return or co_return statement is a
(possibly parenthesized) id-expression that names an object with automatic
storage duration declared in the body or parameter-declaration-clause of the
innermost enclosing function or lambda-expression, overload resolution to select
the constructor for the copy or the return_value overload to call is first
performed as if the object were designated by an rvalue.

Patch by Tanoy Sinha!

Reviewers: modocache, GorNishanov

Reviewed By: modocache, GorNishanov

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51741

llvm-svn: 343949
2018-10-08 03:08:39 +00:00
Craig Topper c058a68784 [LegalizeDAG] Make one of the ReplaceNode signatures take an ArrayRef instead a pointer to an array. Add assert on size of array. NFC
llvm-svn: 343948
2018-10-08 02:02:08 +00:00
Craig Topper cd38de8b15 [LegalizeDAG] Move legalization of scatter and masked store from LegalizeVectorOps to LegalizeDAG.
This is where we legalize gather and masked load so this is consistent.

Since these ops are always on vectors I've chosen to go with LegalizeDAG since that's what we do for other vector only ops like BUILD_VECTOR, VECTOR_SHUFFLE, etc. The ScalarizeMaskedMemIntrinsic pass should take care of scalarizing these before SelectionDAG so hopefully we don't need to worry about illegally typed scalar ops being emitted in the legalizing. If we did we would need to do this in LegalizeVectorOps so we could get the second type legalization that runs between LegalizeVectorOps and LegalizeDAG.

llvm-svn: 343947
2018-10-08 00:04:55 +00:00
Fangrui Song 8380c9e918 [clangd] Migrate to LLVM STLExtras range API
llvm-svn: 343946
2018-10-07 17:21:08 +00:00
Sanjay Patel ecc8af61e7 [DAGCombiner] allow undef elts in vector fadd matching
llvm-svn: 343945
2018-10-07 16:30:42 +00:00
Sanjay Patel f956840dbe [x86] add vector fadd with undef elts test; NFC
llvm-svn: 343944
2018-10-07 16:27:50 +00:00
Sanjay Patel 6c02c6a3a6 [x86] remove redundant tests; NFC
The equivalent tests were added to the file with related folds in rL343941.

llvm-svn: 343943
2018-10-07 16:13:38 +00:00
Sanjay Patel ef76e27985 [DAGCombiner] allow undefs when matching vector splats for fmul folds
llvm-svn: 343942
2018-10-07 16:05:37 +00:00
Sanjay Patel fcb1061c13 [x86] add vector fmul with undef elts tests; NFC
llvm-svn: 343941
2018-10-07 16:00:55 +00:00
Sanjay Patel 0b74c840dd [DAGCombiner] allow undef elts in vector fabs/fneg matching
This change is proposed as a part of D44548, but we
need this independently to avoid regressions from improved
undef propagation in SimplifyDemandedVectorElts().

llvm-svn: 343940
2018-10-07 15:32:06 +00:00
Sanjay Patel 46a9dc2e3e [DAGCombiner] shorten code for bitcast+fabs fold; NFC
llvm-svn: 343939
2018-10-07 15:18:30 +00:00
Sanjay Patel 31a3f2aaba [x86] add tests for FP logic folding for vectors with undefs; NFC
llvm-svn: 343938
2018-10-07 15:05:39 +00:00
Kirill Bobyrev 4a5ff88fdb [clangd] NFC: Migrate to LLVM STLExtras API where possible
This patch improves readability by migrating `std::function(ForwardIt
start, ForwardIt end, ...)` to LLVM's STLExtras range-based equivalent
`llvm::function(RangeT &&Range, ...)`.

Similar change in Clang: D52576.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D52650

llvm-svn: 343937
2018-10-07 14:49:41 +00:00
Sanjay Patel 01daf62a0d [InstSimplify] add vector test for fneg+fdiv; NFC
This should be fixed with D52934.

llvm-svn: 343936
2018-10-07 14:46:33 +00:00
Simon Pilgrim 3b04a4e322 [SelectionDAG] Respect multiple uses in SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
rL343913 was using SimplifyDemandedBits's original demanded mask instead of the adjusted 'NewMask' that accounts for multiple uses of the op (those variable names really need improving....).

Annoyingly many of the test changes (back to pre-rL343913 state) are actually safe - but only because their multiple uses are all by PMULDQ/PMULUDQ.

Thanks to Jan Vesely (@jvesely) for bisecting the bug.

llvm-svn: 343935
2018-10-07 11:45:46 +00:00
Simon Pilgrim 012fda59a5 [AARCH64][X86] Remove _nonsplat from test names
As discussed on D50222 

llvm-svn: 343934
2018-10-07 11:24:04 +00:00
Craig Topper e4d199e360 [LegalizeVectorOps] Make ExpandStrictFPOp return the result corresponding to the result number of the SDValue passed in.
It was always returning the chain which seems to be the result number of the SDValue in the lit tests we have. But I don't know if that's guaranteed.

llvm-svn: 343933
2018-10-07 07:16:44 +00:00
Dorit Nuzman 72f6e29980 [IAI,LV] Avoid creating interleave-groups for predicated accesse
This patch fixes PR39099.

When strided loads are predicated, each of them will form an interleaved-group
(with gaps). However, subsequent stages of vectorization (planning and
transformation) assume that if a load is part of an Interleave-Group it is not
predicated, resulting in wrong code - unmasked wide loads are created.

The Interleaving Analysis does take care not to have conditional interleave
groups of size > 1, but until we extend the planning and transformation stages
to support masked-interleave-groups we should also avoid having them for
size == 1.

Reviewers: Ayal, hsaito, dcaballe, fhahn

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D52682

llvm-svn: 343931
2018-10-07 06:57:25 +00:00
Alex Bradbury 47afe5e7c0 [RISCV] Introduce alu8.ll and alu16.ll tests
These track the quality of generated code for simple arithmetic operations
that were legalised from non-native types.

llvm-svn: 343930
2018-10-07 06:53:46 +00:00
Lang Hames cd0e599096 [ORC] Consume unhandled errors in unit test.
This should fix the failures on the debug buildbots.

llvm-svn: 343929
2018-10-07 01:08:02 +00:00
Lang Hames 535448e08d [ORC] Add a 'remove' method to JITDylib to remove symbols.
Symbols can be removed provided that all are present in the JITDylib and none
are currently in the materializing state. On success all requested symbols are
removed. On failure an error is returned and no symbols are removed.

llvm-svn: 343928
2018-10-06 23:03:59 +00:00
Lang Hames cb5702c3fd [ORC] Pass symbol name to discard by const reference.
This saves some unnecessary atomic ref-counting operations.

llvm-svn: 343927
2018-10-06 23:02:06 +00:00
Simon Pilgrim 9fa1c66421 [X86] getFauxShuffleMask - Handle undef + sentinel values in subvector insertion
llvm-svn: 343926
2018-10-06 22:13:44 +00:00
Simon Pilgrim 0dcf1cea03 [X86][SSE] Add SSE41 vector int2fp tests
llvm-svn: 343925
2018-10-06 20:24:27 +00:00
Simon Pilgrim a30e8d23e2 [X86][AVX] Ensure resolveTargetShuffleInputs shuffle masks are the correct width
Don't handle ZERO_EXTEND style shuffles until we support bitcasts. Found by inspection.

llvm-svn: 343924
2018-10-06 17:18:41 +00:00
Marshall Clow b9f72a5a60 Papers and Issues for San Diego
llvm-svn: 343923
2018-10-06 15:07:03 +00:00
Simon Pilgrim 62d199f4e5 [X86] combinePMULDQ - add op back to worklist if SimplifyDemandedBits succeeds on either operand
Prevents missing other simplifications that may occur deep in the operand chain where CommitTargetLoweringOpt won't add the PMULDQ back to the worklist itself

llvm-svn: 343922
2018-10-06 14:51:14 +00:00
Simon Pilgrim 944c530563 [X86] Regenerate LSR loop iteration test
llvm-svn: 343921
2018-10-06 14:26:38 +00:00
Sanjay Patel 891be5af90 [x86] add test for masked store with extra shift op; NFC
llvm-svn: 343920
2018-10-06 14:11:05 +00:00
Simon Pilgrim 0cc0a24b55 [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - simplify PSHUFB masks
Attempt to simplify PSHUFB masks (even non-constant ones) - we should probably be able to simplify other variable shuffles as well as the need arises.

llvm-svn: 343919
2018-10-06 13:49:31 +00:00
Simon Pilgrim ae78d709b4 [X86] Use the SimplifyDemandedBits wrappers where possible. NFCI.
Leave the wrapper to handle TargetLowering::TargetLoweringOpt and CommitTargetLoweringOpt.

llvm-svn: 343918
2018-10-06 13:29:08 +00:00
Simon Pilgrim b616b809a3 Revert rL343916: Fix -Wmissing-braces warning. NFCI.
llvm-svn: 343917
2018-10-06 11:59:31 +00:00
Simon Pilgrim 2a6bfa0c30 Fix -Wmissing-braces warning. NFCI.
llvm-svn: 343916
2018-10-06 11:46:27 +00:00
Simon Pilgrim 96742556e4 Wdocumentation fix
llvm-svn: 343915
2018-10-06 11:12:59 +00:00
Simon Pilgrim 3773dc3711 Wdocumentation fix
llvm-svn: 343914
2018-10-06 11:09:15 +00:00
Simon Pilgrim 9c9c97bcf4 [SelectionDAG] Add SimplifyDemandedBits to SimplifyDemandedVectorElts simplification
This patch enables SimplifyDemandedBits to call SimplifyDemandedVectorElts in cases where the demanded bits mask covers entire elements of a bitcasted source vector.

There are a couple of cases here where simplification at a deeper level (such as through bitcasts) prevents further simplification - CommitTargetLoweringOpt only adds immediate uses/users back to the worklist when we might want to combine the original caller again to see what else it can simplify.

As well as that I had to disable handling of bool vector until SimplifyDemandedVectorElts better supports some of their opcodes (SETCC, shifts etc.).

Fixes PR39178

Differential Revision: https://reviews.llvm.org/D52935

llvm-svn: 343913
2018-10-06 10:20:04 +00:00
Fangrui Song 39f7b3967a [clangd] Remove unused headers from CodeComplete.cpp
queue is not used after index-provided completions' merge with those from Sema
USRGeneration.h is not used after introduction of getSymbolID

llvm-svn: 343912
2018-10-06 07:00:50 +00:00
Alex Bradbury 639df9e4c0 [RISCV] Compress addiw rd, x0, simm6 to c.li rd, simm6
A pattern was present for addi rd, x0, simm6 but not addiw which is
semantically identical when the source register is x0. This patch addresses
that, and the benefit can be seen in rv64c-aliases-valid.s.

llvm-svn: 343911
2018-10-06 06:09:46 +00:00
Tom Stellard 251ee083a3 AMDGPU: Consolidate SMRD TableGen patterns
Summary:
Merge the SMRD patterns for CI into the same multiclass as the
patterns for other sub-targets.

This removes some duplicate code and will make it easier for some
future GlobalISel changes I would like to do.

Reviewers: arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D52557

llvm-svn: 343909
2018-10-06 03:32:43 +00:00
Aaron Puchert b0a2a0cf7d Thread safety analysis: Handle conditional expression in getTrylockCallExpr
Summary:
We unwrap conditional expressions containing try-lock functions.

Additionally we don't acquire on conditional expression branches, since
that is usually not helpful. When joining the branches we would almost
certainly get a warning then.

Hopefully fixes an issue that was raised in D52398.

Reviewers: aaron.ballman, delesley, hokein

Reviewed By: aaron.ballman

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D52888

llvm-svn: 343902
2018-10-06 01:09:28 +00:00
Jordan Rupprecht 34c0e470ae [llvm-ar] Use POSIX-specified timestamps for 'tv'.
Summary:
The POSIX spec says:

```
If the −t option is used with the −v option, the standard output format shall be:
"%s %u/%u %u %s %d %d:%d %d %s\n", <member mode>, <user ID>,
<group ID>, <number of bytes in member>,
<abbreviated month>, <day-of-month>, <hour>,
<minute>, <year>, <file>

where:

...
<abbreviated month>
Equivalent to the format of the %b conversion specification format in date.
<day-of-month>
Equivalent to the format of the %e conversion specification format in date.
<hour> Equivalent to the format of the %H conversion specification format in date.
<minute> Equivalent to the format of the %M conversion specification format in date.
<year> Equivalent to the format of the %Y conversion specification format in date.
```

This actually used to be the format printed by llvm-ar. It was apparently accidentally changed (see r207385 followed by comments in r207387). This makes it conform to GNU ar for easier replacement.

Reviewers: MaskRay

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D52940

llvm-svn: 343901
2018-10-05 23:25:39 +00:00
Vedant Kumar 4b36f7911d Add support for artificial tail call frames
This patch teaches lldb to detect when there are missing frames in a
backtrace due to a sequence of tail calls, and to fill in the backtrace
with artificial tail call frames when this happens. This is only done
when the execution history can be determined from the call graph and
from the return PC addresses of calls on the stack. Ambiguous sequences
of tail calls (e.g anything involving tail calls and recursion) are
detected and ignored.

Depends on D49887.

Differential Revision: https://reviews.llvm.org/D50478

llvm-svn: 343900
2018-10-05 23:23:15 +00:00
Vedant Kumar 9d9c965544 Relax a data formatter test
Before inspecting the contents of a list, make sure that we've stepped
past the push_back() that inserts the element we're interested in.

llvm-svn: 343899
2018-10-05 23:14:13 +00:00
Fedor Sergeev 884e52a7d2 [New PM][PassTiming] implement -time-passes for the new pass manager
Enable time-passes functionality through PassInstrumentation callbacks
for passes and analyses.

TimePassesHandler class keeps all the callbacks, the timing data as it
is being collected as well as the stack of currently active timers.

Parts of the fix that might be somewhat unobvious:
  - mapping of passes into Timer (TimingData) can not be done per-instance.
    PassID name provided into the callback is common for all the pass invocations.
    Thus the only way to get a timing with reasonable granularity is to collect
    timing data per pass invocation, getting a new timer for each BeforePass.
    Hence the key for TimingData uses a pair of <StringRef/unsigned count> to
    uniquely identify a pass invocation.

  - consequently, this new-pass-manager implementation performs no aggregation
    of timing data, reporting timings for each pass invocation separately.
    In that it differs from legacy-pass-manager time-passes implementation that
    reports timing data aggregated per pass instance.

  - pass managers and adaptors are not tracked, similar to how pass managers are
    not tracked in legacy time-passes.

  - TimerStack tracks timers that are active, each BeforePass pushes the new timer
    on stack, each AfterPass pops active timer from stack and stops it.

Reviewers: chandlerc, philip.pfaffe
Differential Revision: https://reviews.llvm.org/D51276

llvm-svn: 343898
2018-10-05 22:32:01 +00:00
Joel Jones 0a6c000c16 [AArch64] -mcpu=native CPU detection for Cavium processors
This small patch updates the CPU detection for Cavium processors when
-mcpu=native is passed on compile-line.

Patch by Stefan Teleman
Differential Revision: https://reviews.llvm.org/D51939

llvm-svn: 343897
2018-10-05 22:23:21 +00:00
Petr Hosek 227f25420a [llvm-nm] Update all tests to redirect stderr to stdout
This addresses the breakage introduced in r343887.

llvm-svn: 343896
2018-10-05 22:16:37 +00:00
Matthias Braun 81578e9f77 X86, AArch64, ARM: Do not attach debug location to spill/reload instructions
This rebases and recommits r343520. hwasan should be fixed now and this
shouldn't break the tests anymore.

Spill/reload instructions are artificially generated by the compiler and
have no relation to the original source code. So the best thing to do is
not attach any debug location to them (instead of just taking the next
debug location we find on following instructions).

Differential Revision: https://reviews.llvm.org/D52125

llvm-svn: 343895
2018-10-05 22:00:13 +00:00