Commit Graph

548 Commits

Author SHA1 Message Date
Rui Ueyama 5cd9c6bcd8 Support RISC-V
Patch by PkmX.

This patch makes lld recognize RISC-V target and implements basic
relocation for RV32/RV64 (and RVC). This should be necessary for static
linking ELF applications.

The ABI documentation for RISC-V can be found at:
https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md.
Note that the documentation is far from complete so we had to figure out
some details from bfd.

The patch should be pretty straightforward. Some highlights:

 - A new relocation Expr R_RISCV_PC_INDIRECT is added. This is needed as
   the low part of a PC-relative relocation is linked to the corresponding
   high part (auipc), see:
   https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#pc-relative-symbol-addresses

 - LLVM's MC support for RISC-V is very incomplete (we are working on
   this), so tests are given in objectyaml format with the original
   assembly included in the comments. Once we have complete support for
   RISC-V in MC, we can switch to llvm-as/llvm-objdump.

 - We don't support linker relaxation for now as it requires greater
   changes to lld that is beyond the scope of this patch. Once this is
   accepted we can start to work on adding relaxation to lld.

Differential Revision: https://reviews.llvm.org/D39322

llvm-svn: 339364
2018-08-09 17:59:56 +00:00
Sterling Augustine 4fd84c18df Implement framework for linking split-stack object files, and x86_64 support.
llvm-svn: 337332
2018-07-17 23:16:02 +00:00
George Rimar 03b0a4856f [ELF] - Cleanup error reporting code and cover with the test. NFC.
We have the following code that is uncovered with the test:
https://github.com/llvm-mirror/lld/blob/master/ELF/Target.cpp#L95

This patch:
1) Removes "!IS" check. Because at that point of execution
(we are reolving the relocations during writing output)
we should only have InputSection type of the sections in the vector.
(because we already converted MergeInputSection in mergeSections()
and combined EhInputSections in combineEhFrameSections()).

2) Covers the "!IS->getParent()" with the test.

llvm-svn: 336106
2018-07-02 14:13:11 +00:00
Sid Manning 95b0c2e1e3 Add Hexagon Support
Differential Revision: https://reviews.llvm.org/D47791

llvm-svn: 334637
2018-06-13 18:45:25 +00:00
George Rimar 89481f363a [ELF] - Teach LLD to hint about -fdebug-types-section.
Patch teaches LLD to hint user about -fdebug-types-section flag
if relocation overflow happens in debug section.

Differential revision: https://reviews.llvm.org/D40954

llvm-svn: 328081
2018-03-21 09:19:34 +00:00
Rafael Espindola bb3198949f Use dyn_cast instead of dyn_cast_or_null.
There should be no null sections in InputSections.

llvm-svn: 321219
2017-12-20 20:46:08 +00:00
Rui Ueyama f52496e1e0 Rename SymbolBody -> Symbol
Now that we have only SymbolBody as the symbol class. So, "SymbolBody"
is a bit strange name now. This is a mechanical change generated by

  perl -i -pe s/SymbolBody/Symbol/g $(git grep -l SymbolBody lld/ELF lld/COFF)

nd clang-format-diff.

Differential Revision: https://reviews.llvm.org/D39459

llvm-svn: 317370
2017-11-03 21:21:47 +00:00
Peter Smith 75030b6d56 [ELF] Introduce range extension thunks for ARM
This change adds initial support for range extension thunks. All thunks must
be created within the first pass so some corner cases are not supported. A
follow up patch will add support for multiple passes.

With this change the existing tests arm-branch-error.s and
arm-thumb-branch-error.s now no longer fail with an out of range branch.
These have been renamed and tests added for the range extension thunk.

Differential Revision: https://reviews.llvm.org/D34691

llvm-svn: 316752
2017-10-27 09:04:11 +00:00
Bob Haarman b8a59c8aa5 [lld] unified COFF and ELF error handling on new Common/ErrorHandler
Summary:
The COFF linker and the ELF linker have long had similar but separate
Error.h and Error.cpp files to implement error handling. This change
introduces new error handling code in Common/ErrorHandler.h, changes the
COFF and ELF linkers to use it, and removes the old, separate
implementations.

Reviewers: ruiu

Reviewed By: ruiu

Subscribers: smeenai, jyknight, emaste, sdardis, nemanjai, nhaehnle, mgorny, javed.absar, kbarton, fedor.sergeev, llvm-commits

Differential Revision: https://reviews.llvm.org/D39259

llvm-svn: 316624
2017-10-25 22:28:38 +00:00
Rui Ueyama 67533a2cb3 Define RelType to represent relocation types.
We were using uint32_t as the type of relocation kind. It has a
readability issue because what Type really means in `uint32_t Type`
is not obvious. It could be a section type, a symbol type or a
relocation type.

Since we do not do any arithemetic operations on relocation types
(e.g. adding one to R_X86_64_PC32 doesn't make sense), it would be
more natural if they are represented as enums. Unfortunately, that
is not doable because relocation type definitions are spread into
multiple header files.

So I decided to use typedef. This still should be better than the
plain uint32_t because the intended type is now obvious.

llvm-svn: 315525
2017-10-11 22:49:24 +00:00
James Henderson b5ca92ef73 [ELF] Set Dot initially to --image-base value when using linker scripts
When parsing linker scripts, LLD previously started with a '.' value of 0,
regardless of the internal default image base for the target, and regardless of
switches such as --image-base. It seems reasonable to use a different image base
value when using linker scripts and --image-base is specified, since otherwise the
switch has no effect. This change does this, as well as removing unnecessary
initialisation of Dot where it is not used.

The default image base should not be used when processing linker
scripts, because this will change the behaviour for existing linker script users,
and potentially result in invalid output being produced, as a subsequent assignment
to Dot could move the location counter backwards. Instead, we maintain the existing
behaviour of starting from 0 if --image-base is not specified.

Reviewers: ruiu

Differential Revision: https://reviews.llvm.org/D38360

llvm-svn: 315293
2017-10-10 10:09:35 +00:00
Peter Smith a49442f323 [ELF] Introduce target specific inBranchRange() function
In preparation for range extension thunks introduce a function that will
check whether a branch identified by a relocation type at a source address
can reach a destination.

For targets where range extension thunks are not supported the function will
return true as it is not expected that branches are out of range. An
implementation has been provided for ARM.

Differential Revision: https://reviews.llvm.org/D34690

llvm-svn: 308188
2017-07-17 16:54:29 +00:00
Rui Ueyama 0cc1483562 Add basic 64-bit SPARC support
Add support for the most common SPARC relocations.
Make DT_PLTGOT point to the PLT on SPARC.
Mark the PLT as executable on SPARC.

This adds a basic test that creates a SPARV9 executable
that invokes the exit system call on OpenBSD.

Patch by Mark Kettenis.

Differential Revision: https://reviews.llvm.org/D34618

llvm-svn: 306565
2017-06-28 17:05:39 +00:00
Rui Ueyama e145bc22fd Do not use make<> to allocate TargetInfo. NFC.
llvm-svn: 305577
2017-06-16 20:15:03 +00:00
Rui Ueyama 21c0a9ceeb Split Target.cpp into small files.
Target.cpp contains code for all the targets that LLD supports. It was
simple and easy, but as the number of supported targets increased,
it got messy.

This patch splits the file into per-target files under ELF/arch directory.

Differential Revision: https://reviews.llvm.org/D34222

llvm-svn: 305565
2017-06-16 17:32:43 +00:00
Leslie Zhai 49ba795d15 [ELF] Initial migration of AVR target
Reviewers: ruiu, rafael, grimar, atanasyan, psmith, dylanmckay

Reviewed By: ruiu, rafael, grimar, dylanmckay

Differential Revision: https://reviews.llvm.org/D32991

llvm-svn: 305444
2017-06-15 02:27:50 +00:00
Rafael Espindola 07c8741644 Relax the overflow checking of R_386_PC16.
Currently the freebsd early boot code fails to link. The issue reduces
to 16 bit code at position 0x7000 wanting to jump to position
0x9000. That is represented in the .o file as a relocation with no
symbol and an addend of 0x9000 - 2 (The -2 is because i386 uses the ip
after the current instruction for jumps).

If the addend is interpreted as signed (it should), it is -28674. In a
32 bit architecture, that is the address 0xffff8ffe. To get there from
0x7000 we have to add 4294909950 (too big) or subtract 57346 (too
small). We then produce an error.

What lld is missing is the fact that at runtime this will actually be
a 16 bit architecture and adding 0x1ffe produces 0x8ffe which is the
correct result in 16 bits (-28674).

Since we have a 16 bit addend and a 16 bit PC, the relocation can move
the PC to any 16 bit address and that is the only thing we really need
to check: if the address we are pointing to fits in 16 bits. This is
unfortunately hard to do since we have to delay subtracting the PC and
if we want to do that outside of Target.cpp, we have to move the
overflow check out too.  An incomplete patch that tries to do that is
at https://reviews.llvm.org/D34070

This patch instead just relaxes the check. Since the value we have is
the destination minus the PC and the PC is 16 bits, it should fit in
17 bits if the destination fits in 16 too.

bfd had a similar issue for some time and got a similar fix:
https://sourceware.org/ml/binutils/2005-08/msg00001.html

llvm-svn: 305135
2017-06-10 01:56:58 +00:00
Rui Ueyama 38a2841665 Use LLVM_FALLTHROUGH.
llvm-svn: 305010
2017-06-08 20:16:21 +00:00
Zachary Turner 264b5d9e88 Move Object format code to lib/BinaryFormat.
This creates a new library called BinaryFormat that has all of
the headers from llvm/Support containing structure and layout
definitions for various types of binary formats like dwarf, coff,
elf, etc as well as the code for identifying a file from its
magic.

Differential Revision: https://reviews.llvm.org/D33843

llvm-svn: 304864
2017-06-07 03:48:56 +00:00
Rafael Espindola db5e56f7b2 Store a single Parent pointer for InputSectionBase.
Before InputSectionBase had an OutputSection pointer, but that was not
always valid. For example, if it was a merge section one actually had
to look at MergeSec->OutSec.

This was brittle and caused bugs like the one fixed by r304260.

We now have a single Parent pointer that points to an OutputSection
for InputSection, but to a SyntheticSection for merge sections and
.eh_frame. This makes it impossible to accidentally access an invalid
OutSec.

llvm-svn: 304338
2017-05-31 20:17:44 +00:00
Peter Smith d54f368e6a [ELF] Support R_ARM_SBREL32 Relocation
This change adds support for the R_ARM_SBREL32 relocation. The relocation
is a base relative relocation that is produced by clang/llvm when -frwpi
is used. The use case for the -frwpi option is position independent data
for embedded systems that do not have a GOT. With -frwpi all data is
accessed via an offset from a base register (usually r9), where r9 is set
at run time to where the data has been loaded. The base of the data is
known as the static base.

The ARM ABI defines the static base as:
B(S) is the addressing origin of the output segment defining the symbol S.
The origin is not required to be the base address of the segment. For
simplicity we choose to use the base address of the segment.

The ARM procedure call standard only defines a read write variant using
R_ARM_SBREL32 relocations. The read-only data is accessed via pc-relative
offsets from the code, this is implemented in clang as -fropi.

Fixes PR32924

Differential Revision: https://reviews.llvm.org/D33280

llvm-svn: 303337
2017-05-18 09:12:21 +00:00
George Rimar 390242d0e9 [ELF] - Detemplate elf::addSyntheticLocal(). NFC.
llvm-svn: 303155
2017-05-16 10:11:36 +00:00
George Rimar b4081bb0ab [ELF] - Stop support of DF_STATIC_TLS flag.
This reverts changes introduced in r302414 "[ELF] - Set DF_STATIC_TLS flag for i386 target."

Because DF_STATIC_TLS does not look to be used by glibc or anything else.

llvm-svn: 302884
2017-05-12 08:04:58 +00:00
George Rimar 6f586731c5 [ELF] - Don't allow R_X86_64_TPOFF32 dynamic relocation when linking PIC
Both gold and bfd restrict that one:

ld.bfd: test.o: relocation R_X86_64_TPOFF32 against `var' can not be 
used when making a shared object; recompile with -fPIC
ld.gold: error: test.o: unsupported reloc 23 against global symbol var

What looks reasonable because it is 32 bit one. Patch do the same.

Differential revision: https://reviews.llvm.org/D33100

llvm-svn: 302881
2017-05-12 07:19:11 +00:00
Rafael Espindola 88ab9fb163 Detemplate the got.
This is a bit hackish, but allows for a lot of followup cleanups.

llvm-svn: 302845
2017-05-11 23:26:03 +00:00
Rafael Espindola 5ab1989584 Reduce templating. NFC.
llvm-svn: 302843
2017-05-11 23:16:43 +00:00
Rafael Espindola 895aea6d15 Reduce template usage. NFC.
llvm-svn: 302832
2017-05-11 22:02:41 +00:00
Rafael Espindola 4b1c3696e3 Reduce template usage. NFC.
llvm-svn: 302826
2017-05-11 21:23:38 +00:00
George Rimar 4388b071bf [ELF] - Use LLVM_FALLTHROUGH in code.
When compiling LLD using GCC 7 it reports warnings like:
"warning: this statement may fall through [-Wimplicit-fallthrough=]"

LLVM has LLVM_FALLTHROUGH macro which can be used to avoid such warnings.
Together with D33036 this patch fixes them.

Differential revision: https://reviews.llvm.org/D32907

llvm-svn: 302666
2017-05-10 14:19:59 +00:00
George Rimar 1564122b05 [ELF] - Set DF_STATIC_TLS flag for i386 target.
This is PR32437.

DF_STATIC_TLS
If set in a shared object or executable, this flag instructs the 
dynamic linker to reject attempts to load this file dynamically. 
It indicates that the shared object or executable contains code 
using a static thread-local storage scheme. Implementations need 
not support any form of thread-local storage.

Patch checks if IE/LE relocations were used to check if code uses
static model. If so it sets the DF_STATIC_TLS flag.

Differential revision: https://reviews.llvm.org/D32354

llvm-svn: 302414
2017-05-08 10:24:38 +00:00
Rafael Espindola 81273c721c Remove isTlsLocalDynamicRel and isTlsInitialExecRel.
This feels a bit hackish, but I think it is still an improvement.

The way a tls address is computed in the various architectures is not
that different. For example, for local dynamic we need the base of the
tls (R_TLSLD or R_TLSLD_PC), and the offset of that particular symbol
(R_ABS).

Given the similarity, we can just use the expressions instead of
having two additional target hooks.

llvm-svn: 302279
2017-05-05 20:25:54 +00:00
Joel Jones 93340741b8 Remove _NC suffix from ELF relocations TLSDESC_{LD64,ADD}_LO12
llvm-svn: 301979
2017-05-02 22:01:30 +00:00
Rafael Espindola a0f30da62e Revert "Fix misnamed #include. Remove _NC suffix from ELF relocations TLSDESC_{LD64,ADD}_LO12"
This reverts commit r301964. It broke the build.

llvm-svn: 301969
2017-05-02 20:19:42 +00:00
Joel Jones f387eb62b9 Fix misnamed #include. Remove _NC suffix from ELF relocations TLSDESC_{LD64,ADD}_LO12
llvm-svn: 301964
2017-05-02 19:31:40 +00:00
George Rimar 3505716d72 [ELF] - Remove dead TLS relocations relative code for MIPS and ARM
This code was not used because of
handleARMTlsRelocation and handleMipsTlsRelocation methods that are called
for these platforms instead of regular TLS code.

Differential revision: https://reviews.llvm.org/D32355

llvm-svn: 301414
2017-04-26 14:48:36 +00:00
Shoaib Meenai b573b4b04d [ELF] Account for R_386_TLS_LDO_32 addend
This relocation type has an implicit addend. Account for it when
processing the relocation. Add an offset to an existing test to ensure
it gets processed correctly.

Fixes PR32634.

Differential Revision: https://reviews.llvm.org/D32336

llvm-svn: 301207
2017-04-24 18:02:11 +00:00
Peter Smith 4dc4bc4e3c [ELF] Tidy up handleARMTlsRelocation [NFC]
Replace addModuleReloc with AddTlsReloc so that we can use it for both the
module relocation and the offset relocation.

Differential Revision: https://reviews.llvm.org/D31751

llvm-svn: 300192
2017-04-13 10:56:40 +00:00
George Rimar e7bf968803 [ELF] - Stop producing broken output for R_386_GOT32[X] relocations.
Previously we silently produced broken output for R_386_GOT32X/R_386_GOT32 
relocations if they were used to compute the address of the symbol’s global
offset table entry without base register when position-independent code is disabled.

Situation happened because of recent ABI changes. Released ABI mentions that
R_386_GOT32X can be calculated in a two different ways (so we did not follow ABI here 
before this patch), but draft ABI also mentions R_386_GOT32 relocation here. 
We should use the same calculations for both relocations.

Problem is that we always calculated them as G + A - GOT (offset from end of GOT),
but for case when PIC is disabled, according to i386 ABI calculation should be G + A,
what should produce just an address in GOT finally.

ABI: https://github.com/hjl-tools/x86-psABI/wiki/intel386-psABI-draft.pdf (p36, p60).
llvm-svn: 299812
2017-04-08 06:14:14 +00:00
James Henderson 9d9a663731 [ELF] Recommit r299635 to pad x86 executable sections with 0xcc
This follows r299748 which fixed a latent bug the original commit exposed.

llvm-svn: 299755
2017-04-07 10:36:42 +00:00
James Henderson d983180778 Revert r299635 because it exposed a latent bug.
llvm-svn: 299655
2017-04-06 15:22:58 +00:00
James Henderson 8dd4c06a77 [ELF] Pad x86 executable sections with 0xcc int3 instructions
Executable sections should not be padded with zero by default. On some
architectures, 0x00 is the start of a valid instruction sequence, so can confuse
disassembly between InputSections (and indeed the start of the next InputSection
in some situations). Further, in the case of misjumps into padding, padding may
start to be executed silently.

On x86, the "0xcc" byte represents the int3 trap instruction. It is a single
byte long so can serve well as padding. This change switches x86 (and x86_64) to
use this value for padding in executable sections, if no linker script directive
overrides it. It also puts the behaviour into place making it easy to change the
behaviour of other targets when desired. I do not know the relevant instruction
sequences for trap instructions on other targets however, so somebody should add
this separately.

Because the old behaviour simply wrote padding in the whole section before
overwriting most of it, this change also modifies the padding algorithm to write
padding only where needed. This in turn has caused a small behaviour change with
regards to what values are written via Fill commands in linker scripts, bringing
it into line with ld.bfd. The fill value is now written starting from the end of
the previous block, which means that it always starts from the first byte of the
fill, whereas the old behaviour meant that the padding sometimes started mid-way
through the fill value. See the test changes for more details.

Reviewed by: ruiu

Differential Revision: https://reviews.llvm.org/D30886

Bugzilla: http://bugs.llvm.org/show_bug.cgi?id=32227
llvm-svn: 299635
2017-04-06 09:29:08 +00:00
Rui Ueyama c2a49bf95c Remove Target::isTlsGlobalDynamicRel()
Relocations are abstracted as platform-independent R_TLS_* relocations,
so we don't need to check platform-specific ones to see if a relocation
is TLS GD.

llvm-svn: 299614
2017-04-06 03:30:32 +00:00
Rui Ueyama 03fc8d1e0d Fix comments.
llvm-svn: 299579
2017-04-05 19:20:54 +00:00
Rui Ueyama 42e0bb5e4f Do not use relocateOne() to just write 32-bit words.
llvm-svn: 299559
2017-04-05 16:33:44 +00:00
Rui Ueyama 69bfab0b38 Rename GotEntryAddr -> GotPltEntryAddr.
Because they are addresses in .got.plt and not in .got.

llvm-svn: 299556
2017-04-05 16:15:59 +00:00
Rui Ueyama 9c766d7a39 Fix PLT and GOTPLT entries for 32-bit x86 PIC.
Previously, the code we set to our .plt entries expected that .got
and .got.plt are consecutive in the virtual address space.
Since %ebx points to the last entry of .got for position-independent
code, it assumed that .got is accessible with small negative
displacements and .got.plt are accessible with small positive
displacements.

That assumption was simply wrong. We don't impose any restrictions on
relative layout of .got and .got.plt. As a result, the control is
transferred to a bogus address from .plt at runtime, which resulted in
segfaults.

This patch removes that wrong assumption. We still assume that .got.plt
has a fixed relative address to .got, but we no longer assume that they
are consecutive in memory.

With this change, a "hello world" program compiled with -fPIC works.

Fixes https://bugs.llvm.org/show_bug.cgi?id=31332.

Differential Revision: https://reviews.llvm.org/D31682

llvm-svn: 299553
2017-04-05 16:01:33 +00:00
Rui Ueyama f7c2b0cb49 Remove a redundant local variable.
llvm-svn: 298796
2017-03-26 03:42:00 +00:00
Simon Atanasyan d34a3631b2 [ELF][MIPS] Calculate relocations agains _gp_disp / __gnu_local_gp using dedicated 'expressions'
The patch introduces two new relocations expressions R_MIPS_GOT_GP and
R_MIPS_GOT_GP_PC. The first one represents a current value of `_gp`
pointer and used to calculate relocations against the `__gnu_local_gp`
symbol. The second one represents the offset between the beginning of
the function and the `_gp` pointer's value.

There are two motivations for introducing new expressions:
- It's better to keep all non-trivial relocation calculations in the
  single place - `getRelocTargetVA` function.
- Relocations against both `_gp_disp` and `__gnu_local_gp` symbols
  depend on the `_gp` value. It's a magical value points to the "middle"
  of GOT. Now all relocations use a common `_gp` value. But in fact,
  under some conditions each input file might require its own `_gp`
  value. I'm going to implement it in the future patches. So it's
  better to make `MipsGotSection` responsible for calculation of
  the `_gp` value.

llvm-svn: 298306
2017-03-20 21:03:43 +00:00
Rui Ueyama d57e74b7d3 Compute Config member function return values only once.
We had a few Config member functions that returns configuration values.
For example, we had is64() which returns true if the target is 64-bit.
The return values of these functions are constant and never change.

This patch is to compute them only once to make it clear that they'll
never change.

llvm-svn: 298168
2017-03-17 23:29:01 +00:00
George Rimar f64618a621 [ELF] - Detemplate SymbolBody::getVA and SymbolBody::getPltVA. NFC.
llvm-svn: 298071
2017-03-17 11:56:54 +00:00