Commit Graph

393086 Commits

Author SHA1 Message Date
Alex Richardson 35c5e564e6 [ELF] Check the Elf_Rel addends for dynamic relocations
There used to be many cases where addends for Elf_Rel were not emitted in
the final object file (mostly when building for MIPS64 since the input .o
files use RELA but the output uses REL). These cases have been fixed since,
but this patch adds a check to ensure that the written values are correct.
It is based on a previous patch that I added to the CHERI fork of LLD since
we were using MIPS64 as a baseline. The work has now almost entirely
shifted to RISC-V and Arm Morello (which use Elf_Rela), but I thought
it would be useful to upstream our local changes anyway.

This patch adds a (hidden) command line flag --check-dynamic-relocations
that can be used to enable these checks. It is also on by default in
assertions builds for targets that handle all dynamic relocations kinds
that LLD can emit in Target::getImplicitAddend(). Currently this is
enabled for ARM, MIPS, and I386.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101450
2021-07-09 10:41:40 +01:00
Alex Richardson 6d87ca08ae [ELF] Refactor DynamicReloc to fix incorrect relocation addends
This patch changes the DynamicReloc class to store an enum instead
of the overloaded useSymVA member to make it easier to understand
and fix incorrect addends being written in some corner cases. The
change is motivated by a follow-up review that checks the value of
implicit Elf_Rel addends written to the output file.

This patch fixes an incorrect output when using `-z rela` for i386 files
with R_386_GOT32 relocations (not that this really matters since it's an
unsupported configuration).
Storing the relocation expression kind also addresses an incorrect addend
FIXME in ppc64-abs64-dyn.s introduced in D63383.

DynamicReloc now also has a special case for the MIPS TLS relocations
(DynamicReloc::AgainstSymbolWithTargetVA) since the
R_MIPS_TLS_TPREL{32/64} the symbol VA to the GOT for preemptible
symbols. I'm not sure if the symbol value actually should be written
for R_MIPS_TLS_TPREL32, but this patch does not attempt to change
that behaviour.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D100490
2021-07-09 10:41:40 +01:00
Tim Northover 0c39f82f0b [Support] reorder Threading includes to avoid conflict with FreeBSD headers
FreeBSD's condvar.h (included by user.h in Threading.inc) uses a "struct
thread" that conflicts with llvm::thread if both are visible when it's
included.

So this moves our #include after the FreeBSD code.
2021-07-09 10:39:52 +01:00
Dawid Jurczak 375694a07b Transform memset + malloc --> calloc (PR25892)
After this change DSE can eliminate malloc + memset and emit calloc.
It's https://reviews.llvm.org/D101440 follow-up.

Differential Revision: https://reviews.llvm.org/D103009
2021-07-09 11:01:12 +02:00
Bjorn Pettersson 1db2551cc1 [NewPM] Rename 'unswitch' to 'simple-loop-unswitch' in PassRegistry
It is confusing to have two ways of specifying the same pass
('simple-loop-unswitch' and 'unswitch'). This patch replaces
'unswitch' by 'simple-loop-unswitch' to get a unique identifier.

Using 'simple-loop-unswitch' instead of 'unswitch' also has the
advantage of matching how the pass is named in DEBUG_TYPE etc. So
this makes it a bit more consistent how we refer to the pass in
options such as -passes, -print-after and -debug-only.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D105628
2021-07-09 09:47:33 +02:00
Bjorn Pettersson 472462c472 [NewPM] Consistently use 'simplifycfg' rather than 'simplify-cfg'
There was an alias between 'simplifycfg' and 'simplify-cfg' in the
PassRegistry. That was the original reason for this patch, which
effectively removes the alias.

This patch also replaces all occurrances of 'simplify-cfg'
by 'simplifycfg'. Reason for choosing that form for the name is
that it matches the DEBUG_TYPE for the pass, and the legacy PM name
and also how it is spelled out in other passes such as
'loop-simplifycfg', and in other options such as
'simplifycfg-merge-cond-stores'.

I for some reason the name should be changed to 'simplify-cfg' in
the future, then I think such a renaming should be more widely done
and not only impacting the PassRegistry.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D105627
2021-07-09 09:47:03 +02:00
Bjorn Pettersson e24bb698bb [NewPM] Handle passes with params in -print-before/-print-after
To support options like -print-before=<pass> and -print-after=<pass>
the PassBuilder will register PassInstrumentation callbacks as well
as a mapping between internal pass class names and the pass names
used in those options (and other cmd line interfaces). But for
some reason all the passes that takes options where missing in those
maps, so for example "-print-after=loop-vectorize" didn't work.

This patch will add the missing entries by also taking care of
function and loop passes with params when setting up the class to
pass name maps.

One might notice that even with this patch it might be tricky to
know what pass name to use in options such as -print-after. This
because there only is a single mapping from class name to pass name,
while the PassRegistry currently is a bit messy as it sometimes
reuses the same class for different pass names (without using the
"pass with params" scheme, or the pass-name<variant> syntax).

It gets extra messy in some situations. For example the
MemorySanitizerPass can run like this (with debug and print-after)
  opt -passes='kmsan' -print-after=msan-module -debug-only=msan
The 'kmsan' alias for 'msan<kernel>' is just confusing as one might
think that 'kmsan' is a separate pass (but the DEBUG_TYPE is still
just 'msan'). And since the module pass version of the pass adds
a mapping from 'MemorySanitizerPass' to 'msan-module' one need to
use 'msan-module' in the print-before and print-after options.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D105006
2021-07-09 09:27:37 +02:00
jacquesguan 88326bbce3 [RISCV][clang] Add macro __riscv_zvlsseg for RVV Zvlsseg builtins
Add extension macro __riscv_zvlsseg to enable Zvlsseg builtins only
with target feature Zvlsseg.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D105626
2021-07-09 13:18:42 +08:00
Haruki Imai 62cc3cdda6 [CMake] Disable -fno-semantic-interposition for GCC<10.3 on SystemZ
`-fno-semantic-interposition` was added for GCC in D102453, but some MLIR tests
on SystemZ failed with GCC<10.3 due to a bug.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D105453
2021-07-08 22:09:21 -07:00
Kai Luo 55bd12d4b7 [PowerPC] Remove implicit use register after transformToImmFormFedByLI()
When the instruction has imm form and fed by LI, we can remove the redundat LI instruction.
Below is an example:
```
    renamable $x5 = LI8 2
    renamable $x4 = exact SRD killed renamable $x4, killed renamable $r5, implicit $x5
```

will be converted to:
```
   renamable $x5 = LI8 2
   renamable $x4 = exact RLDICL killed renamable $x4, 62, 2,  implicit killed $x5
```

But when we do this optimization, we forget to remove implicit killed $x5
This bug has caused a lnt case error. This patch is to fix above bug.

Reviewed By: #powerpc, shchenz

Differential Revision: https://reviews.llvm.org/D85288
2021-07-09 04:42:54 +00:00
Eric Christopher 5553d83ada Update Bazel overlay in GPUToGPURuntimeTransforms. 2021-07-08 21:39:26 -07:00
Muhammad Omair Javaid 932e3d9960 Revert "GlobalISel/AArch64: don't optimize away redundant branches at -O0"
This reverts commit 458c230b5e.

This broke LLDB buildbot testcase where breakpoint set at start of loop
failed to hit. https://lab.llvm.org/buildbot/#/builders/96/builds/9404

https://github.com/llvm/llvm-project/blob/main/lldb/test/API/commands/process/attach/main.cpp#L15

Differential Revision: https://reviews.llvm.org/D105238
2021-07-09 08:23:36 +05:00
Reshabh Sharma 2e194dec60 [ASan][AMDGPU] Make shadow offset match X86 on Linux
This patch explicitly sets the shadow offset for
AMDGPU to match that of X86 on Linux.

Reviewed By: vitalybuka

https://reviews.llvm.org/D105282
2021-07-09 07:48:03 +05:30
Ben Shi ed102ce20a [RISCV][test] Add new tests for mul optimization in the zba extension with SH*ADD
This patch will show the following optimization by future patches.

(mul x imm) -> (SH1ADD x, (SLLI x, bits)) when imm = 2^n + 2.
(mul x imm) -> (SH2ADD x, (SLLI x, bits)) when imm = 2^n + 4.
(mul x imm) -> (SH3ADD x, (SLLI x, bits)) when imm = 2^n + 8.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D105614
2021-07-09 09:48:23 +08:00
Mehdi Amini 38451fa178 Revert "[mlir][sparse] Add Merger unit tests"
This reverts commit 0d0cff3ace.

The build is broken with GCC 5.4
2021-07-09 01:43:19 +00:00
Eli Friedman 009436e9c1 [NFC][ScalarEvolution] Cleanup howManyLessThans.
In preparation for D104075. Some NFC cleanup, and some test coverage for
planned changes.
2021-07-08 17:56:26 -07:00
Chia-hung Duan 70eb3bfff0 [mlir-reduce] Fix the grammer in the doc
Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105623
2021-07-09 08:01:35 +08:00
Kevin Athey 1dc005aa7d Add documentation for -fsanitize-address-use-after-return.
for issue: https://github.com/google/sanitizers/issues/1394

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D104155
2021-07-08 16:44:08 -07:00
Yuanfang Chen 0eb2b13d60 Add AddDiscriminatorsPass to NPM default O0 pipeline
AddDiscriminatorsPass is in Legacy PM's O0 pipeline. This patch did the same
for NPM O0 pipeline.

Reviewed By: aeubanks, MaskRay

Differential Revision: https://reviews.llvm.org/D105650
2021-07-08 16:37:20 -07:00
Gus Smith 0d0cff3ace [mlir][sparse] Add Merger unit tests
We opt to use unit tests rather than check tests as the lattice/merger code is a small C++ component with a well-defined API. Testing this API via check tests would be far less direct and readable. In addition, as the check tests will only be able to test the API indirectly, the tests may break based on unrelated changes; e.g. changes in linalg.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D104956
2021-07-08 23:10:33 +00:00
Stanislav Mekhanoshin e5b0fe1b83 [AMDGPU] Mark more SOP instructions as rematerializable
The rest of the SOP instructions implicitly set SCC and not
suitable for the rematerialization.

Differential Revision: https://reviews.llvm.org/D105670
2021-07-08 16:00:45 -07:00
Craig Topper 631516301e [ARM] Pass 2 instead of 0 to PHINode::Create in MVEGatherScatterLowering. NFC
This parameter controls how much space is reserved for incoming
values. There are always going to be 2 incoming values in this case.

While there remove the unused std::vector right below.

Found while looking at porting this code to RISCV.
2021-07-08 15:59:33 -07:00
Yi Zhang 7c35aae35b Mark TensorDialect legal and PadTensor op illegal
`GeneralizePadTensorOpPattern` might generate `tensor.dim` op so the
TensorDialect should be marked legal. This pattern should also
transform all `linalg.pad_tensor` ops so mark those as illegal. Those
changes are missed from a previous change in
https://reviews.llvm.org/D105293

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D105642
2021-07-08 15:02:22 -07:00
Thomas Lively 3dd75f5371 [WebAssembly] Scalarize extract_vector_elt of binops
Override the `shouldScalarizeBinop` target lowering hook using the same
implementation used in the x86 backend. This causes `extract_vector_elt`s of
vector binary ops to be scalarized if the scalarized version would be supported.

Differential Revision: https://reviews.llvm.org/D105646
2021-07-08 14:31:53 -07:00
David Green e2bc88f175 [ARM] Extra v8i16 -> i64 reduction tests with loads. NFC 2021-07-08 22:27:23 +01:00
Alexey Bataev 8af69975af [InstCombine][NFC]Use only `replaceInstUsesWith`, NFC. 2021-07-08 13:58:30 -07:00
Rob Suderman 82563d8d14 [mlir][bazel] Added missing MathDialect dep to LinalgOps target
LinalgOps needs MathDialect as a dependency for it to build correctly.

Differential Revision: https://reviews.llvm.org/D105656
2021-07-08 13:47:42 -07:00
David Blaikie c9a0e74697 Revert "PR51018: Disallow explicit construction of StringRef from SmallString due to ambiguity in C++23"
This reverts commit e2d3084632.

MSVC doesn't seem to resolve the intended ambiguity in implicit
conversion contexts correctly: https://godbolt.org/z/ee16aqv4v
2021-07-08 13:46:36 -07:00
David Blaikie e2d3084632 PR51018: Disallow explicit construction of StringRef from SmallString due to ambiguity in C++23
See bug for full details, but basically there's an upcoming ambiguity in
the conversion in `StringRef(SomeSmallString)` - either the implicit
conversion operator (SmallString::operator StringRef) could be used, or
the std::string_view range-based ctor (& then `StringRef(std::string_view)`
would be used)

To address this, make such a conversion invalid up-front - most uses are
more tersely written as `SomeSmallString.str()` anyway, or more clearly
written as `StringRef x = y;` rather than `StringRef x(y);` - so if you
hit this in out-of-tree code, please update in one of those ways.
Hopefully I've fixed everything in tree prior to this patch landing.
2021-07-08 13:37:57 -07:00
David Blaikie 1def2579e1 PR51018: Remove explicit conversions from SmallString to StringRef to future-proof against C++23
C++23 will make these conversions ambiguous - so fix them to make the
codebase forward-compatible with C++23 (& a follow-up change I've made
will make this ambiguous/invalid even in <C++23 so we don't regress
this & it generally improves the code anyway)
2021-07-08 13:37:57 -07:00
Leonard Chan a7992b43a5 [NFC][compiler-rt][fuchsia] Add InitShadowBounds declaration to header
Forgot to include this as a part of
a11aea68a4.
2021-07-08 13:19:17 -07:00
Mitch Phillips d458f37932 [GWP-ASan] Change unreachable -> trap to work around DCE bug.
trapOnAddress is designed to SEGV on a specific address. Unfortunately,
with an IR change, __builtin_unreachable() ends up doing DCE on things
that have side effects, like the load that causes the trap.

Change to __builtin_trap() to avoid the optimisation.

Root cause is still an LLVM bug, and tracked in
https://bugs.llvm.org/show_bug.cgi?id=47480.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105654
2021-07-08 13:06:42 -07:00
Vitaly Buka 915e07605c [msan] Handle funnel shifts
Fixes https://bugs.llvm.org/show_bug.cgi?id=50840

Differential Revision: https://reviews.llvm.org/D105387
2021-07-08 12:49:49 -07:00
Vitaly Buka ccc6f487d8 [msan] Add funel shift tests
For https://bugs.llvm.org/show_bug.cgi?id=50840
2021-07-08 12:49:49 -07:00
Alexey Bataev c574d2fbac [SLP]Improve vectorization of stores.
Patch tries to improve the vectorization of stores. Originally, we just
check the type and the base pointer of the store.
Patch adds some extra checks to avoid non-profitable vectorization
cases. It includes analysis of the scalar values to be stored and
triggers the vectorization attempt only if the scalar values have
same/alt opcode and are from same basic block, i.e. we don't end up
immediately with the gather node, which is not profitable.
This also improves compile time by filtering out non-profitable cases.

Part of D57059.

Differential Revision: https://reviews.llvm.org/D104122
2021-07-08 12:35:39 -07:00
Nikita Popov a0ea367562 [CodeGen] Avoid nullptr arg to CreateStructGEP (NFC)
For now just make the getPointerElementType() explicit.
2021-07-08 21:21:43 +02:00
Nikita Popov 9e225a2a71 [AMDGPU] Simplify GEP construction (NFC)
Noticed while making a related change. This code was doing
something really peculiar: Creating an APInt by parsing a string.
And then creating a SmallVector with one element to create the
GEP.

Instead create the APInt from integers and directly pass the single
index to GetElementPtrInst::Create().
2021-07-08 21:21:43 +02:00
Nikita Popov cfb94212d4 [AMDGPU] Pass explicit GEP type in printf transform (NFC)
This code is working on an i8*. Avoid nullptr element type in
preparation for removing support.
2021-07-08 21:21:43 +02:00
Nikita Popov b5a7da4391 [NVPTX] Pass explicit GEP type (NFC)
Use source element type of original GEP, as we're just changing
the address space.
2021-07-08 21:21:43 +02:00
Alexey Bataev f57d396dca [OPENMP]Do no privatize const firstprivates in target regions.
No need to emit private copyfor firstprivate constants in target
regions, we can use the original copy instead.

Differential Revision: https://reviews.llvm.org/D105647
2021-07-08 11:55:37 -07:00
Alexey Bataev 0d74fd3fdf [SLP][COST][X86]Improve cost model for masked gather.
Revived D101297 in its original form + added some changes in X86
legalization cehcking for masked gathers.

This solution is the most stable and the most correct one. We have to
check the legality before trying to build the masked gather in SLP.
Without this check we have incorrect cost (for SLP) in case if the masked gather
is not legal/slower than the gather. And we're missing some
vectorization opportunities.

This can be fixed in the cost model, but in this case we need to add
special checks for the cost of GEPs for ScatterVectorize node, add
special check for small trees, etc., i.e. there are a lot of corner
cases here and there, which insrease code base and make it harder to
maintain the code.

> Can't we rely on cost model to deal with this? This can be profitable for futher vectorization, when we can start from such gather loads as seed.

The question from D101297. Actually, no, it can't. Actually, simple
gather may give us better result, especially after we started
vectorization of insertelements. Plus, like I said before, the cost for
non-legal masked gathers leads to missed vectorization opportunities.

Differential Revision: https://reviews.llvm.org/D105042
2021-07-08 11:53:30 -07:00
Craig Topper 6dd94cbff5 [ARM] Use matchSimpleRecurrence to simplify some code in MVEGatherScatterLowering. NFCI
Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D105262
2021-07-08 11:42:56 -07:00
Louis Dionne 74fb868942 [libc++] Add XFAIL for Clang ToT with modules
This is what I should have done instead of 6afd6e96ce.
2021-07-08 14:40:18 -04:00
Nikita Popov 693251fb2f [CodeGen] Avoid CreateGEP with nullptr type (NFC)
In preparation for dropping support for it. I've replaced it with
a proper type where the correct type was obvious and left an
explicit getPointerElementType() where it wasn't.
2021-07-08 20:38:54 +02:00
Alexey Bataev 9d826fdb28 [X86][NFC]Add run lines for AVX512VL for masked gather test, NFC. 2021-07-08 11:30:31 -07:00
Matheus Izvekov 5a1c50410c [clang] fix constexpr code generation for user conversions.
When building the member call to a user conversion function during an
implicit cast, the expression was not being checked for immediate
invocation, so we were never adding the ConstantExpr node to AST.

This would cause the call to the user conversion operator to be emitted
even if it was constantexpr evaluated, and this would even trip an
assert when said user conversion was declared consteval:
`Assertion failed: !cast<FunctionDecl>(GD.getDecl())->isConsteval() && "consteval function should never be emitted", file clang\lib\CodeGen\CodeGenModule.cpp, line 3530`

Fixes PR48855.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D105446
2021-07-08 20:23:19 +02:00
Stanislav Mekhanoshin de5582be26 [AMDGPU] Fix more indention in llc-pipeline test. NFC. 2021-07-08 11:20:00 -07:00
Louis Dionne 8ea2b951c6 [libc++][ci] Install Clang 11, Clang 12 and Clang ToT in the Docker image
The compiler support policy mentions that we support Clang 11 and 12, so
we should test those. We already test on Clang 12, but I'll add testers
for Clang 11 once the new Docker image is in use on all the builders.
2021-07-08 14:14:17 -04:00
Nicolas Vasilache 4747e1b83b [mlir][Linalg] Fix tensor.extract_slice(linalg.init_tensor) canonicalization for rank-reducing extract
Differential Revision: https://reviews.llvm.org/D105636
2021-07-08 18:13:51 +00:00
Michael Liao 8c7ff9da90 [Metadata] Decorate methods with 'const'. NFC.
- Minor coding style fix.
2021-07-08 14:11:14 -04:00