Evan Cheng
ed6e34fe41
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
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llvm-svn: 48995
2008-03-31 20:40:39 +00:00
Bill Wendling
632ea65072
This is the initial check-in for adding register scavenging to PPC. (Currently,
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PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.
llvm-svn: 47863
2008-03-03 22:19:16 +00:00
Dan Gohman
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
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llvm-svn: 46930
2008-02-10 18:45:23 +00:00
Owen Anderson
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
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Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
Owen Anderson
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
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llvm-svn: 45484
2008-01-01 21:11:32 +00:00
Chris Lattner
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
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llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Chris Lattner
a6c8297e84
refactor some code to avoid overloading the name 'usesLR' in
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different places to mean different things. Document what the
one in PPCFunctionInfo means and when it is valid.
llvm-svn: 44699
2007-12-08 06:39:11 +00:00
Evan Cheng
3b8a674469
Added canFoldMemoryOperand for PPC.
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llvm-svn: 44623
2007-12-05 18:41:29 +00:00
Evan Cheng
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
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the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
Evan Cheng
f45a1d623c
Remove redundant foldMemoryOperand variants and other code clean up.
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llvm-svn: 44517
2007-12-02 08:30:39 +00:00
Evan Cheng
69fda0a716
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
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llvm-svn: 44479
2007-12-01 02:07:52 +00:00
Dale Johannesen
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
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to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
Anton Korobeynikov
4edfea438a
Use TableGen to emit information for dwarf register numbers.
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This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
Evan Cheng
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
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- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
Evan Cheng
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
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llvm-svn: 43150
2007-10-18 21:29:24 +00:00
Evan Cheng
f4cf5dcdd2
- Added a few target hooks to generate load / store instructions from / to any
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address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
llvm-svn: 42621
2007-10-05 01:32:41 +00:00
Evan Cheng
c1e4e3743b
Allow copyRegToReg to emit cross register classes copies.
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Tested with "make check"!
llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Evan Cheng
9a25d98c86
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
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llvm-svn: 41597
2007-08-30 05:52:20 +00:00
Evan Cheng
94b5a80b93
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
2007-07-19 01:14:50 +00:00
Anton Korobeynikov
383a324735
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
Evan Cheng
5662b21db1
eliminateFrameIndex() change.
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llvm-svn: 36626
2007-05-01 09:13:03 +00:00
Evan Cheng
61f39d186c
Added MRegisterInfo hook to re-materialize an instruction.
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llvm-svn: 35205
2007-03-20 08:09:38 +00:00
Evan Cheng
8b8cac289b
Minor interface change.
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llvm-svn: 34967
2007-03-06 10:05:14 +00:00
Evan Cheng
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
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llvm-svn: 34707
2007-02-28 00:21:17 +00:00
Jim Laskey
b6e200bd68
Duplicate use of LR, take 2.
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llvm-svn: 34666
2007-02-27 11:55:45 +00:00
Evan Cheng
5d7ce57c13
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
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to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
llvm-svn: 34652
2007-02-27 02:55:29 +00:00
Jim Laskey
2f28a3cf08
Don't spill LR as a callee saved register.
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llvm-svn: 34533
2007-02-23 20:34:16 +00:00
Jim Laskey
3796abea0f
Support to provide exception and selector registers.
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llvm-svn: 34482
2007-02-21 22:54:50 +00:00
Evan Cheng
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
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llvm-svn: 34428
2007-02-19 21:49:54 +00:00
Reid Spencer
da81bf4d3e
For PR1207:
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Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
Evan Cheng
9865be6d40
Added getReservedRegs().
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llvm-svn: 34376
2007-02-17 11:06:00 +00:00
Evan Cheng
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
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- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
Jim Laskey
f6c63fec92
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
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by value so that clean up is less confusing (these vectors tend to be small.)
llvm-svn: 33488
2007-01-24 18:45:13 +00:00
Evan Cheng
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
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llvm-svn: 33455
2007-01-23 00:57:47 +00:00
Evan Cheng
74b46e8c05
Fix naming inconsistency.
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llvm-svn: 32823
2007-01-02 21:33:40 +00:00
Jim Laskey
527c12f8e6
Make it easier for gdb to find the return address.
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llvm-svn: 32277
2006-12-06 17:42:06 +00:00
Evan Cheng
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
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of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Jim Laskey
48850c10c0
This is a general clean up of the PowerPC ABI. Address several problems and
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bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
llvm-svn: 31792
2006-11-16 22:43:37 +00:00
Evan Cheng
dbd3d294e6
Matches MachineInstr changes.
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llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Chris Lattner
71227c23b1
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
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llvm-svn: 29096
2006-07-11 00:48:23 +00:00
Evan Cheng
305c49579c
getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd.
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llvm-svn: 28378
2006-05-18 00:12:58 +00:00
Chris Lattner
6df094b4ab
Move some knowledge about registers out of the code emitter into the register info.
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llvm-svn: 27770
2006-04-17 21:07:20 +00:00
Jim Laskey
2d7298c362
Foundation for call frame information.
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llvm-svn: 27491
2006-04-07 16:34:46 +00:00
Jim Laskey
d1aa1638c6
Expose base register for DwarfWriter. Refactor code accordingly.
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llvm-svn: 27225
2006-03-28 13:48:33 +00:00
Jim Laskey
3c43609f1f
Add support to locate local variables in frames (early version.)
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llvm-svn: 26994
2006-03-23 18:12:57 +00:00
Chris Lattner
bb53acd03c
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
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llvm-svn: 25913
2006-02-02 20:12:32 +00:00
Nate Begeman
6cca84e43c
More PPC32 -> PPC changes, as well as merging some classes that were
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redundant after the change.
llvm-svn: 23759
2005-10-16 05:39:50 +00:00
Chris Lattner
6f3b954662
Rename PPC32*.h to PPC*.h
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This completes the grand PPC file renaming
llvm-svn: 23745
2005-10-14 23:59:06 +00:00