Commit Graph

14 Commits

Author SHA1 Message Date
Matheus Almeida c11f305082 [mips] 80-column.
llvm-svn: 204252
2014-03-19 16:29:06 +00:00
Bill Wendling 58e2d3d856 Generate compact unwind encoding from CFI directives.
We used to generate the compact unwind encoding from the machine
instructions. However, this had the problem that if the user used `-save-temps'
or compiled their hand-written `.s' file (with CFI directives), we wouldn't
generate the compact unwind encoding.

Move the algorithm that generates the compact unwind encoding into the
MCAsmBackend. This way we can generate the encoding whether the code is from a
`.ll' or `.s' file.

<rdar://problem/13623355>

llvm-svn: 190290
2013-09-09 02:37:14 +00:00
Roman Divacky 5dd4ccb402 When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend
store this and use it to not emit long nops when the CPU is geode which
doesnt support them.

Fixes PR11212.

llvm-svn: 164132
2012-09-18 16:08:49 +00:00
Jim Grosbach c3b0427921 Allow MCCodeEmitter access to the target MCRegisterInfo.
Add the MCRegisterInfo to the factories and constructors.

Patch by Tom Stellard <Tom.Stellard@amd.com>.

llvm-svn: 156828
2012-05-15 17:35:52 +00:00
Akira Hatanaka b1f68f9696 Initial 64 bit direct object support.
This patch allows llvm to recognize that a 64 bit object file is being produced
and that the subsequently generated ELF header has the correct information.

The test case checks for both big and little endian flavors.

Patch by Jack Carter.

llvm-svn: 153889
2012-04-02 19:25:22 +00:00
Akira Hatanaka 1ee768db53 Pass endian information to constructors. Define separate functions to create
objects for big endian and little endian targets.

Patch by Jack Carter.

llvm-svn: 151788
2012-03-01 01:53:15 +00:00
Rafael Espindola 647841b181 Add big endian mips support. Based on a patch by Jack Carter.
llvm-svn: 147924
2012-01-11 04:04:14 +00:00
Rafael Espindola 1dc45d8df4 Move the Mips only bits of the ELF writer to lib/Target/Mips.
llvm-svn: 147133
2011-12-22 03:03:17 +00:00
Bruno Cardoso Lopes c85e3ff334 Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414
2011-11-11 22:58:42 +00:00
Akira Hatanaka 44220ca045 Register Asm backend. Add functions to MipsAsmBackend.
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140886
2011-09-30 21:23:45 +00:00
Akira Hatanaka 750ecec7d5 Initial implementation of MipsMCCodeEmitter.
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878
2011-09-30 20:40:03 +00:00
Akira Hatanaka 3d673cc323 Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
llvm-svn: 140233
2011-09-21 03:00:58 +00:00
James Molloy 8c54533f99 Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com)
llvm-svn: 138796
2011-08-30 07:23:29 +00:00
Evan Cheng bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
2011-07-14 20:59:42 +00:00