Commit Graph

14 Commits

Author SHA1 Message Date
Rafael Espindola f491704e22 Print a=b as an assignment.
In assembly the expression a=b is parsed as an assignment, so it should be
printed as one.

This remove a truly horrible hack for producing a label with "a=.". It would
be used by codegen but would never be reached by the asm parser. Sorry I
missed this when it was first committed.

llvm-svn: 211639
2014-06-24 22:45:16 +00:00
Rafael Espindola 43c4e24fad Add a MCAsmInfoELF class and factor some code into it.
We had a MCAsmInfoCOFF, but no common class for all the ELF MCAsmInfos before.

llvm-svn: 192760
2013-10-16 01:34:32 +00:00
Rafael Espindola 140a837acd Remove unused argument.
llvm-svn: 181618
2013-05-10 18:16:59 +00:00
Eli Bendersky 32aab2216d Clean up assignment of CalleeSaveStackSlotSize: get rid of the default and explicitly set this in every target that needs to change it from the default.
llvm-svn: 173270
2013-01-23 16:22:04 +00:00
Jack Carter 9e28cd3fad This patch produces the correct pointer size
value in the 64 bit .eh_frame section.

It doesn't however allow exception handling to work
yet since it depends on the correct relocation model
being set in the ELF header flags.


Contributer: Jack Carter
llvm-svn: 171881
2013-01-08 18:53:20 +00:00
Reed Kotler aee4d5d194 This patch is needed to make c++ exceptions work for mips16.
Mips16 is really a processor decoding mode (ala thumb 1) and in the same
program, mips16 and mips32 functions can exist and can call each other.

If a jal type instruction encounters an address with the lower bit set, then
the processor switches to mips16 mode (if it is not already in it). If the
lower bit is not set, then it switches to mips32 mode.

The linker knows which functions are mips16 and which are mips32.
When relocation is performed on code labels, this lower order bit is
set if the code label is a mips16 code label.

In general this works just fine, however when creating exception handling
tables and dwarf, there are cases where you don't want this lower order
bit added in.

This has been traditionally distinguished in gas assembly source by using a
different syntax for the label.

lab1:      ; this will cause the lower order bit to be added
lab2=.     ; this will not cause the lower order bit to be added

In some cases, it does not matter because in dwarf and debug tables
the difference of two labels is used and in that case the lower order
bits subtract each other out.

To fix this, I have added to mcstreamer the notion of a debuglabel.
The default is for label and debug label to be the same. So calling
EmitLabel and EmitDebugLabel produce the same result.

For various reasons, there is only one set of labels that needs to be
modified for the mips exceptions to work. These are the "$eh_func_beginXXX" 
labels.

Mips overrides the debug label suffix from ":" to "=." .

This initial patch fixes exceptions. More changes most likely
will be needed to DwarfCFException to make all of this work
for actual debugging. These changes will be to emit debug labels in some
places where a simple label is emitted now.

Some historical discussion on this from gcc can be found at:
http://gcc.gnu.org/ml/gcc-patches/2008-08/msg00623.html
http://gcc.gnu.org/ml/gcc-patches/2008-11/msg01273.html 

llvm-svn: 170279
2012-12-16 04:00:45 +00:00
Jia Liu 9f6101191b remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.
llvm-svn: 150805
2012-02-17 08:55:11 +00:00
Jia Liu dd6c1cd4e8 add Emacs tag and fix some comment error in file headers
llvm-svn: 150775
2012-02-17 01:23:50 +00:00
Akira Hatanaka f0b08445f6 Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.

llvm-svn: 149668
2012-02-03 04:33:00 +00:00
Akira Hatanaka cf10f08825 64-bit data directive.
llvm-svn: 147005
2011-12-20 22:52:19 +00:00
David Blaikie a379b18173 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
llvm-svn: 146960
2011-12-20 02:50:00 +00:00
Akira Hatanaka 3d673cc323 Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
llvm-svn: 140233
2011-09-21 03:00:58 +00:00
Evan Cheng a83b37a9db Move some parts of TargetAsmInfo down to MCAsmInfo. This is not the greatest
solution but it is a small step towards removing the horror that is
TargetAsmInfo.

llvm-svn: 135237
2011-07-15 02:09:41 +00:00
Evan Cheng 1705ab00ab Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes.
llvm-svn: 135219
2011-07-14 23:50:31 +00:00