Commit Graph

2665 Commits

Author SHA1 Message Date
Bill Wendling 2b8fc31df9 The personality function on Darwin needs a global stub. We then refer to
that global stub instead of doing the ".set" thingy we were doing before.

llvm-svn: 41838
2007-09-11 08:27:17 +00:00
Evan Cheng 8c3c198499 New entry.
llvm-svn: 41810
2007-09-10 22:16:37 +00:00
Chris Lattner 6777b72659 Add some notes about better flag handling.
llvm-svn: 41808
2007-09-10 21:43:18 +00:00
Evan Cheng 637395e6bd It's not safe to rematerialize MOV32r0 etc. by simply cloning the original
instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802
2007-09-10 20:48:53 +00:00
Evan Cheng cef2c0efcc TableGen no longer emit CopyFromReg nodes for implicit results in physical
registers. The scheduler is now responsible for emitting them.

llvm-svn: 41781
2007-09-07 23:59:02 +00:00
Dan Gohman a95cbb0007 Avoid storing and reloading zeros and other constants from stack slots
by flagging the associated instructions as being trivially rematerializable.

llvm-svn: 41775
2007-09-07 21:32:51 +00:00
Dale Johannesen 9e70086c8f Apply feedback from previous patch.
llvm-svn: 41774
2007-09-07 21:07:57 +00:00
Rafael Espindola 1de0c86717 Add support for having different alignment for objects on call frames.
The x86-64 ABI states that objects passed on the stack have
8 byte alignment. Implement that.

llvm-svn: 41768
2007-09-07 14:52:14 +00:00
Owen Anderson e2f23a3abf Add lengthof and endof templates that hide a lot of sizeof computations.
Patch by Sterling Stein!

llvm-svn: 41758
2007-09-07 04:06:50 +00:00
Dale Johannesen bed9dc423c Next round of APFloat changes.
Use APFloat in UpgradeParser and AsmParser.
Change all references to ConstantFP to use the
APFloat interface rather than double.  Remove
the ConstantFP double interfaces.
Use APFloat functions for constant folding arithmetic
and comparisons.
(There are still way too many places APFloat is
just a wrapper around host float/double, but we're
getting there.)

llvm-svn: 41747
2007-09-06 18:13:44 +00:00
Evan Cheng 189df733ed Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen:
leal    (,%rcx,8), %rcx
It should be
leal    (,%rcx,8), %ecx

llvm-svn: 41735
2007-09-06 00:14:41 +00:00
Evan Cheng 623dd88775 Mac OS X X86-64 ABI is same as the standard.
llvm-svn: 41700
2007-09-04 16:44:41 +00:00
Anton Korobeynikov 50ab26e835 Reapply r41578 with proper fix
llvm-svn: 41680
2007-09-03 00:36:06 +00:00
Rafael Espindola e636fc05d6 Initial support for calling functions with byval arguments on x86-64
llvm-svn: 41643
2007-08-31 15:06:30 +00:00
Rafael Espindola bb8a5cff67 Align i64 and f64 at 8 byte on x86-64.
This is mandated table 3.1 at
http://www.x86-64.org/documentation/abi.pdf

llvm-svn: 41642
2007-08-31 12:23:58 +00:00
Dale Johannesen 3cf889f75e Enhance APFloat to retain bits of NaNs (fixes oggenc).
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632
2007-08-31 04:03:46 +00:00
Evan Cheng ebb8540067 Added support to fold X86 load / store instructions. This allow rematerialized loads to be folded into their uses.
llvm-svn: 41599
2007-08-30 05:54:07 +00:00
Evan Cheng c2081fe573 Mark load instructions with isLoad = 1.
llvm-svn: 41595
2007-08-30 05:49:43 +00:00
Dale Johannesen d246b2ca5c Change LegalFPImmediates to use APFloat.
Add APFloat interfaces to ConstantFP, SelectionDAG.
Fix integer bit in double->APFloat conversion.
Convert LegalizeDAG to use APFloat interface in
ConstantFPSDNode uses.

llvm-svn: 41587
2007-08-30 00:23:21 +00:00
Duncan Sands 7741427a09 Move getX86RegNum into X86RegisterInfo and use it
in the trampoline lowering.  Lookup the jump and
mov opcodes for the trampoline rather than hard
coding them.

llvm-svn: 41577
2007-08-29 19:01:20 +00:00
Rafael Espindola b602461f48 Add a comment about using libc memset/memcpy or generating inline code.
llvm-svn: 41502
2007-08-27 17:48:26 +00:00
Rafael Espindola ff33241e16 call libc memcpy/memset if array size is bigger then threshold.
Coping 100MB array (after a warmup) shows that glibc 2.6.1 implementation on
x86-64 (core 2) is 30% faster (from 0.270917s to 0.188079s)

llvm-svn: 41479
2007-08-27 10:18:20 +00:00
Chris Lattner d8c9cb9182 rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
changing the interface to allow for future changes.

llvm-svn: 41384
2007-08-25 00:47:38 +00:00
Chris Lattner 51883acec1 add a note
llvm-svn: 41359
2007-08-24 15:17:59 +00:00
Chris Lattner 33800d1428 add some notes on really poor codegen.
llvm-svn: 41319
2007-08-23 15:22:07 +00:00
Bill Wendling 862afea91e Add the PCSymbol for Darwin x86 platforms.
llvm-svn: 41284
2007-08-22 18:44:05 +00:00
Anton Korobeynikov f335679b52 Use only 1 knob to enable exceptions on Darwin :).
llvm-svn: 41208
2007-08-21 00:31:30 +00:00
Rafael Espindola 9c3d20d823 Partial implementation of calling functions with byval arguments:
*) The needed information is propagated to the DAG
 *) The X86-64 backend detects it and aborts

llvm-svn: 41179
2007-08-20 15:18:24 +00:00
Chris Lattner 78846b69ae add a note
llvm-svn: 41178
2007-08-20 02:14:33 +00:00
Anton Korobeynikov 597c8b77e4 Move ReturnAddrIndex variable to X86MachineFunctionInfo structure. This fixed
hard to catch bugs with retaddr lowering

llvm-svn: 41104
2007-08-15 17:12:32 +00:00
Chris Lattner db8adb9941 add a note.
llvm-svn: 41103
2007-08-15 16:58:38 +00:00
Evan Cheng b2823dac69 Fix a typo pointd out by Maarten ter Huurne.
llvm-svn: 41059
2007-08-13 23:27:11 +00:00
Dan Gohman ccb3611881 When x86 addresses matching exceeds its recursion limit, check to
see if the base register is already occupied before assuming it can be
used. This fixes bogus code generation in the accompanying testcase.

llvm-svn: 41049
2007-08-13 20:03:06 +00:00
Chris Lattner 4e7f673f65 Fix PR1607
llvm-svn: 41048
2007-08-13 18:42:37 +00:00
Chris Lattner 750b3dfcf5 expand a note
llvm-svn: 41021
2007-08-11 18:19:07 +00:00
Chris Lattner ee44ab5b5f With evan's explicit flag representation, hopefully we will finally be
able to 3-addressify away stuff like this:

        movl    %ecx, %eax
        decl    %eax

llvm-svn: 41020
2007-08-11 18:16:46 +00:00
Bill Wendling cdbd82ee37 64-bit SSSE3 ops that use MMX registers don't require 16-byte alignment.
Make a 'memop' pattern just for them.

llvm-svn: 41017
2007-08-11 09:52:53 +00:00
Christopher Lamb 44e79f8aba Use subregs to improve any_extend code generation when feasible.
llvm-svn: 41013
2007-08-10 22:22:41 +00:00
Christopher Lamb b372abab14 Increase efficiency of sign_extend_inreg by using subregisters for truncation. As the README suggests sign_extend_subreg is selected to (sext(trunc)).
llvm-svn: 41010
2007-08-10 21:48:46 +00:00
Christopher Lamb f0c236fb8a Edit README in light of previous LEA16 commit.
llvm-svn: 41009
2007-08-10 21:29:05 +00:00
Christopher Lamb d36d30b53c Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled.
llvm-svn: 41007
2007-08-10 21:18:25 +00:00
Rafael Espindola 66011c17d5 propagate struct size and alignment of byval arguments to the DAG
llvm-svn: 40986
2007-08-10 14:44:42 +00:00
Bill Wendling 7014615087 For kicks, I though it would be fun to use the correct opcode.
llvm-svn: 40985
2007-08-10 09:00:17 +00:00
Bill Wendling 2377206923 Adding SSSE3 intrinsics.
llvm-svn: 40982
2007-08-10 06:22:27 +00:00
Evan Cheng f855b626e8 Temporarily backing out this change until we know why some dejagnu tests are failing.
llvm-svn: 40973
2007-08-09 22:25:35 +00:00
Evan Cheng e32e923a6a divb / mulb outputs to ah. Under x86-64 it's not legal to read ah if the instruction requires a rex prefix (i.e. outputs to r8b, etc.). So issue shift right by 8 on AX and then truncate it to 8 bits instead.
llvm-svn: 40972
2007-08-09 21:59:35 +00:00
Evan Cheng a05ec4dc52 GR16_ sub-register class should be GR8_, not GR8. That is, it should only be 8-bit registers in 32-bit mode. Ditto for GR32_.
llvm-svn: 40970
2007-08-09 18:05:17 +00:00
Dale Johannesen ba1a98a4e0 long double 9 of N. This finishes up the X86-32 bits
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).

llvm-svn: 40958
2007-08-09 01:04:01 +00:00
Dale Johannesen a47f7d7cfd Long double patch 8 of N: make it partially work in
SSE mode (all but conversions <-> other FP types, I think):
>>Do not mark all-80-bit operations as "Requires[FPStack]"
(which really means "not SSE").
>>Refactor load-and-extend to facilitate this.
>>Update comments.
>>Handle long double in SSE when computing FP_REG_KILL.

llvm-svn: 40906
2007-08-07 20:29:26 +00:00
Dale Johannesen 57c6ac5fe5 Long double patch 7 of N, unless I lost count:).
Last x87 bits for full functionality (not
thoroughly tested, and long doubles do not work
in SSE modes at all - use -mcpu=i486 for now)

llvm-svn: 40886
2007-08-07 01:17:37 +00:00