Previously LLVM_HAS_GLOBAL_ISEL would directly get the value of
LLVM_BUILD_GLOBAL_ISEL. This could be any integer value and not just ON
and OFF. The problem is that lit.cfg was checking for ON to define that
global-isel was supported, thus if we were setting
LLVM_BUILD_GLOBAL_ISEL with an integer value, say 1, this test would
fail whereas we do build global-isel and want to test it.
llvm-svn: 276307
Previously LLVM_BUILD_GLOBAL_ISEL was a boolean variable and although,
this is strictly identical to an option, it did not convey the
information that the user may set it. Options are here for that.
llvm-svn: 276306
Making smaller pieces out of some of these ~1000 line functions should make
it easier to incrementally upgrade them to handle vector types.
llvm-svn: 276304
LinkerScript<ELFT>::assignAddresses is becoming larger and looks
it can be good time for splitting. I expect to can more SectionsCommand's there,
and dispatching some of them separatelly can help to keep method smaller either.
Differential revision: https://reviews.llvm.org/D22506
llvm-svn: 276300
Summary:
The memcpy and memmove functions are the same on windows.
The overlap detection logic is incorrect.
printf-1 test:
```
stdin>:2:114: note: possible intended match here
==877412==ERROR: AddressSanitizer: memcpy-param-overlap: memory ranges [0x0000002bf2a8,0x0000002bf2ad) and [0x0000002bf2a9, 0x0000002bf2ae) overlap
``` ^
Reviewers: rnk
Subscribers: llvm-commits, wang0109, kubabrecka, chrisha
Differential Revision: https://reviews.llvm.org/D22610
llvm-svn: 276299
Had 3 testcases failtures:
ELF/eh-frame-merge.s
ELF/gc-sections-eh.s
ELF/gc-sections-lsda.s
Problem was that OutputOff is size_t, which is 32
for this configuration and next
condition never was checked correctly:
if (PieceI->OutputOff == (uintX_t)-1)
continue;
llvm-svn: 276296
Summary:
This change also changes findMatchingInsn and
findMatchingUpdateInsnForward to take DBG_VALUE opcodes into account
when tracking register defs and uses, which could potentially inhibit
these optimizations in the presence of debug information.
Reviewers: mcrosier
Subscribers: aemerson, rengolin, mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D22582
llvm-svn: 276293
Summary:
These unittests are not running on windows because they are using incorrect commands.
They were not failing on 32-bits because there is a requirement: asan-64-bits.
```
$ "nm" "C:\src\llvm\ninja64\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output\no_asan_gen_globals.c.tmp.exe"
# command stderr:
'nm': command not found
error: command failed with exit status: 127
```
```
$ "rm" "-rf" "C:\src\llvm\ninja64\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output/coverage-tracing"
$ "mkdir" "C:\src\llvm\ninja64\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output/coverage-tracing"
$ "A=x"
# command stderr:
'A=x': command not found
error: command failed with exit status: 127
```
```
$ "DIR=C:\src\llvm\ninja64\projects\compiler-rt\test\asan\X86_64WindowsConfig\TestCases\Output/coverage-order-pcs"
# command stderr:
'DIR=C:\\src\\llvm\\ninja64\\projects\\compiler-rt\\test\\asan\\X86_64WindowsConfig\\TestCases\\Output/coverage-order-pcs': command not found
error: command failed with exit status: 127
```
Reviewers: rnk
Subscribers: tberghammer, llvm-commits, danalbert, wang0109, srhines, kubabrecka, chrisha
Differential Revision: https://reviews.llvm.org/D22612
llvm-svn: 276290
Under normal circumstances we prefer the higher performance MOVD to extract the 0'th element of a v8i16 vector instead of PEXTRW.
But as detailed on PR27265, this prevents the SSE41 implementation of PEXTRW from folding the store of the 0'th element. Additionally it prevents us from making use of the fact that the (SSE2) reg-reg version of PEXTRW implicitly zero-extends the i16 element to the i32/i64 destination register.
This patch only preferentially lowers to MOVD if we will not be zero-extending the extracted i16, nor prevent a store from being folded (on SSSE41).
Fix for PR27265.
Differential Revision: https://reviews.llvm.org/D22509
llvm-svn: 276289
Summary:
We've had two copies of code for launching processes:
- one in NativeProcessLinux, used for launching debugged processes
- one in ProcessLauncherAndroid, used on android for launching all other kinds of processes
These have over time acquired support for various launch options, but neither supported all of
them. I now replace them with a single implementation ProcessLauncherLinux, which supports all
the options the individual versions supported and set it to be used to launch all processes on
linux.
This also works around the ETXTBSY issue on android when the process is started from the platform
instance, as that used to go through the version which did not contain the workaround.
Reviewers: tberghammer
Subscribers: tberghammer, danalbert, srhines, lldb-commits
Differential Revision: https://reviews.llvm.org/D22457
llvm-svn: 276288
Summary:
This is an other tentative to fix:
https://reviews.llvm.org/D22588
It's less clever, but should work.
Turn out there is not an easy way to write a portable print
for a pointer in lowercase without the prefix 0x.
Reviewers: rnk
Subscribers: llvm-commits, wang0109, kubabrecka, chrisha
Differential Revision: https://reviews.llvm.org/D22606
llvm-svn: 276286
As requested on D22509, I've pulled out the v8i16 extraction lowering as the SSE41 and pre-SSE41 implementations are effectively the same.
llvm-svn: 276285
This adds InputSectionDescription command to represent
the input section declaration.
This leads to next cleanup:
SectionRule removed.
ScriptConfiguration::Sections mamber removed.
LinkerScript<ELFT>::getOutputSection() removed.
Differential revision: https://reviews.llvm.org/D22617
llvm-svn: 276283
As reported on PR26235, we don't currently make use of the VBROADCASTF128/VBROADCASTI128 instructions (or the AVX512 equivalents) to load+splat a 128-bit vector to both lanes of a 256-bit vector.
This patch enables lowering from subvector insertion/concatenation patterns and auto-upgrades the llvm.x86.avx.vbroadcastf128.pd.256 / llvm.x86.avx.vbroadcastf128.ps.256 intrinsics to match.
We could possibly investigate using VBROADCASTF128/VBROADCASTI128 to load repeated constants as well (similar to how we already do for scalar broadcasts).
Differential Revision: https://reviews.llvm.org/D22460
llvm-svn: 276281
Patch broke ModuleDebugInfo test on the build bots (but not locally). Again.
svn revision: r276271
This reverts commit 9da8a1b05362bc96f2855fb32b5588b89407685d.
llvm-svn: 276279
This provides an elegant pattern to solve the "construct if not in map
already" problem we have many times in LLVM. Without try_emplace we
either have to rely on a sentinel value (nullptr) or do two lookups.
llvm-svn: 276277
Unreferenced nested structs and classes were omitted from the debug info. In DWARF, this was intentional, to avoid bloat. But for CodeView, we want this information to be consistent with what Microsoft tools would produce and expect.
llvm-svn: 276271
This change introduces the actual compute code in the GPU kernels. To ensure
all values referenced from the statements in the GPU kernel are indeed available
we scan all ScopStmts in the GPU kernel for references to llvm::Values that
are not yet covered by already modeled outer loop iterators, parameters, or
array base pointers and also pass these additional llvm::Values to the
GPU kernel.
For arrays used in the GPU kernel we introduce a new ScopArrayInfo object, which
is referenced by the newly generated access functions within the GPU kernel and
which is used to help with code generation.
llvm-svn: 276270
This is useful for external users using IslExprBuilder, in case they cannot
embed ScopArrayInfo data into their isl_ids, because the isl_ids either already
carry other information or the isl_ids have been created and their user pointers
cannot be updated any more.
llvm-svn: 276268
r275711 for "speedng up symbol version handling" was committed
by misunderstanding; the benchmark number was measured with
a debug build. The number with a release build didn't actually change.
This patch removes false optimizations added in that patch.
llvm-svn: 276267
The clearance calculation did not take into account registers defined as outputs or clobbers in inline assembly machine instructions because these register defs are implicit.
Differential Revision: http://reviews.llvm.org/D22580
llvm-svn: 276266
This ensures that no trivially dead code is generated. This is not only cleaner,
but also avoids troubles in case code is generated in a separate function and
some of this dead code contains references to values that are not available.
This issue may happen, in case the memory access functions have been updated
and old getelementptr instructions remain in the code. With normal Polly,
a test case is difficult to draft, but the upcoming GPU code generation can
possibly trigger such problems. We will later extend this dead-code elimination
to region and vector statements.
llvm-svn: 276263
This change simplifies interaction between Writer and the linker script
because we can make needsInterpSection() a file-scope function.
llvm-svn: 276261
Quentin Colombet