ScriptInterpreterPython class and made a simple callback function that
ScriptInterpreterPython::BreakpointCallbackFunction() now calls so we don't
include any internal API stuff into the cpp file that is generated by SWIG.
Fixed a few build warnings in debugserver.
llvm-svn: 115926
Before the implementation of isLegalAddressingMode, some rare cases
of code were miscompiled if optimized with the LoopStrengthReduce pass.
It is unclear (to me) if LSR is "allowed" to produce wrong code with a
bad TargetLowering, or if the bug is elsewhere and this patch just
hides it.
llvm-svn: 115919
tricks to get types to resolve. I did this by correctly including the correct
files: stdint.h and all lldb-*.h files first before including the API files.
This allowed me to remove all of the hacks that were in the lldb.swig file
and it also allows all of the #defines in lldb-defines.h and enumerations
in lldb-enumerations.h to appear in the lldb.py module. This will make the
python script code a lot more readable.
Cleaned up the "process launch" command to not execute a "process continue"
command, it now just does what it should have with the internal API calls
instead of executing another command line command.
Made the lldb_private::Process set the state to launching and attaching if
WillLaunch/WillAttach return no error respectively.
llvm-svn: 115902
Temporarily commenting out the deprecated LaunchProcess() method.
SWIG is not able to handle the overloaded functions.
o dotest.py/lldbtest.py:
Add an '-w' option to insert some wait time between consecutive test cases.
o TestClassTypes.py:
Make the breakpoint_creation_by_filespec_python() test method more robust and
more descriptive by printing out a more insightful assert message.
o lldb.swig: Coaches swig to treat StateType as an int type, instead of a C++ class.
llvm-svn: 115899
Start using ArithBinOpEFLAGS for OR, XOR, and SUB.
This removes 500 lines from the .td file. Now AND/OR/XOR/SUB are all
defined exactly the same way instead of being close relatives.
llvm-svn: 115896
which instantiates the 34 versions of and all in one
swoop. The BaseOpc/BaseOpc2/BaseOpc4 stuff should not
be required, but tblgen's feeble brain explodes when I
use Or4<BaseOpc>.V in the multipattern.
No change in the generated .inc files.
llvm-svn: 115893
This does change the generated .inc files to include the implicit use/def of eax.
Since these instructions are only generated by the assembler and disassembler it
doesn't actually matter though.
llvm-svn: 115885
This function is intended to be used when inserting a machine instruction that
trivially restricts the legal registers, like LEA requiring a GR32_NOSP
argument.
llvm-svn: 115875
- Fixed some iterator style issues
- Don't process blocks that have been visited already
- Fixed a case where a unreachable block cycle was not reported
- Minor test case changes
- Added one test case from flow-sensitive version of the check. More coming.
llvm-svn: 115861
Lifted the EmitRawText calls to ARMAsmPrinter::emitAttribute()
Added ARMAsmPrinter::emitAttributes() (plural s).
TODO:
.cpu attribute needs to be refactored
llvm-svn: 115859
Jakob Stoklund Olesen