162242b63b
pr6652: Use LDM to restore PC to the return address on ARMv4.
...
Patch by John Tytgat!
llvm-svn: 99096
2010-03-20 22:20:40 +00:00
ae08a736d6
Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
...
with changes to add a separate optional register update argument. Change all
the NEON instructions with address register writeback to use it.
llvm-svn: 99095
2010-03-20 22:13:40 +00:00
59e5141d44
Add instruction variants for VST2, VST3, and VST4 "store-lane" operations with
...
address register writeback.
llvm-svn: 99094
2010-03-20 21:57:36 +00:00
b18adef4ad
Add variants of VST2, VST3 and VST4 with address register writeback, and
...
rewrite the existing VST3 and VST4 instructions to use the same classes as
the others.
llvm-svn: 99093
2010-03-20 21:45:18 +00:00
89ba42c4ce
Add instructions for double-spaced VST3 and VST4 without address register
...
writeback, and refactor the existing double-spaced VST2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.
llvm-svn: 99090
2010-03-20 21:15:48 +00:00
e848de3911
tests: Mangle '-vg' onto the end of the triple when running under valgrind, so
...
we can use the standard XFAIL and XTARGET to conditional tests based on
valgrind.
llvm-svn: 99088
2010-03-20 21:12:48 +00:00
febf6ab718
Add a setCalledFunction member to InvokeInst (like in CallInst)
...
and use this (as well as getCalledValue) to access the callee,
instead of {g|s}etOperand(0).
llvm-svn: 99084
2010-03-20 21:00:25 +00:00
322cbff3d3
Add VST1 instructions with address register writeback.
...
llvm-svn: 99083
2010-03-20 20:54:36 +00:00
9152d96dfb
Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations with
...
address register writeback.
llvm-svn: 99082
2010-03-20 20:47:18 +00:00
9b1584245a
Tidy some more comments and whitespace.
...
llvm-svn: 99081
2010-03-20 20:39:53 +00:00
cf324658f6
Add variants of VLD2, VLD3 and VLD4 with address register writeback, and
...
rewrite the existing VLD3 and VLD4 instructions to use the same classes as
the others.
llvm-svn: 99080
2010-03-20 20:10:51 +00:00
7ee900da22
Tidy some comments and whitespace for consistency.
...
llvm-svn: 99078
2010-03-20 19:57:03 +00:00
c0795f8b87
Rename some instructions for consistency and sanity: use "_UPD" suffix for
...
load/stores with address register writeback, and use "odd" suffix to distinguish
instructions to access odd numbered registers (instead of "a" and "b").
No functional changes.
llvm-svn: 99066
2010-03-20 18:35:24 +00:00
d092669b48
Add instructions for double-spaced VLD3 and VLD4 without address register
...
writeback, and refactor the existing double-spaced VLD2 instructions.
These are only for the disassembler since codegen doesn't use them, at
least for now.
llvm-svn: 99065
2010-03-20 18:14:26 +00:00
496766cb56
Add VLD1 instructions with address register writeback.
...
llvm-svn: 99062
2010-03-20 17:59:03 +00:00
73fc06f60f
PIC16: Simplify code by using a std::set<std::string> instead of a sorted & uniqued std::list of leaked char*.
...
llvm-svn: 99061
2010-03-20 17:41:18 +00:00
2497d85c9e
Revert the rest of 98679.
...
--- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td':
U lib/Target/ARM/ARMInstrVFP.td
llvm-svn: 99049
2010-03-20 06:34:02 +00:00
614d1fdfc3
Fix a very bad typo. Since the register number was off by one, the ARM
...
load/store optimizer would incorrectly think that registers D26 and D28
were consecutive and would generate a VLDM instruction to load them.
The assembler was not convinced.
llvm-svn: 99043
2010-03-20 06:05:13 +00:00
1a2abe5580
Clear the SCEVExpander's insertion point after making deletions,
...
so that the SCEVExpander doesn't retain a dangling pointer as its
insert position. The dangling pointer in this case wasn't ever used
to insert new instructions, but it was causing trouble with
SCEVExpander's code for automatically advancing its insert position
past debug intrinsics.
This fixes use-after-free errors that valgrind noticed in
test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and
test/Transforms/IndVarSimplify/exit_value_tests.ll.
llvm-svn: 99036
2010-03-20 03:53:53 +00:00
b8d1fd0553
Stupid svn. Add back to the lost sibcall tests.
...
llvm-svn: 99033
2010-03-20 03:17:05 +00:00
3f6f769c4f
If call result is in ST0 and it is not being passed to the caller's
...
caller, then it is not safe to optimize the call into a sibcall since
the call result has to be popped off the x87 stack.
llvm-svn: 99032
2010-03-20 02:58:15 +00:00
5ea5fab22b
Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual.
...
llvm-svn: 99031
2010-03-20 01:58:40 +00:00
f833fad813
Add NLdStFrm Format.
...
llvm-svn: 99014
2010-03-20 00:17:00 +00:00
053e3510a3
Revert r98679. The disassembler will be updated to depend on the existence of
...
IndexModeUpd and then populates the Inst{21}=1 while populating the instructions
for disassembly.
llvm-svn: 99013
2010-03-19 23:50:27 +00:00
3e2bb702db
Revert r99009 temporarily it seems to be breaking the bots.
...
llvm-svn: 99011
2010-03-19 23:04:23 +00:00
e4191e719b
Revert this change, since it was causing ARM performance regressions.
...
--- Reverse-merging r98889 into '.':
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/ARMISelLowering.h
U lib/Target/ARM/ARMInstrInfo.td
U lib/Target/ARM/ARMInstrVFP.td
U lib/Target/ARM/ARMISelLowering.cpp
U lib/Target/ARM/ARMInstrFormats.td
llvm-svn: 99010
2010-03-19 22:51:32 +00:00
933b2cf9a8
Change intrinsic result type for void to store it as an empty list
...
instead of as a single element list with VoidTy.
llvm-svn: 99009
2010-03-19 22:40:56 +00:00
2db7abaa44
make getOperandNum a static function (since it's just used by
...
ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
2010-03-19 21:56:21 +00:00
89d4e3c3fd
Fix more places to more thoroughly ignore debug intrinsics. This fixes
...
use-before-def errors in SCEVExpander-produced code in sqlite3 when debug
info with optimization is enabled, though the testcases for this are
dependent on use-list order.
llvm-svn: 99001
2010-03-19 21:51:03 +00:00
8352941b34
remove the patterns that I commented out in r98930, Dan verified
...
that they are dead.
llvm-svn: 99000
2010-03-19 21:43:36 +00:00
f144725ebc
major surgery on tblgen: generalize TreePatternNode
...
to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
2010-03-19 21:37:09 +00:00
f369e779a8
Force configuration of some projects before others. In particular, some
...
projects rely upon llvm-gcc, the LLVM test suite, and poolalloc. This ensures
that the aforementioned projects have their object trees created first so that
other projects can find their object trees when they themselves are configured.
llvm-svn: 98998
2010-03-19 21:31:39 +00:00
07b4f8cd4b
Fix -Wnon-virtual-dtor warning.
...
llvm-svn: 98994
2010-03-19 21:26:46 +00:00
da4a3ed75e
Regenerate configure.
...
llvm-svn: 98990
2010-03-19 21:22:13 +00:00
122f07a0c9
Bump version number.
...
llvm-svn: 98989
2010-03-19 21:19:10 +00:00
b7d3d99181
Test commit (removed extra blank line)
...
llvm-svn: 98988
2010-03-19 21:12:29 +00:00
5002454d2a
call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1 )
...
is valid, but not useful, when variable identified by !1 is optimized away by the optimizer.
llvm-svn: 98986
2010-03-19 21:06:24 +00:00
1734a2a550
Updated copyright year to 2010.
...
llvm-svn: 98985
2010-03-19 21:04:16 +00:00
cf0843ed93
Fixed the encoding problems of the crc32 instructions. All had the Operand size
...
override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
llvm-svn: 98980
2010-03-19 20:04:42 +00:00
bc5af98f42
Stop trying to merge identical jump tables. This had been inadvertently
...
disabled for several months (since svn r88806) and no one noticed. My fix
for pr6543 yesterday reenabled it, but broke the ARM port's code for using
TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only,
I'm just taking this out. It is not common to have identical jump tables,
the code we used to merge them was O(N^2), and it only helps code size, not
performance.
llvm-svn: 98977
2010-03-19 19:05:41 +00:00
1a81ad3559
MC/Mach-O/x86_64: Add relocation support.
...
- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
- There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
- 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)
llvm-svn: 98974
2010-03-19 18:07:55 +00:00
abf6e3657e
llvm-mc: Fix target selection for --disassemble to use GetTarget.
...
llvm-svn: 98973
2010-03-19 18:07:50 +00:00
c532697372
MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
...
llvm-svn: 98972
2010-03-19 18:07:48 +00:00
c069cc8eaa
FileCheck: Don't print "possibly intended match" line if it would match the
...
"scanning from here" one.
llvm-svn: 98971
2010-03-19 18:07:43 +00:00
bc8eed000f
Set numThreads to 1 by default when Python is older than 2.5.2.
...
Python 2.4 always hits this bug: http://bugs.python.org/issue1731717
when running check-lit on multi-core systems.
Setting numThreads to 1 makes it slower, but at least the results reported are
correct.
llvm-svn: 98969
2010-03-19 17:54:21 +00:00
6d765ebc0d
make FillWithPossibleTypes take a predicate to filter types so that
...
we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
2010-03-19 17:41:26 +00:00
0dab68f3d0
Renumber LdStExFrm from 28 to 11 and shift the existing format values to make
...
room for it. This is in preparation for another patch which is adding NEON
subformats to facilitate disassembly.
llvm-svn: 98967
2010-03-19 17:39:00 +00:00
45a967cd62
Acccess control is lame
...
llvm-svn: 98962
2010-03-19 15:36:58 +00:00
c09217c2f1
struct -> class, to silence a Clang warning
...
llvm-svn: 98961
2010-03-19 15:31:09 +00:00
6c56ed847e
back out r98957, it broke http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10-fnt/builds/703 in the nightly test suite
...
llvm-svn: 98958
2010-03-19 13:50:02 +00:00
8335f9c0bf
Recommit r80858 again (which has been backed out in r80871).
...
This time I did a self-hosted bootstrap on Linux x86-64,
with no problems. Let's see how darwin 64-bit self-hosting
goes. At the first sign of failure I'll back this out.
Maybe the valgrind bots give me a hint of what may be wrong
(it at all).
llvm-svn: 98957
2010-03-19 11:55:53 +00:00
4d7c8645fd
MC: Add TargetAsmBackend::createObjectWriter.
...
- MCAssembler is now object-file independent, although we will surely need more work to fully support ELF/COFF.
llvm-svn: 98955
2010-03-19 10:43:26 +00:00
eaa367f5ae
MCCodeEmitter: Add target independent fixup flag for is-pc-relative.
...
llvm-svn: 98954
2010-03-19 10:43:23 +00:00
1bd7171c95
MC: Sink code emitter into MCAssembler.
...
llvm-svn: 98953
2010-03-19 10:43:18 +00:00
79e0e5a631
MC/Mach-O: Move to MachObjectWriter.{h,cpp}.
...
llvm-svn: 98952
2010-03-19 10:43:15 +00:00
c5084cccc8
MC: Add TargetAsmBackend::isVirtualSection hook.
...
llvm-svn: 98950
2010-03-19 09:29:03 +00:00
f027abf7de
MC: Split MCObjectWriter out of MCAssembler.cpp.
...
llvm-svn: 98949
2010-03-19 09:28:59 +00:00
49e5a8ac2a
MCAssembler: Pull out MCObjectWriter class.
...
llvm-svn: 98948
2010-03-19 09:28:55 +00:00
f0517efc6c
MCAssembler: Move ApplyFixup to the TargetAsmBackend, this is a target specific not object writer specific task.
...
llvm-svn: 98947
2010-03-19 09:28:12 +00:00
3cab275783
MC/Mach-O: Lift the fixup evaluation and application up (to the same place), and eliminate MCAsmFixup::FixedValue.
...
llvm-svn: 98944
2010-03-19 07:09:47 +00:00
d84d196a86
MC/Mach-O: Factor out ExecutePostLayoutBinding, to separate the post-layout changes the object writer may need to make to the assembler from the actual .o writing.
...
llvm-svn: 98943
2010-03-19 07:09:33 +00:00
563d40eda6
MC/Mach-O: Lift relocation emission logic a bit higher to separate evaluation / relocation handling from the actual .o writing.
...
llvm-svn: 98942
2010-03-19 07:09:18 +00:00
22a411ff5b
Remove a memory leak from the CBackend.
...
llvm-svn: 98941
2010-03-19 07:06:46 +00:00
90a7859ebc
fix an MCInstPrinter leak that jyasskin pointed out:
...
createAsmStreamer now takes ownership of the instprinter.
llvm-svn: 98939
2010-03-19 05:48:53 +00:00
bb34b4e10f
resolve fixme: we now infer the instruction-level 'isvariadic' bit
...
from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
2010-03-19 05:34:15 +00:00
0433699ef0
set SDNPVariadic on nodes throughout the rest of the targets that
...
need them.
llvm-svn: 98937
2010-03-19 05:33:51 +00:00
4822dfcc9a
Remove a memory leak from ThumbTargetMachine.
...
llvm-svn: 98936
2010-03-19 05:25:28 +00:00
83aeaab462
add a new SDNPVariadic SDNP node flag, and use it in
...
dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
2010-03-19 05:07:09 +00:00
be6b17f927
rewrite EnforceSmallerThan to be less bone headed.
...
llvm-svn: 98933
2010-03-19 04:54:36 +00:00
e5ac9382ce
remove some damaged sign extend patterns that can never match.
...
llvm-svn: 98932
2010-03-19 04:53:47 +00:00
6d984166fc
disable some illegal blackfin patterns. sext from i32 to i32 can never
...
match. Jakob, please take a look when you get a chance.
llvm-svn: 98931
2010-03-19 04:53:21 +00:00
607795f917
comment out a bunch of parallel store patterns that apparently
...
can't match or just have no testcases. Will remove after
confirmation from dan that they really are dead.
llvm-svn: 98930
2010-03-19 04:14:21 +00:00
857955243e
Fix -Asserts warnings.
...
llvm-svn: 98928
2010-03-19 03:18:23 +00:00
ec71ba25e5
Fix -Asserts warning.
...
llvm-svn: 98927
2010-03-19 03:18:20 +00:00
0f7fbb3d00
MC/Mach-O: Add isScatteredFixupFullyResolved, which implements the correct algorithm (used on x86_64) for determining whether an evaluated fixup is fully resolved (doesn't need relocation).
...
- Test cases will follow, once we have x86_64 relocation support.
llvm-svn: 98926
2010-03-19 03:18:18 +00:00
6e13bb07fb
MC/Mach-O/x86_64: Add getAtom[ForAddress].
...
- These find the defining symbol which identifies the containing atom for a symbol or address. They are currently very slow, but will be eliminated eventually.
llvm-svn: 98925
2010-03-19 03:18:15 +00:00
5ec4bdd1b3
MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases.
...
llvm-svn: 98924
2010-03-19 03:18:12 +00:00
c558ec211f
MC/Mach-O: Factor out isSymbolLinkerVisible method; "linker visible" is a made up term to refer to non-temporary labels + temporary labels in sections-which-require symbols. For Darwin, it corresponds to symbols which effectively define an atom.
...
llvm-svn: 98923
2010-03-19 03:18:09 +00:00
fab9b02fc8
Drop KLEE blurb, we don't have anything new.
...
llvm-svn: 98922
2010-03-19 03:18:05 +00:00
7ad43f8768
Fixed a widening bug where we were not using the correct size for the load
...
llvm-svn: 98920
2010-03-19 01:19:52 +00:00
c9deca20e8
X86: Fix encoding for TEST64rr.
...
llvm-svn: 98919
2010-03-19 01:15:03 +00:00
da5b4ad03e
eliminate the last use of EEVT::isUnknown
...
llvm-svn: 98918
2010-03-19 01:14:27 +00:00
fbd0109ca4
Remove `ignore` from LLVMC/TestWarnings.td. This avoids
...
https://bugs.kde.org/show_bug.cgi?id=231257 and seems not to have been
needed in the first place.
llvm-svn: 98917
2010-03-19 01:10:41 +00:00
1802b17b65
Finally change the instruction looking map to be a densemap from
...
record* -> instrinfo instead of std::string -> instrinfo.
This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).
llvm-svn: 98916
2010-03-19 01:07:44 +00:00
4763dbeaf6
make inst_begin/inst_end iterate over InstructionsByEnumValue.
...
Use CodeGenTarget::getInstNamespace in one place and fix it.
llvm-svn: 98915
2010-03-19 01:00:55 +00:00
2d822ab185
revert 98912
...
llvm-svn: 98914
2010-03-19 00:50:47 +00:00
45e2fc5ac1
make inst_begin/inst_end iterate over InstructionsByEnumValue.
...
llvm-svn: 98912
2010-03-19 00:40:22 +00:00
065232fcd1
FP16 constfolding
...
llvm-svn: 98911
2010-03-19 00:36:35 +00:00
918be520dc
change Target.getInstructionsByEnumValue to return a reference
...
to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
2010-03-19 00:34:35 +00:00
1734e47d20
Revert r98892. BSD systems may not have bash installed at all.
...
llvm-svn: 98909
2010-03-19 00:32:11 +00:00
c9ae94c793
factor copy and paste code.
...
llvm-svn: 98908
2010-03-19 00:23:20 +00:00
70eb897d7c
don't go through getInstructions().
...
llvm-svn: 98906
2010-03-19 00:18:23 +00:00
71bd0f4eda
Bugpoint's default memory limit (100MB) was too low for valgrind, so
...
this patch raises the default to 800MB when valgrind's active. 800
was chosen semi-arbitrarily.
llvm-svn: 98905
2010-03-19 00:09:28 +00:00
9aec14b560
look up instructions by record, not by name.
...
llvm-svn: 98904
2010-03-19 00:07:20 +00:00
83facb0812
Now that tblgen can handle matching implicit defs of instructions
...
to input patterns, we can fix X86ISD::CMP and X86ISD::BT as taking
two inputs (which have to be the same type) and *returning an i32*.
This is how the SDNodes get made in the graph, but we weren't able
to model it this way due to deficiencies in the pattern language.
Now we can change things like this:
def UCOM_FpIr80: FpI_<(outs), (ins RFP80:$lhs, RFP80:$rhs), CompareFP,
- [(X86cmp RFP80:$lhs, RFP80:$rhs),
- (implicit EFLAGS)]>; // CC = ST(0) cmp ST(i)
+ [(set EFLAGS, (X86cmp RFP80:$lhs, RFP80:$rhs))]>;
and fix terrible crimes like this:
-def : Pat<(parallel (X86cmp GR8:$src1, 0), (implicit EFLAGS)),
+def : Pat<(X86cmp GR8:$src1, 0),
(TEST8rr GR8:$src1, GR8:$src1)>;
This relies on matching the result of TEST8rr (which is EFLAGS, which is
an implicit def) to the result of X86cmp, an i32.
llvm-svn: 98903
2010-03-19 00:01:11 +00:00
a4d86b63c7
Update comment to refer to the right filename.
...
llvm-svn: 98902
2010-03-18 23:57:57 +00:00
8e9b895c37
tidy up
...
llvm-svn: 98901
2010-03-18 23:57:57 +00:00
63a627cd88
expand tblgen's support for instructions with implicit defs.
...
llvm-svn: 98900
2010-03-18 23:57:40 +00:00
fdc20711e8
infer results of a pattern from implicit defs. This allows you to do something
...
like this:
def : Pat<(add ...),
(FOOINST)>;
When fooinst only has a single implicit def (e.g. to R1). This will be handled
as if written as (set R1, (FOOINST ...))
llvm-svn: 98897
2010-03-18 23:15:10 +00:00
3eb346caeb
Work around a valgrind oddity where it doesn't pass the full path of a
...
script to the #! command by using bash instead of /bin/sh. Bash
searches $PATH for its script argument, but dash, which /bin/sh
resolves to on some systems, does not.
https://bugs.kde.org/show_bug.cgi?id=231257 tracks the valgrind
problem.
llvm-svn: 98892
2010-03-18 22:56:02 +00:00
f11aa9e7b4
Get rid of target-specific fp <-> int nodes when still I'm here.
...
llvm-svn: 98889
2010-03-18 22:35:45 +00:00
64578d5599
Get rid of target-specific nodes for fp16 <-> fp32 conversion.
...
llvm-svn: 98888
2010-03-18 22:35:37 +00:00
422dd6608a
Refactor Reg-Reg copy emission routine for ARM. This makes cross-regclass copies weirdness more straightforward. Also, add GPR <-> SPR copy support.
...
llvm-svn: 98887
2010-03-18 22:35:02 +00:00
5e95aee159
Couple of changes that Dan mentioned for llvm.stackprotector fast-isel.
...
llvm-svn: 98881
2010-03-18 21:58:33 +00:00
2ca1108254
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
...
were missing it on some movq instructions and were not including the appropriate
PCrel bias.
llvm-svn: 98880
2010-03-18 21:53:54 +00:00
2130a3e0af
capture implicit uses and defs in CodeGenInstruction
...
llvm-svn: 98879
2010-03-18 21:42:03 +00:00
13590892e7
simplify this code, the # of sets in the pattern for an instruction
...
shouldn't change this.
llvm-svn: 98872
2010-03-18 21:15:05 +00:00
81fd1f20ba
disallow concatenation of two dags with different operators.
...
llvm-svn: 98871
2010-03-18 21:07:51 +00:00
1f22d278f3
rewrite this to not artificially force concat the ins/outs list.
...
llvm-svn: 98870
2010-03-18 21:07:39 +00:00
fb2ceede8f
fix some buggy ops concatentation
...
llvm-svn: 98869
2010-03-18 21:06:54 +00:00
0f03747577
eliminate support for "ops" in the input/output list of an
...
instruction. Instructions must use 'ins' and 'outs' now.
llvm-svn: 98868
2010-03-18 20:56:35 +00:00
b7f6d172b8
use ins/outs
...
llvm-svn: 98867
2010-03-18 20:55:31 +00:00
983b479c91
use ins/outs.
...
llvm-svn: 98866
2010-03-18 20:55:18 +00:00
5f418eafdc
remove some code that was working around old sparc v9 backend bugs.
...
Add checking that the input/output operand list in spelled right.
llvm-svn: 98865
2010-03-18 20:50:52 +00:00
0204bc3de1
outs come before ins.
...
llvm-svn: 98864
2010-03-18 20:50:06 +00:00
52ecfdf3c5
Make fast-isel understand llvm.stackprotector.
...
llvm-svn: 98862
2010-03-18 20:27:26 +00:00
a7f236ae3a
Refactor NEON ld/st instructions to hardcode class arguments that are constants.
...
No functional changes.
llvm-svn: 98860
2010-03-18 20:18:39 +00:00
9e6437ee7d
lit: Tweak example tests config.
...
llvm-svn: 98859
2010-03-18 20:06:05 +00:00
63ec093b6e
MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
...
temporary workaround for matching inc/dec on x86_64 to the correct instruction.
- This hack will eventually be replaced with a robust mechanism for handling
matching instructions based on the available target features.
llvm-svn: 98858
2010-03-18 20:06:02 +00:00
451a435473
MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,
...
to allow custom post-processing of matched instructions.
llvm-svn: 98857
2010-03-18 20:05:56 +00:00
b3f659c8c8
fix an x86-64 encoding bug Daniel found.
...
llvm-svn: 98855
2010-03-18 20:04:36 +00:00
17323bb7cf
offsetof always has type size_t.
...
llvm-svn: 98854
2010-03-18 19:37:35 +00:00
a5ca578384
Simplify this code.
...
llvm-svn: 98853
2010-03-18 19:34:33 +00:00
f9c044f6dc
Fix a name clash that was breaking MSVC builds.
...
llvm-svn: 98852
2010-03-18 19:34:06 +00:00
cb4935018d
Explicitly cast std::min's arguments to avoid type mismatches.
...
llvm-svn: 98851
2010-03-18 19:01:12 +00:00
a9d0ef1e45
another one
...
llvm-svn: 98850
2010-03-18 18:59:08 +00:00
01c65a2622
Define placement new wrappers for BumpPtrAllocator and
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RecyclingAllocator to allow client code to be simpler, and
simplify several clients.
llvm-svn: 98847
2010-03-18 18:49:47 +00:00
ed4c2eb7bf
Make this test more lenient; with SmallVector now using actually
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aligned storage, the capacity may be more than what is explicitly
requested.
llvm-svn: 98846
2010-03-18 18:47:50 +00:00
3c7cde466e
Fix pr6543: svn r88806 changed MachineJumpTableInfo::getJumpTableIndex() to
...
always create a new jump table. The intention was to avoid merging jump
tables in SelectionDAGBuilder, and to wait for the branch folding pass to
merge tables. Unfortunately, the same getJumpTableIndex() method is also
used to merge tables in branch folding, so as a result of this change
branch tables are never merged. Worse, the branch folding code is expecting
getJumpTableIndex to always return the index of an existing table, but with
this change, it never does so. In at least some cases, e.g., pr6543, this
creates references to non-existent tables.
I've fixed the problem by adding a new createJumpTableIndex function, which
will always create a new table, and I've changed getJumpTableIndex to only
look at existing tables.
llvm-svn: 98845
2010-03-18 18:42:41 +00:00
48d09cab66
Fix a bug found by inspection; in the __GNUC__ code, the alignment
...
doesn't apply to the type, only to the variable, so subsequent uses
of U which expect it to be aligned weren't actually aligned.
llvm-svn: 98843
2010-03-18 18:40:47 +00:00
1a5bea2017
Nick wants these alphabetized
...
llvm-svn: 98840
2010-03-18 18:18:00 +00:00
a3a66b28b6
add a special relocation type for movq loads for object
...
files that produce special relocation types where the
linker changes movq's into lea's.
llvm-svn: 98839
2010-03-18 18:10:56 +00:00
5856f2092c
Add explicit braces to avoid ambiguous ‘else’.
...
llvm-svn: 98838
2010-03-18 18:07:13 +00:00
eaceb9fd39
callq is pcrelative
...
llvm-svn: 98835
2010-03-18 17:52:22 +00:00
ce51f782dd
Check if function names start with "llvm." before trying to lookup them up as
...
intrinsics. The intrinsic lookup code assumes that this check has been done
and assumes the names are at least 6 characters long. Valgrind complained
about this. pr6638.
llvm-svn: 98831
2010-03-18 16:52:15 +00:00
0b39f10d10
Fix comment.
...
llvm-svn: 98830
2010-03-18 16:41:16 +00:00
6556c8962c
Add the ability to "intern" FoldingSetNodeID data into a
...
BumpPtrAllocator-allocated region to allow it to be stored in a more
compact form and to avoid the need for a non-trivial destructor call.
Use this new mechanism in ScalarEvolution instead of
FastFoldingSetNode to avoid leaking memory in the case where a
FoldingSetNodeID uses heap storage, and to reduce overall memory
usage.
llvm-svn: 98829
2010-03-18 16:16:38 +00:00
3aa84e531e
Adding MicroBlaze as an experimental backend in the release notes
...
llvm-svn: 98824
2010-03-18 14:31:30 +00:00
e5ca63acc8
CMake: Add options for using static runtime on MSVC++ build.
...
Patch by Victor Zverovich!
llvm-svn: 98821
2010-03-18 13:52:05 +00:00
dae75defc8
Add an extra newline to separate PP directives from the contents
...
llvm-svn: 98820
2010-03-18 13:16:38 +00:00
4f67227625
Try to fix a valgrind error on 32 bit platforms: use %zu instead of %llu to format a size_t.
...
llvm-svn: 98819
2010-03-18 12:18:36 +00:00
fa22878d9d
Avoid a problem in libc_freeres() seen on a linux-i686 buildbot when running
...
under valgrind:
==19577== Invalid free() / delete / delete[]
==19577== at 0x4C9C866: free (vg_replace_malloc.c:325)
==19577== by 0x5121104: ??? (in /lib/libc-2.10.2.so)
==19577== by 0x4C97412: _vgnU_freeres (vg_preloaded.c:62)
==19577== by 0x5041486: __run_exit_handlers (exit.c:93)
==19577== by 0x50414FE: exit (exit.c:100)
==19577== by 0x5028B5C: (below main) (libc-start.c:254)
==19577== Address 0xffffffff is not stack'd, malloc'd or (recently) free'd
==19577==
Apparently this happens under certain versions of glibc, so valgrind provides
the --run-libc-freeres=no option to avoid calling freeres(). This may increase
the number of "still reachable" blocks valgrind reports, but we don't care
about those, while this error breaks the buildbots.
There are upstream bugs about this at
http://sourceware.org/bugzilla/show_bug.cgi?id=10610 and
http://bugs.kde.org/show_bug.cgi?id=167483 , but they don't look likely to be
fixed.
llvm-svn: 98813
2010-03-18 07:00:12 +00:00
bf724b9ee0
Turning off post-ra scheduling for x86. It isn't a consistent win.
...
llvm-svn: 98810
2010-03-18 06:55:42 +00:00
5b59a73dc1
add a couple blurbs back
...
llvm-svn: 98809
2010-03-18 06:52:15 +00:00
0052449e1a
Reapply r98755 with a thinko which miscompiled gengtype fixed.
...
llvm-svn: 98793
2010-03-18 01:17:13 +00:00
9c64ec0a7e
MCValue: Change to holding MCSymbolRefExprs instead of MCSymbols, we will need this for accessing to symbol modifiers.
...
llvm-svn: 98791
2010-03-18 00:59:10 +00:00
6a7bd66d8e
Add MCSymbol::isInSection.
...
llvm-svn: 98790
2010-03-18 00:59:02 +00:00
6544baff6f
MC/Darwin: Add a new target hook for whether the target uses "reliable" symbol differences, basically whether the assembler should attempt to understand atoms when using scattered symbols.
...
Also, avoid some virtual call overhead.
llvm-svn: 98789
2010-03-18 00:58:53 +00:00
8575110ae1
Revert "Change coalescer complexity from N^2 to N logN by changing one letter."
...
This reverts commit 98776. It broke the llvm-gcc boot strap.
llvm-svn: 98784
2010-03-18 00:23:47 +00:00
68333f5c6e
X86 address mode matching code MatchAddressRecursively does some aggressive hack which require doing a RAUW. It may end up deleting some SDNode up stream. It should avoid referencing deleted nodes.
...
llvm-svn: 98780
2010-03-17 23:58:35 +00:00
7976f6f03c
Debug info intrinsic does not intefer during tail call optimization.
...
llvm-svn: 98778
2010-03-17 23:52:37 +00:00
274a0d3794
Revert 98745 with respect to the addition of NEONFrm subformats for disassembly.
...
There is a better way coming up.
llvm-svn: 98777
2010-03-17 23:26:50 +00:00
6589f7152e
Change coalescer complexity from N^2 to N logN by changing one letter.
...
Remove ugly hack that aborted the coalescer before using N^2 time.
This affects functions with very complicated live intervals for physical
registers, i.e. functions with thousands of function calls.
llvm-svn: 98776
2010-03-17 23:21:58 +00:00
0910b5afac
Fixed a bug in the IT mask printing where T means the cond bit in the mask
...
matches that of Firstcond[0] and E means otherwise. The Firstcond[0] is also
tagged in the Mask to facilitate Asm printing. The disassembler also depends
on this arrangement. This is similar to what's described in A2.5.2 ITSTATE.
Ran:
utils/lit/lit.py test/CodeGen/ARM test/CodeGen/Thumb test/CodeGen/Thumb2
successfully.
llvm-svn: 98775
2010-03-17 23:14:23 +00:00
8609782366
Refines 98745 so that it only contains the patch related to the output of the
...
addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>.
This patch removes the impl of printT2AddrModeImm8s4OffsetOperand() from
ARMAsmPrinter.cpp. It is used by disassembler as of now.
llvm-svn: 98774
2010-03-17 23:01:59 +00:00
8b02a0f769
Changed install_name for libEnhancedDisassembly.dylib on
...
Mac OS X to match current install location. This has no
effect on other platforms.
llvm-svn: 98773
2010-03-17 22:01:36 +00:00
021b995bb2
remove arm mode workaround for ARM host
...
llvm-svn: 98771
2010-03-17 21:28:19 +00:00
86bcdccb65
Use llvm-gcc to build ARM when it's available
...
llvm-svn: 98770
2010-03-17 21:25:13 +00:00
a6fe21a79a
Clean up whitespace.
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llvm-svn: 98769
2010-03-17 21:16:45 +00:00
69ba1bcd05
Increase format field from 5 to 6 bits. ARMII::FormMask was increased to 0x3f
...
in svn r74988 but the format field was never widened.
llvm-svn: 98768
2010-03-17 21:13:43 +00:00
a4d1c8f59f
Initialize Size member to appease valgrind.
...
llvm-svn: 98763
2010-03-17 19:55:31 +00:00
d2abecaeea
Revert 98755, which may be causing trouble.
...
llvm-svn: 98762
2010-03-17 19:54:53 +00:00
6221720599
feedback from Nick
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llvm-svn: 98761
2010-03-17 19:27:31 +00:00
5c9b0e1a6e
Change SCEVNAryExpr's operand array from a SmallVector to a plain
...
pointer and length, and allocate the arrays in ScalarEvolution's
BumpPtrAllocator, so that they get released when their owning
SCEV gets released. SCEVs are immutable, so they don't need to worry
about operand array resizing. This fixes a memory leak reported
in PR6637.
llvm-svn: 98755
2010-03-17 18:51:01 +00:00
5a00b19a29
Remove an unnecessary (and misspelled) typedef. Tweak whitespace.
...
llvm-svn: 98753
2010-03-17 18:43:25 +00:00
e78e58ce2f
missing include
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llvm-svn: 98752
2010-03-17 18:33:00 +00:00
6e81f67b09
98745 contains something unrelated to the patch.
...
Remove it from ARMAddressingModes.h.
llvm-svn: 98751
2010-03-17 18:32:39 +00:00
9b65c38961
notes from evan
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llvm-svn: 98748
2010-03-17 18:15:52 +00:00
8f3004cff2
Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
...
instructions to help disassembly.
We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60.
And modified test cases to not expect '+' in +reg or #+num. For example,
; CHECK: ldr.w r9, [r7, #28 ]
llvm-svn: 98745
2010-03-17 17:52:21 +00:00
6981c258f7
Testcase for r98728.
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llvm-svn: 98744
2010-03-17 17:51:08 +00:00
852a04e7ce
Fix EmitSectionOffset incorrect argument. DwarfDebug is emitting debug info so isEH is always false. This was hiding until now from compilers because of default arguments. This was hiding from dwarf debug info users because for most of the platform isAbsoluteEHSectionOffsets() is same as isAbsoluteDebugSectionOffsets(). But Chris found it while updating dwarf printer to use MC*.
...
llvm-svn: 98743
2010-03-17 17:29:55 +00:00
6aba4862c5
several updates
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llvm-svn: 98742
2010-03-17 17:25:49 +00:00
11122eafe7
Make lit pay attention to --vg for tcl tests too, which makes it work on LLVM's
...
non-unit tests.
llvm-svn: 98741
2010-03-17 17:04:56 +00:00
2a4b080c5d
Fixed spelling errors.
...
llvm-svn: 98724
2010-03-17 15:01:50 +00:00
c4e3f05380
Fix a false-positive memory leak in code using RemoveFileOnSignal(). Because
...
libstdc++'s std::string class points to the interior of an allocation, valgrind
reports strings still alive at program termination as possible leaks. I didn't
use a ManagedStatic for this because System can't depend on Support.
llvm-svn: 98716
2010-03-17 07:08:12 +00:00
6184f4db34
combiner-aa too, what's its status?
...
llvm-svn: 98715
2010-03-17 06:42:25 +00:00
10a3cc46fd
more chris scribble.
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llvm-svn: 98714
2010-03-17 06:41:58 +00:00
aed00fa039
fix GetOrCreateTemporarySymbol to require a name, clients
...
should use CreateTempSymbol() if they don't care about the
name.
llvm-svn: 98712
2010-03-17 05:41:18 +00:00
0b1c9a52b4
add a bunch of random and unformatted notes as I am reading
...
through tons of old commits.
llvm-svn: 98709
2010-03-17 04:41:49 +00:00
c871bac79b
add logo, comment out project info, they need to send updates
...
to get reincluded.
llvm-svn: 98706
2010-03-17 04:02:39 +00:00
476e541673
remove dead variable, patch by Nathan Howell!
...
llvm-svn: 98704
2010-03-17 01:45:17 +00:00
b5cd01335b
Fix death tests in -Asserts builds.
...
llvm-svn: 98701
2010-03-17 01:18:45 +00:00
572a194c35
Remove a check that can no longer be true, after r84803.
...
llvm-svn: 98694
2010-03-16 23:40:32 +00:00
c7ba918b84
Revert 98683. It is breaking something in the disassembler.
...
llvm-svn: 98692
2010-03-16 23:01:13 +00:00
403062313f
Fix liveintervals handling of dbg_value instructions.
...
llvm-svn: 98686
2010-03-16 21:51:27 +00:00
c953bca10b
Remove redundant writeback flag from ARM address mode 6. Also remove the
...
optional register update argument, which is currently unused -- when we add
support for that, it can just be a separate operand.
llvm-svn: 98683
2010-03-16 21:44:40 +00:00
8fce3dddfa
reapply r98656 unmodified, which exposed the asmprinter not
...
handling constant unions.
llvm-svn: 98680
2010-03-16 21:25:55 +00:00
71ab18bdd5
Disambiguate the *_UPD and * variants by specifying the writeback flag as 1.
...
This is for the disassembly work.
There are cases where this is not possible, for example, A8.6.53 LDM Encoding T1.
In such case, we'll use an adhoc approach to deduce the Opcode programmatically.
llvm-svn: 98679
2010-03-16 21:25:05 +00:00
b981fcf2d8
add asmprinter suport for unions, fixing Feature/unions.ll to actually
...
be doing something useful.
llvm-svn: 98677
2010-03-16 21:21:35 +00:00
a0bb715977
Ignore debug value instructions while analyzing BB for tail duplication.
...
llvm-svn: 98675
2010-03-16 21:02:07 +00:00
8801b810bb
Revert r98666 too; it's checkin-without-testing day!
...
llvm-svn: 98673
2010-03-16 20:52:59 +00:00
f2e4b5dd7f
str[r]chr returns its pointer argument so we cannot mark it as nocapture. Thanks to Duncan for spotting my mistake.
...
llvm-svn: 98671
2010-03-16 20:33:15 +00:00
5aa4a42c77
temporarily xfail
...
llvm-svn: 98666
2010-03-16 20:08:07 +00:00
5cf5fd2ffa
Mark str[r]chr readonly.
...
llvm-svn: 98663
2010-03-16 19:36:43 +00:00
3a374da973
Revert r98656, its breaking all over the place.
...
llvm-svn: 98662
2010-03-16 19:35:34 +00:00
9ae99e0df5
improve support for uniontype and ConstantUnion, patch by Tim Northover!
...
llvm-svn: 98656
2010-03-16 19:15:03 +00:00
5a6dc1dd09
Add an rdar number to this test.
...
llvm-svn: 98654
2010-03-16 19:08:20 +00:00
13439783fb
work around an MSVC2010 bug, PR6504
...
llvm-svn: 98653
2010-03-16 19:07:05 +00:00
e0fa09cb05
Chris pointed out that producing undef here is wrong in
...
general.
llvm-svn: 98649
2010-03-16 18:50:54 +00:00
466d1e3dc2
Remove redundant writeback flag in ARM addressing mode 5.
...
llvm-svn: 98648
2010-03-16 18:38:09 +00:00
Bob Wilson