On the x86-64 and thumb2 targets, some registers are more expensive to encode
than others in the same register class.
Add a CostPerUse field to the TableGen register description, and make it
available from TRI->getCostPerUse. This represents the cost of a REX prefix or a
32-bit instruction encoding required by choosing a high register.
Teach the greedy register allocator to prefer cheap registers for busy live
ranges (as indicated by spill weight).
llvm-svn: 129864
alignment, which causes traps further down the line. Fixes
<rdar://problem/9109755>, which contains a test case far too large to
commit :(
llvm-svn: 129861
out-of-line destructors can result in the addition of redundant
destructors to a class. It's not harmful to the AST. Fixes
<rdar://problem/9158632>.
llvm-svn: 129860
To do this currently, it must be done in multi-line mode:
(lldb) commands regex --help "Help text for command" --syntax "syntax for command" <cmd-name>
Any example that would use "f" for "finish" when there are no arguments,
and "f <num>" to do a "frame select <num>" would be:
(lldb) commands regex f
Enter multiple regular expressions in the form s/find/replace/ then terminate with an empty line:
s/^$/finish/
s/([0-9]+)/frame select %1/
(lldb) f 11
frame select 12
...
(lldb) f
finish
...
Also added the string version of the OptionValue as OptionValueString.
llvm-svn: 129855
used by Clang. To help Clang integration, the PTX target has been split
into two targets: ptx32 and ptx64, depending on the desired pointer size.
- Add GCCBuiltin class to all intrinsics
- Split PTX target into ptx32 and ptx64
llvm-svn: 129851
llvm is built with unsigned chars where an immediate such as 0xff would be zero
extended to 64-bits, turning "cmp $0xff,%eax" into
"cmp $0xffffffffffffffff,%eax".
llvm-svn: 129845
manually and pass all (now) 4 arguments to the mul libcall. Add a new
ExpandLibCall for just this (copied gratuitously from type legalization).
Fixes rdar://9292577
llvm-svn: 129842
during deserialization from a precompiled header, and update all of
its callers to note when this problem occurs and recover (more)
gracefully. Fixes <rdar://problem/9119249>.
llvm-svn: 129839
The idea is that the instruction to be emulated is actually executed
on the hardware to be emulated, with the before and after state of the
hardware being captured and 'freeze-dried' into .dat files. The
emulation testing code then loads the before & after state from the
.dat file, emulates the instruction using the before state, and
compares the resulting state to the 'after' state. If they match, the
emulation is accurate, otherwise there is a problem.
The final format of the .dat files needs a bit more work; the plan is
to generalize them a bit and to convert the plain values to key-value pairs.
But I wanted to get this first pass committed.
This commit adds arm instruction emulation testing to the testsuite, along with
many initial .dat files.
It also fixes a bug in the llvm disassembler, where 32-bit thumb opcodes
were getting their upper & lower 16-bits reversed.
There is a new Instruction sub-class, that is intended to be loaded
from a .dat file rather than read from an executable. There is also a
new EmulationStateARM class, for handling the before & after states.
EmulationStates for other architetures can be added later when we
emulate their instructions.
llvm-svn: 129832
were computing the conversion as (ptr != 0 && non-virtual), when it should be
(ptr != 0 || is-virtual).
- Test to follow in LLVM test-suite.
llvm-svn: 129830
places that were dumping values for the settings. Centralized all of the
value dumping into a single place. When dumping values that aren't strings
we no longer surround the value with single quotes. When dumping values that
are strings, surround the string value with double quotes. When dumping array
values, assume they are always string values, and don't put quotes around
dictionary values.
llvm-svn: 129826
Jakob Stoklund Olesen