Commit Graph

14 Commits

Author SHA1 Message Date
Andrew Trick 10ffc2b6c2 Various bits of framework needed for precise machine-level selection
DAG scheduling during isel. Most new functionality is currently
guarded by -enable-sched-cycles and -enable-sched-hazard.

Added InstrItineraryData::IssueWidth field, currently derived from
ARM itineraries, but could be initialized differently on other targets.

Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
active, and if so how many cycles of state it holds.

Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
into the scheduler's available queue.

ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
get information about it's SUnits, provides RecedeCycle for bottom-up
scheduling, correctly computes scoreboard depth, tracks IssueCount, and
considers potential stall cycles when checking for hazards.

ScheduleDAGRRList now models machine cycles and hazards (under
flags). It tracks MinAvailableCycle, drives the hazard recognizer and
priority queue's ready filter, manages a new PendingQueue, properly
accounts for stall cycles, etc.

llvm-svn: 122541
2010-12-24 05:03:26 +00:00
Andrew Trick c416ba612b whitespace
llvm-svn: 122539
2010-12-24 04:28:06 +00:00
Oscar Fuentes a97311f152 Use `llvm::next' instead of `next' to make VC++ 2010 happy.
llvm-svn: 105168
2010-05-30 13:14:21 +00:00
Dan Gohman 52c2738324 Eliminate the use of PriorityQueue and just use a std::vector,
implementing pop with a linear search for a "best" element. The priority
queue was a neat idea, but in practice the comparison functions depend
on dynamic information.

llvm-svn: 104718
2010-05-26 18:52:00 +00:00
Dan Gohman 7c00576a62 Change push_all to a non-virtual function and implement it in the
base class, since all the implementations are the same.

llvm-svn: 104659
2010-05-26 01:10:55 +00:00
David Goodwin 80a03cc0b1 Remove some old experimental code that is no longer needed. Remove additional, speculative scheduling pass as its cost did not translate into significant performance improvement. Minor tweaks.
llvm-svn: 89471
2009-11-20 19:32:48 +00:00
David Goodwin da83f7d58b Rename registers to break output dependencies in addition to anti-dependencies.
llvm-svn: 87015
2009-11-12 19:08:21 +00:00
David Goodwin 8501dbbe10 Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.
llvm-svn: 85939
2009-11-03 20:57:50 +00:00
Dan Gohman b9a012156b Add initial support for back-scheduling address computations,
especially in the case of addresses computed from loop induction
variables.

llvm-svn: 61075
2008-12-16 03:35:01 +00:00
Dan Gohman dddc1ac7ea Fix some register-alias-related bugs in the post-RA scheduler liveness
computation code. Also, avoid adding output-depenency edges when both
defs are dead, which frequently happens with EFLAGS defs.

Compute Depth and Height lazily, and always in terms of edge latency
values. For the schedulers that don't care about latency, edge latencies
are set to 1.

Eliminate Cycle and CycleBound, and LatencyPriorityQueue's Latencies array.
These are all subsumed by the Depth and Height fields.

llvm-svn: 61073
2008-12-16 03:25:46 +00:00
Dan Gohman 43a120303b Update CalcLatency to work in terms of edge latencies, rather than
node latencies. Use CalcLatency instead of manual code in
CalculatePriorities to keep it consistent. Previously it
computed slightly different results.

llvm-svn: 60817
2008-12-10 00:24:36 +00:00
Dan Gohman 2d170896ee Rewrite the SDep class, and simplify some of the related code.
The Cost field is removed. It was only being used in a very limited way,
to indicate when the scheduler should attempt to protect a live register,
and it isn't really needed to do that. If we ever want the scheduler to
start inserting copies in non-prohibitive situations, we'll have to
rethink some things anyway.

A Latency field is added. Instead of giving each node a single
fixed latency, each edge can have its own latency. This will eventually
be used to model various micro-architecture properties more accurately.

The PointerIntPair class and an internal union are now used, which
reduce the overall size.

llvm-svn: 60806
2008-12-09 22:54:47 +00:00
Dan Gohman 37c496979c Don't charge full latency for an anti-dependence, in this simplistic
pipeline model.

llvm-svn: 60733
2008-12-09 00:26:46 +00:00
Dan Gohman 60cb69e665 Experimental post-pass scheduling support. Post-pass scheduling
is currently off by default, and can be enabled with
-disable-post-RA-scheduler=false.

This doesn't have a significant impact on most code yet because it doesn't
yet do anything to address anti-dependencies and it doesn't attempt to
disambiguate memory references. Also, several popular targets
don't have pipeline descriptions yet.

The majority of the changes here are splitting the SelectionDAG-specific
code out of ScheduleDAG, so that ScheduleDAG can be moved to
libLLVMCodeGen.a. The interface between ScheduleDAG-using code and
the rest of the scheduling code is somewhat rough and will evolve.

llvm-svn: 59676
2008-11-19 23:18:57 +00:00