6353e534ec
Teach PPCInstrInfo::storeRegToStackSlot and loadRegFromStackSlot to add memory
...
operands.
Hopefully this fixes the llvm-gcc-powerpc-darwin9 buildbot. It really shouldn't
since missing memoperands should not affect correctness.
llvm-svn: 108540
2010-07-16 18:22:00 +00:00
efd7f9c360
Reorder the contents of various getAnalysisUsage functions, eliminating
...
a redundant loopsimplify run from the default -O2 sequence.
llvm-svn: 108539
2010-07-16 17:58:45 +00:00
1e936277c3
Revert r108369, sorting llvm.dbg.declare information by source position,
...
since it doesn't work for front-ends which don't emit column information
(which includes llvm-gcc in its present configuration), and doesn't
work for clang for K&R style variables where the variables are declared
in a different order from the parameter list.
Instead, make a separate pass through the instructions to collect the
llvm.dbg.declare instructions in order. This ensures that the debug
information for variables is emitted in this order.
llvm-svn: 108538
2010-07-16 17:54:27 +00:00
c30b4ddc58
Remove the X86::FP_REG_KILL pseudo-instruction and the X86FloatingPointRegKill
...
pass that inserted it.
It is no longer necessary to limit the live ranges of FP registers to a single
basic block.
llvm-svn: 108536
2010-07-16 17:41:44 +00:00
f0af236874
Search for a free FP register instead of just assuming FP7 is not in use.
...
llvm-svn: 108535
2010-07-16 17:41:40 +00:00
8a39c807e2
Remove the rest of my instcombine changes. Back to the drawing board on this one.
...
llvm-svn: 108530
2010-07-16 16:39:00 +00:00
0e5fb020a0
Allow x87 FP registers to be alive globally in a function.
...
FP_REG_KILL instructions are still inserted, but can be disabled by passing
-live-x87 to llc. The X87FPRegKillInserterPass is going to be removed shortly.
CFG edges are partioned into bundles where the x87 stack must be allocated
identically. Code is insertad at the end of each basic block that shuffles the
live FP registers to match the outgoing bundles expectations.
This fix is in preparation for some upcoming register allocator improvements
that may extend the live range of registers beyond a basic block, similar to
LICM. It also provides a nice runtime speedup if you are building with
-mfpmath=387.
llvm-svn: 108529
2010-07-16 16:38:12 +00:00
a279658672
Remove extraneous semicolons after member functions
...
llvm-svn: 108525
2010-07-16 15:03:23 +00:00
50729ad717
Feed the right output into FileCheck.
...
llvm-svn: 108523
2010-07-16 10:58:02 +00:00
6d673953e3
eliminate CallInst::ArgOffset
...
llvm-svn: 108522
2010-07-16 09:38:02 +00:00
17c5a23559
Get rid of a bunch of duplicated ELF enum values.
...
llvm-svn: 108520
2010-07-16 07:53:29 +00:00
ad543ecaa9
A few more minor additions to ELF.h.
...
llvm-svn: 108519
2010-07-16 07:48:07 +00:00
08928d8e23
Remove bogus link.
...
llvm-svn: 108518
2010-07-16 06:33:36 +00:00
375efe3157
Arrays and vectors with different numbers of elements are not equivalent.
...
llvm-svn: 108517
2010-07-16 06:31:12 +00:00
55f321426d
Remove unnecessary conditional.
...
llvm-svn: 108516
2010-07-16 06:13:24 +00:00
3d84c9c793
LoopSimplify does not update domfrontier correctly.
...
This fixes PR7649.
llvm-svn: 108513
2010-07-16 05:59:45 +00:00
bd7c9f701b
Add dump() to DominanceFrontier
...
llvm-svn: 108512
2010-07-16 05:59:39 +00:00
37c42a3d02
Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
...
TII::isMoveInstr is going tobe completely removed.
llvm-svn: 108507
2010-07-16 04:45:42 +00:00
b1671271ab
Add forgotten test case.
...
llvm-svn: 108506
2010-07-16 04:45:35 +00:00
103c4ebea5
Use the source-order scheduler instead of the "fast" scheduler at -O0,
...
because it's more likely to keep debug line information in its original
order.
llvm-svn: 108496
2010-07-16 02:01:19 +00:00
bdb298912b
build/Darwin: Add an LLVM_LTO_VERSION_OFFSET make variable to allow offsetting
...
the libLTO library version from the actual build version.
llvm-svn: 108495
2010-07-16 01:41:38 +00:00
15a81cddb4
Also revert 108422, it's causing some test failures.
...
Working on testcases for Owen.
llvm-svn: 108494
2010-07-16 01:36:12 +00:00
c88e2ccdd3
build/Clang: Build and install libLTO as part of clang-only/install-clang targets.
...
llvm-svn: 108493
2010-07-16 01:29:50 +00:00
c6eefe4d4e
Fix this test.
...
llvm-svn: 108491
2010-07-16 01:28:45 +00:00
bfd4fd7bb7
The SelectionDAGBuilder's handling of debug info, on rare
...
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place. 7797940 (6/29/2010..7/15/2010).
llvm-svn: 108484
2010-07-16 00:02:08 +00:00
4bda1c8e68
Revert. This isn't the correct way to go.
...
llvm-svn: 108478
2010-07-15 23:42:21 +00:00
fbbdfcaea7
Fix the order that SCEVExpander considers add operands in so that
...
it doesn't miss an opportunity to form a GEP, regardless of the
relative loop depths of the operands. This fixes rdar://8197217.
llvm-svn: 108475
2010-07-15 23:38:13 +00:00
973dc3b1d8
Handle code gen for the unreachable instruction if it's the only instruction in
...
the function. We'll just turn it into a "trap" instruction instead.
The problem with not handling this is that it might generate a prologue without
the equivalent epilogue to go with it:
$ cat t.ll
define void @foo() {
entry:
unreachable
}
$ llc -o - t.ll -relocation-model=pic -disable-fp-elim -unwind-tables
.section __TEXT,__text,regular,pure_instructions
.globl _foo
.align 4, 0x90
_foo: ## @foo
Leh_func_begin0:
## BB#0: ## %entry
pushq %rbp
Ltmp0:
movq %rsp, %rbp
Ltmp1:
Leh_func_end0:
...
The unwind tables then have bad data in them causing all sorts of problems.
Fixes <rdar://problem/8096481>.
llvm-svn: 108473
2010-07-15 23:32:40 +00:00
55f0c6b9fc
Split -enable-finite-only-fp-math to two options:
...
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
llvm-svn: 108465
2010-07-15 22:07:12 +00:00
0a2f1bafb6
build/Darwin: Add a missing directory dependency.
...
llvm-svn: 108463
2010-07-15 21:51:52 +00:00
f71de7f538
remove some unneeded overloads that were causing
...
ambiguity problems on some systems.
llvm-svn: 108462
2010-07-15 21:24:02 +00:00
60b131654b
fix the definitions of ConstTextCoalSection/ConstDataCoalSection
...
to keep "Text" in sync with the "pure instructions" section attribute.
Lack of this attribute was preventing the assembler from emitting
multibyte noops instructions for templates (and inlines, and other
coalesced stuff) and was causing the assembler to mismatch .o files.
This fixes rdar://8018335
llvm-svn: 108461
2010-07-15 21:22:00 +00:00
c2b3675f8b
fix indentation and 80 cols
...
llvm-svn: 108460
2010-07-15 21:19:31 +00:00
cedf95623b
Revert 108456. i.e. bring back r108444.
...
llvm-svn: 108458
2010-07-15 20:57:09 +00:00
8f59ff6b23
Revert 108444. It breaks a build.
...
llvm-svn: 108456
2010-07-15 20:25:51 +00:00
1415208292
Don't merge uses when they are targetting fixup sites with
...
different widths. In a use with a narrower fixup, formulae
may be wider than the fixup, in which case the high bits
aren't necessarily meaningful, so it isn't safe to reuse
them for uses with wider fixups.
This fixes PR7618, though the testcase is too large for a
reasonable regression test, since it heavily dependes on
hitting LSR's heuristics in a certain way.
llvm-svn: 108455
2010-07-15 20:24:58 +00:00
620693806a
fix the encoding of MMX_MOVFR642Qrr, it starts with 0xF2 not 0xF3,
...
this fixes rdar://8192860. Unfortunately it can only be triggered
with llc because llvm-mc matches another (correctly encoded) version
of this, so no testcase.
llvm-svn: 108454
2010-07-15 20:13:34 +00:00
a1501b9c50
Use dbgs() instead of errs() in a DEBUG.
...
llvm-svn: 108453
2010-07-15 20:12:42 +00:00
2da75ef315
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108452
2010-07-15 20:04:36 +00:00
64b1e82a7c
Teach ScalarEvolution how to fold trunc(undef) and anyext(undef) to undef.
...
This helps LSR behave more consistently on bugpoint-reduced testcases.
llvm-svn: 108451
2010-07-15 20:02:11 +00:00
dd5e9d8faf
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108450
2010-07-15 20:01:02 +00:00
51a9c0a1b3
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister. This time
...
make sure to allocate enough space in the std::vector.
llvm-svn: 108449
2010-07-15 19:58:14 +00:00
5a8d15c553
Reserve a goodly amount of room for the vectors.
...
llvm-svn: 108448
2010-07-15 19:41:20 +00:00
83fc06783c
build/Darwin: Add support for embedding version information in tool executables.
...
llvm-svn: 108444
2010-07-15 19:33:38 +00:00
df09db62e2
Fix crash reported in PR7653.
...
llvm-svn: 108441
2010-07-15 18:45:27 +00:00
030b0286ec
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108440
2010-07-15 18:43:09 +00:00
57681404b0
Use std::vector instead of TargetRegisterInfo::FirstVirtualRegister.
...
llvm-svn: 108438
2010-07-15 18:40:50 +00:00
eaf64d5c1e
Speculatively revert r108429 to fix the clang self-host.
...
llvm-svn: 108436
2010-07-15 18:18:57 +00:00
eb08d01061
Per Chris' suggestion, get rid of the select canonicalization and just add
...
the corresponding or-icmp-and pattern. This has the added benefit of doing
the matching earlier, and thus being less susceptible to being confused by
earlier transforms.
llvm-svn: 108429
2010-07-15 17:24:23 +00:00
13700ebb02
Remove unneeded check, and correct style.
...
llvm-svn: 108427
2010-07-15 16:38:22 +00:00
4afd412d6b
Watch out for a constant offset cancelling out a base register, forming
...
a zero. This situation arrises in Fortran code with induction variables
that start at 1 instead of 0. This fixes PR7651.
llvm-svn: 108424
2010-07-15 15:14:45 +00:00
7151dfd48a
Reapply r108378, with bugfixes, testcase, and improved comment formatting.
...
This now passes LIT, nighty test, and llvm-gcc bootstrap on my machine.
llvm-svn: 108422
2010-07-15 15:00:23 +00:00
26ec65ac3c
cache another dereferenced iterator
...
llvm-svn: 108421
2010-07-15 10:19:23 +00:00
0f470ab104
80-col.
...
llvm-svn: 108420
2010-07-15 07:49:30 +00:00
c48adb60ca
revert bill's patches in an attempt to fix the buildbot.
...
llvm-svn: 108419
2010-07-15 06:51:46 +00:00
485ce5a49c
This is a full sentence.
...
llvm-svn: 108418
2010-07-15 06:51:22 +00:00
e6f3287cbb
Disable aliases on all platforms.
...
llvm-svn: 108417
2010-07-15 06:48:56 +00:00
34231228ff
Correctly set rpath on Mac OS X for executable tools. Note that I am not certain this is the best fix; the code immediately above looks confused, as it first checks to see if we are NOT on Darwin and then checks the Darwin version number. This fix allows c-index-test (in Clang) to run outside of running the regression test suite. I would appreciate if someone reviewed this.
...
llvm-svn: 108416
2010-07-15 06:36:57 +00:00
19eff2a9f6
Fix PR7647, handling the case when 'To' ends up being
...
mutated by recursive simplification. This also enhances
ReplaceAndSimplifyAllUses to actually do a real RAUW
at the end of it, which updates any value handles
pointing to "From" to start pointing to "To". This
seems useful for debug info and random other VH users.
llvm-svn: 108415
2010-07-15 06:36:08 +00:00
e41ab07c61
make various clients of ReplaceAndSimplifyAllUses tolerate
...
it *changing* the things it replaces, not just causing them
to drop to null. There is no functionality change yet, but
this is required for a subsequent patch.
llvm-svn: 108414
2010-07-15 06:06:04 +00:00
1f7071a3e4
Fix headers.
...
llvm-svn: 108413
2010-07-15 06:05:18 +00:00
e7e6ca5c57
Use std::vector instead of a hard-coded array. The length of that array could
...
get *very* large, but we only need it to be the size of the number of pregs.
llvm-svn: 108412
2010-07-15 06:04:38 +00:00
d5b390189d
Use std::vector instead of a hard-coded array. The length of that array could
...
get *very* large, but we only need it to be the size of thenumber of pregs.
llvm-svn: 108411
2010-07-15 05:56:32 +00:00
e985a63bbf
see comment.
...
llvm-svn: 108409
2010-07-15 05:17:36 +00:00
96748161c5
add an accessor.
...
llvm-svn: 108408
2010-07-15 05:14:01 +00:00
8b3a17e613
Revert r108401; it breaks bootstrap :(
...
llvm-svn: 108407
2010-07-15 05:09:31 +00:00
fd473a746c
Add AssertingVH which makes PR7647 break consistently.
...
llvm-svn: 108401
2010-07-15 04:46:14 +00:00
e4be4308a9
Random note about bswap.
...
llvm-svn: 108396
2010-07-15 02:20:38 +00:00
28fd6785bc
a more graceful fix for test/Other/inline-asm-newline-terminator.ll,
...
follow on to r103765
llvm-svn: 108390
2010-07-15 00:37:34 +00:00
a8b4e3732b
Speculatively revert r108378; may be causing bootstrap failures.
...
llvm-svn: 108389
2010-07-15 00:33:00 +00:00
8b1bb8cfbd
Last COPY conversion.
...
llvm-svn: 108387
2010-07-14 23:58:21 +00:00
0b9aafddc5
Remove restriction on NEON alignment values. Some of the NEON ld/st
...
instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.
llvm-svn: 108386
2010-07-14 23:54:43 +00:00
9b449d5a92
Use TargetOpcode::COPY instead of X86-native register copy instructions when
...
lowering atomics. This will allow those copies to still be coalesced after
TII::isMoveInstr is removed.
llvm-svn: 108385
2010-07-14 23:50:27 +00:00
5d2c1218f1
Remove the entire docs directory from Apple-style builds.
...
This fixes a "usr_junk" verification failure when installing into /usr.
llvm-svn: 108384
2010-07-14 23:49:18 +00:00
6f4f3612cc
Try to get embedded build of llvmCore to pass verification.
...
Simplify some things in the process.
llvm-svn: 108382
2010-07-14 23:41:58 +00:00
474e56a2bf
80-col.
...
llvm-svn: 108381
2010-07-14 23:41:32 +00:00
37d91d84af
Add instcombine transforms to optimize tests of multiple bits of the same value into a single larger comparison.
...
llvm-svn: 108378
2010-07-14 23:33:51 +00:00
25e72a8920
Temporarily disable this test.
...
llvm-svn: 108371
2010-07-14 23:12:58 +00:00
29168baf4b
Make it a .ll test case.
...
llvm-svn: 108370
2010-07-14 23:12:52 +00:00
f10cd5c6cb
Make the order in which variables are described in debug information
...
independent of the order that isel happens to visit the dbg_declare
intrinsics. This fixes a bug in which the formal arguments were
being printed in reverse order, now that fast isel is going bottom up.
llvm-svn: 108369
2010-07-14 23:08:16 +00:00
769aedd523
fix indentation
...
llvm-svn: 108368
2010-07-14 23:04:59 +00:00
f1a6d7abc3
Remove some broken code to check the DISABLE_EDIS flag (edis is now in the
...
DIRS list, so it does no good to filter it from PARALLEL_DIRS), and replace
it with a check to disable building the shared library version of edis when
the flag is set. Disabling it entirely does not work because MC uses it now.
llvm-svn: 108367
2010-07-14 22:41:51 +00:00
92d8998348
Don't pass StringRef by reference.
...
llvm-svn: 108366
2010-07-14 22:38:02 +00:00
e34b383e71
Add a testcase for the vla and stack realignment warning.
...
llvm-svn: 108365
2010-07-14 22:26:35 +00:00
c12a6731c5
Properly restore DebugLoc after leaving the local constant area.
...
llvm-svn: 108364
2010-07-14 22:01:31 +00:00
6fe8c37a01
Tests for llvm-gcc commit 108360.
...
llvm-svn: 108362
2010-07-14 21:22:35 +00:00
1513217e27
Just use getParent() instead of getModuleFromVal when the value is a Function.
...
llvm-svn: 108358
2010-07-14 21:12:44 +00:00
efb8dbb3f1
Rename WriteConstantInt to WriteConstantInternal, to avoid confusion.
...
llvm-svn: 108357
2010-07-14 20:57:55 +00:00
2cfe91379b
Extend SimplifyCFG's common-destination folding heuristic to allow a single
...
"bonus" instruction to be speculatively executed. Add a heuristic to
ensure we're not tripping up out-of-order execution by checking that this bonus
instruction only uses values that were already guaranteed to be available.
This allows us to eliminate the short circuit in (x&1)&&(x&2).
llvm-svn: 108351
2010-07-14 19:52:16 +00:00
8939ba337d
Factor out metadata parsing into a separate function.
...
llvm-svn: 108343
2010-07-14 18:26:50 +00:00
254858031a
Merge lib/Target/X86/X86COFF.h into include/llvm/Support/COFF.h,
...
patch by Michael Spencer!
llvm-svn: 108342
2010-07-14 18:14:33 +00:00
a90af1ba38
Improve 64-subtraction of immediates when parts of the immediate can fit
...
in the literal field of an instruction. E.g.,
long long foo(long long a) {
return a - 734439407618LL;
}
rdar://7038284
llvm-svn: 108339
2010-07-14 17:45:16 +00:00
042523340b
Delete fast-isel's trivial load optimization; it breaks debugging because
...
it can look past points where a debugger might modify user variables.
llvm-svn: 108336
2010-07-14 17:25:37 +00:00
bb57896f8e
Fix test to appease the buildbots.
...
llvm-svn: 108334
2010-07-14 16:43:47 +00:00
1aef53403f
Add missing address register update to t2LDM_RET instruction.
...
Patch by Brian Lucas. PR7636.
llvm-svn: 108332
2010-07-14 16:02:13 +00:00
7a68cd094b
Rather than using an ifdef on the target to zero out fields,
...
just use memset to zero the entire struct.
llvm-svn: 108330
2010-07-14 14:32:33 +00:00
c4d70125ee
A couple potential optimizations inspired by comment 4 in PR6773.
...
llvm-svn: 108328
2010-07-14 06:58:26 +00:00
a8e8874552
Fix for PR7193 was overly conservative. The only case where sibcall callee
...
address cannot be allocated a register is in 32-bit mode where the first
three arguments are marked inreg. In that case EAX, EDX, and ECX will be
used for argument passing.
This fixes PR7610.
llvm-svn: 108327
2010-07-14 06:44:01 +00:00
bad47f62f6
Add support for NEON VMVN immediate instructions.
...
llvm-svn: 108324
2010-07-14 06:31:50 +00:00
bd54a53628
The bits in the cmode field of 32-bit VMOV immediate instructions all depend
...
of the value of the immediate.
llvm-svn: 108323
2010-07-14 06:30:44 +00:00
ec0e7b1643
revert r108320, I see the failures now...
...
llvm-svn: 108322
2010-07-14 06:16:35 +00:00
658680b2f5
reapply benjamin's instcombine patch, I don't see anything wrong with it and can't repro any problems with a manual self-host.
...
llvm-svn: 108320
2010-07-14 05:59:13 +00:00
c893115312
Re-enable the test with fix.
...
llvm-svn: 108319
2010-07-14 05:49:23 +00:00
711338fb04
temporarily disable to test to fix buildbots.
...
llvm-svn: 108310
2010-07-14 02:21:59 +00:00
164a0775bb
fix a bug found by a warning I added to clang this morning.
...
llvm-svn: 108309
2010-07-14 01:57:17 +00:00
d542414945
Teach ProcessImplicitDefs to transform more COPY instructions into IMPLICIT_DEF (and subsequently eliminate them). This allows machine LICM to hoist IMPLICIT_DEF's. PR7620.
...
llvm-svn: 108304
2010-07-14 01:22:19 +00:00
103a0dcfe1
Add an ARM-specific DAG combining to avoid redundant VDUPLANE nodes.
...
Radar 7373643.
llvm-svn: 108303
2010-07-14 01:22:12 +00:00
1f471435f8
Don't propagate debug locations to instructions for materializing
...
constants, since they may not be emited near the other instructions
which get the same line, and this confuses debug info.
llvm-svn: 108302
2010-07-14 01:07:44 +00:00
6c6c14a55c
Add AVX 256-bit compare instructions and a bunch of testcases
...
llvm-svn: 108286
2010-07-13 22:06:38 +00:00
50bcf13a7b
Remove vestigial decl.
...
llvm-svn: 108278
2010-07-13 21:19:08 +00:00
cd7a40f4ec
Print VNInfo flags.
...
llvm-svn: 108277
2010-07-13 21:19:05 +00:00
a3f1901531
Use a target-specific VMOVIMM DAG node instead of BUILD_VECTOR to represent
...
NEON VMOV-immediate instructions. This simplifies some things.
llvm-svn: 108275
2010-07-13 21:16:48 +00:00
fd8bfcd6e1
AVX 256-bit conversion instructions
...
Add the x86 VEX_L form to handle special cases where VEX_L must be set.
llvm-svn: 108274
2010-07-13 21:07:28 +00:00
f0b175328f
Update comment.
...
llvm-svn: 108272
2010-07-13 21:03:14 +00:00
caca5488dc
In inline asm treat indirect 'X' constraint as 'm'.
...
This may not be right in all cases, but it's better
than asserting which it was doing before. PR 7528.
llvm-svn: 108268
2010-07-13 20:17:05 +00:00
76a6b663a3
Added a check that pusha cannot be encoded in 64-bit mode.
...
llvm-svn: 108265
2010-07-13 20:05:41 +00:00
fc4b8b8e80
Add an assertion to make PR7542 fail consistently.
...
LiveInterval::overlapsFrom dereferences end() if it is called on an empty
interval.
It would be reasonable to just return false - an empty interval doesn't overlap
anything, but I want to know who is doing it first.
llvm-svn: 108264
2010-07-13 19:56:28 +00:00
58cd65f2fe
Fix the Named Metadata example to make it clear which specific
...
construct is the named metadata.
llvm-svn: 108263
2010-07-13 19:48:13 +00:00
afd69cf5b7
Add support for empty named metadata too. This isn't particularly
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useful, but it is nice for consistency.
llvm-svn: 108262
2010-07-13 19:42:44 +00:00
b43455feaf
Fix LiveInterval::overlaps so it doesn't claim touching intervals overlap.
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Also, one binary search is enough.
llvm-svn: 108261
2010-07-13 19:42:20 +00:00
1e0213a758
Add support for empty metadata nodes: !{}.
...
llvm-svn: 108259
2010-07-13 19:33:27 +00:00
0cc4ad983d
Extend the r107852 optimization which turns some fp compare to code sequence using only i32 operations. It now optimize some f64 compares when fp compare is exceptionally slow (e.g. cortex-a8). It also catches comparison against 0.0.
...
llvm-svn: 108258
2010-07-13 19:27:42 +00:00
58066e337d
Add an ARM "feature". Cortex-a8 fp comparison is very slow (> 20 cycles).
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llvm-svn: 108256
2010-07-13 19:21:50 +00:00
f9d177622e
Patched Makefile.rules to allow objective C and objective C++ compilation.
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This allows LLDB (llvm/tools/lldb) to build on Mac OS X.
llvm-svn: 108255
2010-07-13 18:47:09 +00:00
f43961007c
-enable-unsafe-fp-math should not imply -enable-finite-only-fp-math.
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llvm-svn: 108254
2010-07-13 18:46:14 +00:00
ea282034b6
Grammar.
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llvm-svn: 108252
2010-07-13 18:27:13 +00:00
f241d4626c
Fix PR number.
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llvm-svn: 108251
2010-07-13 18:14:47 +00:00
bc3e8a7c93
Switch from EXPECT_EQ({true,false, ...) to the more canonical
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EXPECT_{TRUE,FALSE}(...) macros. This also prevents suprious warnings about
bool-to-pointer conversion that occurs withit EXPECT_EQ.
llvm-svn: 108248
2010-07-13 17:28:05 +00:00
4a7904d652
Fix compile unit in example. Thanks Renato Golin!
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llvm-svn: 108246
2010-07-13 16:53:20 +00:00
f88a284579
Handle the case of a tail recursion in which the tail call is followed
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by a return that returns a constant, while elsewhere in the function
another return instruction returns a different constant. This is a
special case of accumulator recursion, so just generalize the existing
logic a bit.
llvm-svn: 108241
2010-07-13 15:41:41 +00:00
03e7e68caa
rotate CallInst operands
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with this commit the callee moves to the end of
the operand array (from the start) and the call
arguments now start at index 0 (formerly 1)
this ordering is now consistent with InvokeInst
this commit only flips the switch,
functionally it is equivalent to
r101465
I intend to commit several cleanups after a few
days of soak period
llvm-svn: 108240
2010-07-13 15:31:36 +00:00
79698be162
HTML cleanup and validation.
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llvm-svn: 108239
2010-07-13 12:26:09 +00:00
a522e563a8
When doing sext/zext of constants, the target type must be strictly
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wider than the source type. Correct LangRef.
llvm-svn: 108238
2010-07-13 12:06:14 +00:00
9b5561f4db
use a typedef instead of its expansion, patch by Michael Spencer
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llvm-svn: 108229
2010-07-13 05:52:36 +00:00
9ac75957e2
80-columns
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llvm-svn: 108228
2010-07-13 05:50:08 +00:00
c1c6f4796e
Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to
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avoid replicated code.
llvm-svn: 108227
2010-07-13 04:44:34 +00:00
55595fb291
my work on adding segment registers to LEA missed the
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disassembler. Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.
llvm-svn: 108226
2010-07-13 04:23:55 +00:00
dff283e146
Add AVX 256-bit packed logical forms
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llvm-svn: 108224
2010-07-13 02:38:35 +00:00
36b32aeaa5
Add AVX 256-bit unop arithmetic instructions
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llvm-svn: 108223
2010-07-13 01:53:31 +00:00
77a3c4462f
Since AVX is a superset of all SSE versions, only use HasAVX for AVX instructions
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llvm-svn: 108222
2010-07-13 00:38:47 +00:00
08d1c71c94
Bring ELF64 on par with ELF32, add a few magic constants and support ".dynamic"
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section entries.
llvm-svn: 108221
2010-07-13 00:24:59 +00:00
54e620d2c7
Don't add memory operands to storeRegToStackSlot / loadRegFromStackSlot results,
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they already have one.
This fixes the himenobmtxpa miscompilation on ARM.
The PostRA scheduler got confused by the double memoperand and hoisted a stack
slot load above a store to the same slot.
llvm-svn: 108219
2010-07-13 00:23:30 +00:00
03264efe30
Move some SIMD fragment code into X86InstrFragmentsSIMD so that the
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utility classes can be used from multiple files. This will aid
transitioning to a new refactored x86 SIMD specification.
llvm-svn: 108213
2010-07-12 23:41:28 +00:00
8e67a0482e
Add AVX 256 binary arithmetic instructions
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llvm-svn: 108207
2010-07-12 23:04:15 +00:00
91806311c9
More refactoring of basic SSE arith instructions. Open room for 256-bit instructions
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llvm-svn: 108204
2010-07-12 22:41:32 +00:00
cc1d334373
Simple format/style fixes.
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llvm-svn: 108203
2010-07-12 22:36:08 +00:00
1a8c928a24
Test commit.
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llvm-svn: 108197
2010-07-12 21:34:37 +00:00
ab058b83e0
MC/AsmParser: Move ELF specific parser to ELFAsmParser.cpp.
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llvm-svn: 108196
2010-07-12 21:23:32 +00:00
0cb91cfc74
MC/AsmParser: Move Darwin specific parse to DarwinAsmParser.cpp.
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llvm-svn: 108193
2010-07-12 20:51:51 +00:00
c7ff023de4
Add convenience method FoldingSetImpl::InsertNode(Node *N) that asserts if the node is already inserted.
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llvm-svn: 108192
2010-07-12 20:47:08 +00:00
51e6d9bbf6
Apply the SSE dependence idiom for SSE unary operations to
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SD instructions too, in addition to SS instructions. And
add a comment about it.
llvm-svn: 108191
2010-07-12 20:46:04 +00:00
a5bf6b6001
MC/AsmParser: Move .section parsing to Darwin specific parser.
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llvm-svn: 108190
2010-07-12 20:42:34 +00:00
91b7841534
MC/AsmLexer: Raise LexUntilEndOfStatement to MCAsmLexer.
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llvm-svn: 108189
2010-07-12 20:32:33 +00:00
5a02826363
getOrInsertLeaderValue cannot be const because it calls insert.
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Patch by Xi Wang!
llvm-svn: 108188
2010-07-12 20:27:02 +00:00
aa59cf2686
MC/AsmParser: Move special section directive parsing to Darwin specific parser.
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llvm-svn: 108187
2010-07-12 20:23:36 +00:00
8a2bdc8231
Remove some code that doesn't appear to do anything. All the ARM call
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instructions already have implicit defs of LR. The comment suggests that
this is intended to fix something like pr6111, but it doesn't really do
that either.
llvm-svn: 108186
2010-07-12 20:22:45 +00:00
80be44a2ac
MC/AsmParser: Add a basic ELFAsmParser extension.
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llvm-svn: 108185
2010-07-12 20:08:04 +00:00
f9bcaad76d
Add AVX 256-bit MOVMSK forms
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llvm-svn: 108184
2010-07-12 20:06:32 +00:00
101c14c940
MC/AsmParser: Inline AsmParser::CreateSymbol into callers.
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llvm-svn: 108183
2010-07-12 19:52:10 +00:00
d388c93f87
MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser.
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llvm-svn: 108180
2010-07-12 19:37:35 +00:00
63a379dd5c
MC/AsmParser: Move .desc parsing to Darwin specific parser.
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llvm-svn: 108179
2010-07-12 19:22:53 +00:00
b992f1a95b
MC/AsmParser: Move .lsym parsing to Darwin specific parser.
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llvm-svn: 108176
2010-07-12 19:08:25 +00:00
ae9da1481a
MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser.
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llvm-svn: 108174
2010-07-12 18:49:22 +00:00
dbd708d287
MCAsmParser: Add getSourceManager().
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llvm-svn: 108171
2010-07-12 18:35:04 +00:00
f059642c50
Silence a warning.
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llvm-svn: 108169
2010-07-12 18:17:47 +00:00
425b35681f
Check begin!=end, rather than !begin.
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llvm-svn: 108167
2010-07-12 18:12:35 +00:00
c5011088cd
MC/AsmParser: Add a DarwinAsmParser extension.
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- Currently initialization is a bit of a hack, but harmless. We need to rework
various parts of target initialization to clean this up.
llvm-svn: 108165
2010-07-12 18:12:02 +00:00
a18c5a0e5e
Fix a typo and fit in 80 columns. Found by Bob Wilson.
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llvm-svn: 108164
2010-07-12 18:11:17 +00:00
dd41dcf270
MC/AsmParser: Switch a bunch of directive parsing to use accessors.
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llvm-svn: 108163
2010-07-12 18:03:11 +00:00
c128e70ff2
Add a lint check for mismatched return types, inspired by PR6944.
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llvm-svn: 108162
2010-07-12 18:02:04 +00:00
86033407c9
MCAsmParser: Pull some directive handling out into a helper class, and change
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DirectiveMap to be based on MCAsmParserExtension.
llvm-svn: 108161
2010-07-12 17:54:38 +00:00
cc21af1dfb
MC/AsmParser: Switch some directive parsing to use accessor methods.
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llvm-svn: 108160
2010-07-12 17:45:27 +00:00
af3d1de891
MC: Add MCAsmParserExtension, a base class for all the target/object specific
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classes which want to extend the basic asm parser.
llvm-svn: 108158
2010-07-12 17:27:45 +00:00
4be8f2ffad
MC: Move AsmParser::TokError to MCAsmParser().
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llvm-svn: 108155
2010-07-12 17:18:45 +00:00
4042c33cd8
MC: Move getLoc() to MCAsmLexer().
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llvm-svn: 108154
2010-07-12 17:10:00 +00:00
8f36402ac2
Nope, still breaks the release selfhost bots :(
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llvm-svn: 108153
2010-07-12 16:38:48 +00:00
07b695e052
Reapply the "or" half of r108136, which seems to be less problematic.
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llvm-svn: 108152
2010-07-12 16:15:48 +00:00
1b787df129
cache result of operator*
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llvm-svn: 108150
2010-07-12 15:48:26 +00:00
68d7424a65
Don't fast-isel an x87 comparison opcode, as fast-isel doesn't
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support branching on x87 comparisons yet. This fixes PR7624.
llvm-svn: 108149
2010-07-12 15:46:30 +00:00
c719e8ae9e
Revert r108141 again, sigh.
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llvm-svn: 108148
2010-07-12 14:42:04 +00:00
96fedcb136
cache result of operator*
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llvm-svn: 108147
2010-07-12 14:15:58 +00:00
f9c38b5a45
cache result of operator*
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llvm-svn: 108146
2010-07-12 14:15:10 +00:00
88dd73b75e
cache result of operator*
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llvm-svn: 108145
2010-07-12 14:14:03 +00:00
a75ed761a9
cache result of operator*
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llvm-svn: 108144
2010-07-12 14:13:15 +00:00
15445db11b
cache results of operator*
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llvm-svn: 108143
2010-07-12 14:12:11 +00:00
a5fa885d47
cache results of operator*
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llvm-svn: 108142
2010-07-12 14:10:24 +00:00
f578c36035
Reapply 108136 with an ugly pasto fixed.
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llvm-svn: 108141
2010-07-12 13:44:00 +00:00
11743249e6
Move optimization to avoid redundant matching.
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llvm-svn: 108140
2010-07-12 13:34:22 +00:00
9675e759cf
Revert r108136 until I figure out why it broke selfhost.
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llvm-svn: 108139
2010-07-12 12:35:49 +00:00
782f62412f
cache dereferenced iterators
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llvm-svn: 108138
2010-07-12 12:03:02 +00:00
433b975fe2
recommit r108131 (hich has been backed out in r108135) with a fix
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llvm-svn: 108137
2010-07-12 12:02:10 +00:00
35473faa50
instcombine: fold (x & y) | (~x & z) and (x & y) ^ (~x & z) into ((y ^ z) & x) ^ z which is one instruction shorter. (PR6773)
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before:
%and = and i32 %y, %x
%neg = xor i32 %x, -1
%and4 = and i32 %z, %neg
%xor = xor i32 %and4, %and
after:
%xor1 = xor i32 %z, %y
%and2 = and i32 %xor1, %x
%xor = xor i32 %and2, %z
llvm-svn: 108136
2010-07-12 11:54:45 +00:00
f9610827ce
back out r108131 (of TailDuplication.cpp) for now, it causes a buildbot failure
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llvm-svn: 108135
2010-07-12 11:32:39 +00:00
6143704ac5
cache dereferenced iterators
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llvm-svn: 108134
2010-07-12 11:19:24 +00:00
8629f12bb8
cache dereferenced iterators
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llvm-svn: 108133
2010-07-12 10:59:23 +00:00
d993402df3
cache dereferenced iterators
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llvm-svn: 108132
2010-07-12 10:49:54 +00:00
2a464d7308
cache dereferenced iterators
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llvm-svn: 108131
2010-07-12 10:36:48 +00:00
41b4a6b36a
Convert some tab stops into spaces.
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llvm-svn: 108130
2010-07-12 08:16:59 +00:00
57041d81df
Add parentheses around an || to correct the logic. Also silences a GCC warning
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that was actually useful here.
Chris, please double check that this is the correct interpretation. I was
pretty sure, and ran it by Nick as well.
llvm-svn: 108129
2010-07-12 06:47:05 +00:00
c700060e43
Remove tab characters and 80-col.
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llvm-svn: 108127
2010-07-12 05:26:37 +00:00
135de90eec
80 columns.
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llvm-svn: 108126
2010-07-12 05:13:35 +00:00
d83984f623
Path::isRootDirectory is unimplemented on Unix and not used,
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remove it, fixing PR6909.
llvm-svn: 108125
2010-07-12 04:39:07 +00:00
6635f9838e
Convert getLoadStoreRegOpcode to use a switch.
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llvm-svn: 108123
2010-07-12 03:43:04 +00:00
871c724773
Convert the last use of getPhysicalRegisterRegClass and remove it.
...
AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.
With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.
llvm-svn: 108122
2010-07-12 02:55:34 +00:00
856a682de4
Fix up the ocaml kaleidoscope example as well.
...
Note that the example currently doesn't appear to work.
llvm-svn: 108121
2010-07-12 02:32:44 +00:00
de7201545e
A basic block that only uses RFP registers still needs the FP_REG_KILL marker.
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This fixes PR7375.
llvm-svn: 108120
2010-07-12 02:12:47 +00:00
01c5a15dde
Don't use getPhysicalRegisterRegClass in PBQP. The existing checks that the
...
physical register can be allocated in the class of the virtual are sufficient.
I think that the test for virtual registers is more strict than it needs to be,
it should be possible to coalesce two virtual registers the class of one
is a subclass of the other.
llvm-svn: 108118
2010-07-12 01:45:38 +00:00
25eea4db66
fix PR7311 by avoiding breaking casts when a bitcast from scalar->vector
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is involved.
llvm-svn: 108117
2010-07-12 01:19:22 +00:00
601e390a3b
make the prototypes for CreateMalloc and CreateFree more consistent. Patch
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by Hans Vandierendonck from PR7605
llvm-svn: 108116
2010-07-12 00:57:28 +00:00
e35d70fafa
Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp to
...
getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.
Update getLoadStoreRegOpcode to handle GR32_AD.
llvm-svn: 108115
2010-07-12 00:52:33 +00:00
bbc25ff5cc
if jump threading is able to infer interesting values on both
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the LHS and RHS of an and/or instruction, don't multiply add
known predecessor values. This fixes the crash on testcase
from PR7498
llvm-svn: 108114
2010-07-12 00:47:34 +00:00
fd4a09fc0a
fix PR7429, a crash turning a load from a string into a float.
...
llvm-svn: 108113
2010-07-12 00:22:51 +00:00
f8feba368c
convert to filechecconvert to filecheckk
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llvm-svn: 108112
2010-07-12 00:21:10 +00:00
9338b0a1e2
merge two tests.
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llvm-svn: 108111
2010-07-12 00:19:47 +00:00
cda39c4ee4
improve Path::makeUnique when mkstemp/mktemp are not available
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patch by Lasse Kärkkäinen in PR7404.
llvm-svn: 108110
2010-07-12 00:09:55 +00:00
0b7ae20a35
change machinelicm to use MachineInstr::isSafeToMove. No
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intended functionality change.
The avoidance of hoistiing implicitdef seems wrong though.
llvm-svn: 108109
2010-07-12 00:00:35 +00:00
b6df00c29a
first part of JIT support for address of labels, part of PR7264,
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patch by Yuri!
llvm-svn: 108107
2010-07-11 23:07:28 +00:00
2c52b7997c
introduce WinCOFFObjectWriter, patch by Michael Spencer!
...
llvm-svn: 108103
2010-07-11 22:07:02 +00:00
56725be9ef
introduce WinCOFFStreamer.cpp, patch by Michael Spencer!
...
llvm-svn: 108102
2010-07-11 22:05:00 +00:00
5d373c2141
If it's safe to speculatively execute load(alloca) the it's safe to execute
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load(gep(alloca)) where the gep is all-zeros. There's more we could do here but
this is a common case.
llvm-svn: 108101
2010-07-11 20:36:29 +00:00
31bd2de24e
fix typo
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llvm-svn: 108100
2010-07-11 19:42:53 +00:00
0961c55161
RISC architectures get their memory operand folding for free.
...
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
f6c7d7fb3f
Use target independent COPY instructions for the fake fextend and fround
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operations in x87 code.
llvm-svn: 108098
2010-07-11 18:19:39 +00:00
7c1392a765
Remove redundant branch. Thanks, Anton!
...
llvm-svn: 108097
2010-07-11 17:17:35 +00:00
98ee37d878
Remove obsolete README_SSE note.
...
We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.
The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.
The same applies to andps -> pand.
llvm-svn: 108096
2010-07-11 17:13:42 +00:00
c4227f1362
Remove TargetInstrInfo::copyRegToReg entirely.
...
Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.
llvm-svn: 108095
2010-07-11 17:01:17 +00:00
1da1cfccb1
Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.
...
llvm-svn: 108094
2010-07-11 16:49:10 +00:00
d7c4963f2f
Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.
...
The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.
The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.
llvm-svn: 108093
2010-07-11 16:45:17 +00:00
74e5bf85f7
Replace copyRegToReg with copyPhysReg for SystemZ.
...
llvm-svn: 108092
2010-07-11 16:40:46 +00:00
4806848799
Avoid SSE instructions in FastIsel when it is not available.
...
llvm-svn: 108091
2010-07-11 16:22:13 +00:00
34e0d14ff4
Remove two other uses of ATTRIBUTE_UNUSED for variables only used within
...
assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.
llvm-svn: 108088
2010-07-11 08:18:12 +00:00
928b593486
Replace copyRegToReg with copyPhysReg for XCore.
...
llvm-svn: 108087
2010-07-11 07:56:13 +00:00
976b7b61fc
Replace copyRegToReg with copyPhysReg for Sparc.
...
llvm-svn: 108086
2010-07-11 07:56:09 +00:00
1dba6814c9
Replace copyRegToReg with copyPhysReg for CellSPU.
...
llvm-svn: 108084
2010-07-11 07:31:03 +00:00
0d611979a8
Replace copyRegToReg with copyPhysReg for PowerPC.
...
llvm-svn: 108083
2010-07-11 07:31:00 +00:00
f889e280b8
Fix PIC16 comments referencing copyRegToReg.
...
llvm-svn: 108082
2010-07-11 07:30:57 +00:00
e494d0ff3e
Replace copyRegToReg with copyPhysReg for PIC16.
...
llvm-svn: 108081
2010-07-11 06:53:33 +00:00
65306369ae
Replace copyRegToReg with copyPhysReg for MSP430.
...
llvm-svn: 108080
2010-07-11 06:53:30 +00:00
37a38f4b28
Replace copyRegToReg with copyPhysReg for MBlaze.
...
llvm-svn: 108079
2010-07-11 06:53:27 +00:00
d7b33002dd
Replace copyRegToReg with copyPhysReg for ARM.
...
llvm-svn: 108078
2010-07-11 06:33:54 +00:00
52984e1aef
Replace copyRegToReg with copyPhysReg for Blackfin.
...
llvm-svn: 108077
2010-07-11 05:44:34 +00:00
e46f3eb0c4
X86InstrInfo::copyRegToReg is dead. Long live copyPhysReg!
...
llvm-svn: 108076
2010-07-11 05:44:30 +00:00
8833073758
Remove copyRegToReg from TargetInstrInfo so it is not longer accesible.
...
Use a COPY instruction instead for register copies, or TII::copyPhysReg() after
COPY instructions are lowered.
Targets should implement copyPhysReg instead of copyRegToReg.
llvm-svn: 108075
2010-07-11 05:17:06 +00:00
8969657f0c
Use COPY in X86FastISel::X86SelectRet.
...
Don't try a cross-class copy. That is very unlikely anywy since return value
registers are usually register class friendly. (%EAX, %XMM0, etc).
llvm-svn: 108074
2010-07-11 05:17:02 +00:00
51642aea77
Use COPY for fast-isel bitconvert, but don't create cross-class copies.
...
This doesn't change the behavior of SelectBitcast for X86.
llvm-svn: 108073
2010-07-11 05:16:54 +00:00
a76eccf815
Fix va_arg for doubles. With this patch VAARG nodes always contain the
...
correct alignment information, which simplifies ExpandRes_VAARG a bit.
The patch introduces a new alignment information to TargetLoweringInfo. This is
needed since the two natural candidates cannot be used:
* The 's' in target data: If this is set to the minimal alignment of any
argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for
example.
* The getTransientStackAlignment method. It is possible for an architecture to
have argument less aligned than what we maintain the stack pointer.
llvm-svn: 108072
2010-07-11 04:01:49 +00:00
4a52e2f6a7
Replace copyRegToReg with COPY in FastISelEmitter.
...
llvm-svn: 108071
2010-07-11 03:53:50 +00:00
7147ab9e78
Use COPY for extracting ImplicitDef'ed values from fast-isel instructions.
...
This assumes that the registers can be copied which is probably a safe
assumption.
llvm-svn: 108070
2010-07-11 03:31:05 +00:00
3bb1267431
Use COPY in FastISel everywhere it is safe and trivial.
...
The remaining copyRegToReg calls actually check the return value (shock!), so we
cannot trivially replace them with COPY instructions.
llvm-svn: 108069
2010-07-11 03:31:00 +00:00
7002c31480
Replace copyRegToReg with copyPhysReg for Mips.
...
llvm-svn: 108066
2010-07-11 01:08:31 +00:00
Jakob Stoklund Olesen