scheduling change in svn 115121. The CriticalAntiDepBreaker had bad
liveness information. It was calculating the KillIndices for one scheduling
region in a basic block, rescheduling that region so the KillIndices were
no longer valid, and then using those wrong KillIndices to make decisions
for the next scheduling region. I've not been able to reduce a small
testcase for this. Radar 8502534.
llvm-svn: 115400
where both symbols are "local", that is non-external symbols, and there is
no "base" for the symbols used in the expression, that is the section has
no non-temporary symbols. This case looks like this:
% cat local_reloc_A-B.s
.long 0
LB: .long 1
.long LA - LB - 4
.long 2
LA: .long 3
which llvm-mc will not encode without this patch, generates a "unsupported
local relocations in difference" error, but the Darwin assembler will
encode with relocation entries like this:
% otool -rv a.out l.out
a.out:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long False SUB False 1 (__TEXT,__text)
00000008 False long False UNSIGND False 1 (__TEXT,__text)
which is very similar to what is encoded when the symbols don't have the
leading 'L' and they are not temporary symbols. Which llvm-mc and the
Darwin assembler will encoded like this:
Relocation information (__TEXT,__text) 2 entries
address pcrel length extern type scattered symbolnum/value
00000008 False long True SUB False B
00000008 False long True UNSIGND False A
This is the missing relocation encoding needed to allow the Mach-O x86
Dwarf file and line table to be emitted. So this patch also removes the
TODO from the if() statement in MCMachOStreamer::Finish() that didn't
call MCDwarfFileTable::Emit() for 64-bit targets.
llvm-svn: 115389
LiveInterval::MergeValueNumberInto instead of trying to extend LiveRanges and
getting it wrong.
This fixed PR8249 where a valno with a multi-segment live range was defined by
an identity copy created by RemoveCopyByCommutingDef. Some of the live
segments disappeared.
llvm-svn: 115385
stick with a constant estimate of 90% (branch predictors are good!), but we might find that we want to provide
more nuanced estimates in the future.
llvm-svn: 115364
been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.
llvm-svn: 115360
Anyone interested in more general PRE would be better served by implementing it separately, to get real
anticipation calculation, etc.
llvm-svn: 115337
The x86_mmx type is used for MMX intrinsics, parameters and
return values where these use MMX registers, and is also
supported in load, store, and bitcast.
Only the above operations generate MMX instructions, and optimizations
do not operate on or produce MMX intrinsics.
MMX-sized vectors <2 x i32> etc. are lowered to XMM or split into
smaller pieces. Optimizations may occur on these forms and the
result casted back to x86_mmx, provided the result feeds into a
previous existing x86_mmx operation.
The point of all this is prevent optimizations from introducing
MMX operations, which is unsafe due to the EMMS problem.
llvm-svn: 115243
use MC instructions in the printInstruction() method via the tablegen flag
for it rather than a #define prior to including the autogenerated bits.
llvm-svn: 115238
Rafael Espindola