680b74941f
More asserts around physreg uses
...
llvm-svn: 103685
2010-05-13 00:19:39 +00:00
2f736c9577
Expand VMOVQQ into a pair of VMOVQ.
...
llvm-svn: 103684
2010-05-13 00:17:02 +00:00
79efd71962
Mark some pattern-less instructions as neverHasSideEffects.
...
llvm-svn: 103683
2010-05-13 00:16:46 +00:00
8cb4728a15
fix rdar://7965971 and a fixme: use ParseIdentifier in
...
ParseDirectiveDarwinZerofill instead of hard coding the
check for identifier. This allows quoted symbol names to
be used.
llvm-svn: 103682
2010-05-13 00:10:34 +00:00
9efef006cf
reapply r103668 with a fix. Never make "minor syntax changes"
...
after testing before committing.
llvm-svn: 103681
2010-05-13 00:02:47 +00:00
4aab8b5425
If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.
...
llvm-svn: 103680
2010-05-13 00:00:35 +00:00
ecf0166012
Do not attempt copy coalescing if the source and dest sub-register indices do not match.
...
llvm-svn: 103679
2010-05-12 23:59:42 +00:00
e354235512
revert r103668 for now, it is apparently breaking things.
...
llvm-svn: 103677
2010-05-12 23:40:59 +00:00
a6df4650fd
moffset forms of moves are x86-32 only, make the parser
...
lower them to the correct x86-64 instructions since we
don't have a clean way to handle this in td files yet.
rdar://7947184
llvm-svn: 103668
2010-05-12 23:13:36 +00:00
7c1f56f29a
Fix some potential issues in the pseudo instruction expansion phase: copy implicit operands and memoperands. Also, expand instructions even if their defs are "dead" since they may have implicit kill operands.
...
llvm-svn: 103667
2010-05-12 23:13:12 +00:00
b76df22a2e
MC: Move MCAlignFragment::EmitNops value out of the constructor.
...
llvm-svn: 103665
2010-05-12 22:56:23 +00:00
4405ffc688
MC: Eliminate MCZeroFillFragment, it is no longer needed.
...
llvm-svn: 103664
2010-05-12 22:51:38 +00:00
7cd309f7dc
MC: Explicitly check that only virtual fragments appear in virtual sections.
...
llvm-svn: 103663
2010-05-12 22:51:35 +00:00
597eb48168
MC: Switch MCFillFragment to storing total fill size instead of a count. This allows using ValueSize==0 to represent a virtual fill.
...
llvm-svn: 103662
2010-05-12 22:51:32 +00:00
51402b79e4
MC: Drop support for alignment in ZeroFill fragment, we can just use
...
MCAlignFragments for this.
llvm-svn: 103661
2010-05-12 22:51:27 +00:00
e132b0a92c
fix the encoding of the obscure "moffset" forms of moves, i386
...
part first. rdar://7947184
llvm-svn: 103660
2010-05-12 22:48:24 +00:00
c63aa1e8ab
Clear CachedFunctionInfo upon Pass::releaseMemory. Because ValueMap will abort
...
on RAUW of functions, this is a correctness issue instead of a mere memory
usage problem.
No testcase until the new MergeFunctions can land.
llvm-svn: 103653
2010-05-12 21:48:15 +00:00
7d73564b82
Simplify.
...
llvm-svn: 103651
2010-05-12 21:47:55 +00:00
a7cc32a7b6
MC: Factor out MCAssembler::LayoutFragment
...
llvm-svn: 103649
2010-05-12 21:35:25 +00:00
2abec791f1
MC: Tweak section layout to not relying on accumulating address value.
...
llvm-svn: 103648
2010-05-12 21:35:22 +00:00
5aa20d6c26
Remove a dead fixme.
...
llvm-svn: 103642
2010-05-12 20:20:22 +00:00
955a0e71e9
Make sure to add kill flags to the last use of a virtreg when it is redefined.
...
The X86 floating point stack pass and others depend on good kill flags.
llvm-svn: 103635
2010-05-12 18:46:03 +00:00
a11479eb49
MC: Simplify LayoutSection to just take the index of the section to layout.
...
llvm-svn: 103627
2010-05-12 17:56:47 +00:00
e02c1f6834
MC: Track section layout order explicitly, and use to simplify.
...
llvm-svn: 103616
2010-05-12 15:42:59 +00:00
d2de49ddda
stylistic change to MCSectionCOFF::PrintSwitchToSection COMDAT handling
...
Made a stylistic changed to the code/comments related to the unsupported COMDAT selection type IMAGE_COMDAT_SELECT_LARGEST based on from Anton Korobeynikov.
llvm-svn: 103590
2010-05-12 07:36:03 +00:00
2576db727b
Remove unused variable. Tweak a comment while there.
...
llvm-svn: 103586
2010-05-12 07:11:33 +00:00
b69c7b76f1
Add support for movi32 of global values to the new (MC) asm printer.
...
llvm-svn: 103576
2010-05-12 05:16:34 +00:00
76a07580ad
updated support for the COFF .linkonce
...
Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself.
llvm-svn: 103568
2010-05-12 04:26:09 +00:00
a2ff4fc96a
vst instructions are modeled as this:
...
v1024 = REG_SEQUENCE ...
v1025 = EXTRACT_SUBREG v1024, 5
v1026 = EXTRACR_SUBREG v1024, 6
= VSTxx <addr>, v1025, v1026
The REG_SEQUENCE ensures the sources that feed into the VST instruction
are getting the right register allocation so they form a large super-
register. The extract_subreg will be coalesced away all would just work:
v1024 = REG_SEQUENCE ...
= VSTxx <addr>, v1024:5, v1024:6
The problem is if the coalescer isn't run, the extract_subreg instructions
would stick around and there is no assurance v1025 and v1026 will get the
right registers.
As a short term workaround, teach the NEON pre-allocation pass to transfer
the sub-register indices over. An alternative would be do it 2addr pass
when reg_sequence's are eliminated. But that *seems* wrong and require
updating liveness information.
Another alternative is to do this in the scheduler when the instructions are
created. But that would mean somehow the scheduler this has to be done for
correctness reason. That's yucky as well. So for now, we are leaving this
in the target specific pass.
llvm-svn: 103540
2010-05-12 01:42:50 +00:00
d593448643
Teach local regalloc about virtual registers with sub-indices.
...
llvm-svn: 103539
2010-05-12 01:29:36 +00:00
0c6ebc7d95
Code clean up.
...
llvm-svn: 103538
2010-05-12 01:27:49 +00:00
059379a9d7
MC/X86: Extend suffix matching hack to match 'q' suffix.
...
llvm-svn: 103535
2010-05-12 00:54:20 +00:00
ba2f4c3884
MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can
...
be diced into atoms, and adjust getAtom() to take this into account.
- This fixes relocations to symbols in fixed size literal sections, for
example.
llvm-svn: 103532
2010-05-12 00:38:17 +00:00
f98a355f9b
Avoid scoping issues, fix buildbots
...
llvm-svn: 103530
2010-05-12 00:11:19 +00:00
1a1b51ff59
Add initial kill flag support to FastISel.
...
llvm-svn: 103529
2010-05-11 23:54:07 +00:00
69b8f42400
Make Clang happy.
...
llvm-svn: 103528
2010-05-11 23:53:13 +00:00
53ce0e12d8
MC/Mach-O/x86_64: Fix PCrel adjustment for x86_64, which was using the fixup
...
offset instead of the fixup address as intended.
llvm-svn: 103527
2010-05-11 23:53:11 +00:00
7c6f0e3827
MC/Mach-O: As Kevin pointed out, 'Address' is really an offset -- rename to clarify.
...
llvm-svn: 103526
2010-05-11 23:53:07 +00:00
795baa1972
MC/Mach-O: Fix a crash on invalid.
...
llvm-svn: 103525
2010-05-11 23:53:05 +00:00
11f1ba1535
Store the Dirty bit in the LiveReg structure instead of a bit vector.
...
llvm-svn: 103522
2010-05-11 23:24:47 +00:00
132668102e
Keep track of the last place a live virtreg was used.
...
This allows us to add accurate kill markers, something the scavenger likes.
Add some more tests from ARM that needed this.
llvm-svn: 103521
2010-05-11 23:24:45 +00:00
afd2b8bbb7
Don't set kill flags on uses of CopyFromReg nodes. InstrEmitter doesn't
...
create separate virtual registers for CopyFromReg values, so uses of
them don't necessarily kill the value.
llvm-svn: 103519
2010-05-11 21:59:14 +00:00
44e865f487
Avoid breaking vstd when reg_sequence is not used.
...
llvm-svn: 103513
2010-05-11 21:07:36 +00:00
f25be99109
Silence warning
...
llvm-svn: 103508
2010-05-11 20:51:04 +00:00
508f661fbe
Simplify this logic of creating a default Features object.
...
llvm-svn: 103507
2010-05-11 20:46:04 +00:00
3f0241e0f9
Simplify the tracking of used physregs to a bulk bitor followed by a transitive
...
closure after allocating all blocks.
Add a few more test cases for -regalloc=fast.
llvm-svn: 103500
2010-05-11 20:30:28 +00:00
e7630be7c5
Revert r103493, materializing functions in the regular PassManager.
...
It works in simple cases, but it isn't a general solution.
llvm-svn: 103499
2010-05-11 20:30:00 +00:00
6c5e4355bb
I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it
...
to LLVM_LIBRARY_VISIBILITY and introduce LLVM_GLOBAL_VISIBILITY, which is
the opposite, for future use by dragonegg.
llvm-svn: 103495
2010-05-11 20:16:09 +00:00
860d669da2
Teach the regular pass manager how to materialize functions as needed.
...
llvm-svn: 103493
2010-05-11 19:58:43 +00:00
4cfccb801c
Remove the "WantsWholeFile" concept, as it's no longer needed. CBE
...
and the others use the regular addPassesToEmitFile hook now, and
llc no longer needs a bunch of redundant code to handle the
whole-file case.
llvm-svn: 103492
2010-05-11 19:57:55 +00:00
9132c59d43
Trim #includes and forward declarations.
...
llvm-svn: 103489
2010-05-11 19:11:43 +00:00
f1b3029a54
Mostly rewrite RegAllocFast.
...
Sorry for the big change. The path leading up to this patch had some TableGen
changes that I didn't want to commit before I knew they were useful. They
weren't, and this version does not need them.
The fast register allocator now does no liveness calculations. Instead it relies
on kill flags provided by isel. (Currently those kill flags are also ignored due
to isel bugs). The allocation algorithm is supposed to work with any subset of
valid kill flags. More kill flags simply means fewer spills inserted.
Registers are allocated from a working set that contains no aliases. That means
most allocations can be done directly without expensive alias checks. When the
working set runs out of registers we do the full alias check to find new free
registers.
llvm-svn: 103488
2010-05-11 18:54:45 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
3937e28da0
MC/Mach-O x86_64: Switch to using fragment atom symbol.
...
- This eliminates getAtomForAddress() (which was a linear search) and
simplifies getAtom().
- This also fixes some correctness problems where local labels at the same
address as non-local labels could be assigned to the wrong atom.
llvm-svn: 103480
2010-05-11 17:22:50 +00:00
4df9d9ce11
Remove the TargetLowering::getSubtarget() virtual function, which
...
was unused. TargetMachine::getSubtarget() is used instead.
llvm-svn: 103474
2010-05-11 16:21:03 +00:00
9dd3ef8d01
Make SPU backend not assert on jump tables.
...
llvm-svn: 103466
2010-05-11 11:00:02 +00:00
2fa5a7e7e4
Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.
...
llvm-svn: 103459
2010-05-11 07:26:32 +00:00
6739a89117
Fixes for Microsoft Visual Studio 2010, from Steven Watanabe!
...
llvm-svn: 103457
2010-05-11 06:17:44 +00:00
ea31737fef
Don't create a StringRef with a NULL value.
...
llvm-svn: 103455
2010-05-11 01:33:39 +00:00
e276c18385
Model some vst3 and vst4 with reg_sequence.
...
llvm-svn: 103453
2010-05-11 01:19:40 +00:00
a12c1ff25a
The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a
...
string of features for that target. However LTO was using that string to pass
into the "create target machine" stuff. That stuff needed the feature string to
be in a particular form. In particular, it needed the CPU specified first and
then the attributes. If there isn't a CPU specified, it required it to be blank
-- e.g., ",+altivec". Yuck.
Modify the getDefaultSubtargetFeatures method to be a non-static member
function. For all attributes for a specific subtarget, it will add them in like
normal. It will also take a CPU string so that it can satisfy this horrible
syntax.
llvm-svn: 103451
2010-05-11 00:30:02 +00:00
1ef0660836
It's not safe eliminate copies where src and dst have different sub-register indices.
...
llvm-svn: 103450
2010-05-11 00:20:03 +00:00
b58b6f9a85
Ensure REG_SEQUENCE source operands are unique.
...
llvm-svn: 103449
2010-05-11 00:04:31 +00:00
75778984f9
MC/Mach-O: Fix another mismatch with .weak_definition, we shouldn't use a
...
scattered relocation entry with a .weak_definition.
llvm-svn: 103443
2010-05-10 23:15:20 +00:00
7de3106a89
MC/Mach-O: Factor out doesSymbolRequireExternRelocation.
...
llvm-svn: 103442
2010-05-10 23:15:13 +00:00
ffb9f18dfe
Indentation.
...
llvm-svn: 103441
2010-05-10 23:08:19 +00:00
1a0df9a80e
Enable multiple Compile Units in one module.
...
This means now 'llvm-ld a.bc b.bc' will preserve debug info appropriately.
llvm-svn: 103439
2010-05-10 22:49:55 +00:00
aadb2cac49
MC/Mach-O: Explicitly track atoms, as represented by their defining symbol, for each fragment (not yet used).
...
llvm-svn: 103438
2010-05-10 22:45:09 +00:00
630063aa0d
Model some vld3 instructions with REG_SEQUENCE.
...
llvm-svn: 103437
2010-05-10 21:26:24 +00:00
d6908dc4a2
It's not safe to propagate implicit_def that defines part of a register.
...
llvm-svn: 103436
2010-05-10 21:25:30 +00:00
9d55b23425
Clear RegSequences vector after eliminating REG_SEQUENCE instructions.
...
llvm-svn: 103435
2010-05-10 21:24:55 +00:00
42dbe4943f
simplify more.
...
llvm-svn: 103431
2010-05-10 20:59:18 +00:00
609de0068a
Simplify by using startswith instead of substr.
...
llvm-svn: 103430
2010-05-10 20:58:42 +00:00
58aff8fb57
fix PR7105 by enumerating MDNodes on all @llvm.foo
...
function calls, not just recognized intrinsics.
llvm-svn: 103428
2010-05-10 20:53:17 +00:00
103d4b43e9
Fix PR6875:
...
This includes a patch by Roman Divacky to fix the initial crash.
Move the actual addition of passes from *PassManager::add to
*PassManager::addImpl. That way, when adding printer passes we won't
recurse infinitely.
Finally, check to make sure that we are actually adding a FunctionPass
to a FunctionPassManager before doing a print before or after it.
Immutable passes are strange in this way because they aren't
FunctionPasses yet they can be and are added to the FunctionPassManager.
llvm-svn: 103425
2010-05-10 20:24:27 +00:00
dac182450b
Add new configure option, --disable-timestamps, intended to turn off anything which would mess up binary/object comparisons. Currently:
...
- Disables 'Built on ...' in 'foo --version'.
- Disables timestamps from being embedded into .dir files.
llvm-svn: 103423
2010-05-10 20:11:56 +00:00
bf2fb95b7c
Fix whitespace in debug output to be consistent.
...
llvm-svn: 103422
2010-05-10 20:07:44 +00:00
02947a4551
Be careful with operand promotion. For a binary operation, the source operands may be the same. PR7018. rdar://7939869.
...
llvm-svn: 103419
2010-05-10 19:03:57 +00:00
c2ae5f546f
Model vld2 / vst2 with reg_sequence.
...
llvm-svn: 103411
2010-05-10 17:34:18 +00:00
faef5d0281
Re-defined valno is always valno even for partial re-def's.
...
llvm-svn: 103410
2010-05-10 17:33:49 +00:00
01fcdaa7f5
Fix PR7096. When a block containing multiple defs is tail duplicated, the
...
SSAUpdater for the value from the first def may see uses of undefined values,
because the later defs will not have been updated yet.
llvm-svn: 103407
2010-05-10 17:14:26 +00:00
92ea401d8f
Fix encoding of 'sf' and 'sfh' instructions.
...
llvm-svn: 103399
2010-05-10 08:13:49 +00:00
e4d6670f6b
Add an assertion to catch attempts to access off the end of the array.
...
Based on a patch by Javier Martinez.
llvm-svn: 103391
2010-05-10 04:54:28 +00:00
b19c598843
updated handling dllexport in X86AsmPrinter
...
changed dllexport code to use EmitBytes instead of EmitRawText, and changed the export option to use /EXPORT: instead of -export: on the windows platform
llvm-svn: 103377
2010-05-09 08:40:06 +00:00
2760216c89
made COFF target dllexport logic apply to all subtargets
...
llvm-svn: 103373
2010-05-09 05:52:28 +00:00
da7d01404d
test commit, added a comment to MCSectionCOFF::PrintSwitchToSection function
...
llvm-svn: 103372
2010-05-09 05:49:00 +00:00
84d4618659
make simplifycfg insert an llvm.trap before the 'unreachable' it introduces
...
when it detects undefined behavior. llvm.trap generally codegens into some
thing really small (e.g. a 2 byte ud2 instruction on x86) and debugging this
sort of thing is "nontrivial". For example, we now compile:
void foo() { *(int*)0 = 42; }
into:
_foo:
pushl %ebp
movl %esp, %ebp
ud2
Some may even claim that this is a security hole, though that seems dubious
to me. This addresses rdar://7958343 - Optimizing away null dereference
potentially allows arbitrary code execution
llvm-svn: 103356
2010-05-08 22:15:59 +00:00
02b0df5338
Teach instcombine to transform a bitcast/(zext|trunc)/bitcast sequence
...
with a vector input and output into a shuffle vector. This sort of
sequence happens when the input code stores with one type and reloads
with another type and then SROA promotes to i96 integers, which make
everyone sad.
This fixes rdar://7896024
llvm-svn: 103354
2010-05-08 21:50:26 +00:00
5a62d6e578
Fix PR7052, patch by Jakub Staszak!
...
llvm-svn: 103347
2010-05-08 20:01:44 +00:00
72afa956db
break coff symbol definition stuff out into proper MCStreamer callbacks,
...
patch by Nathan Jeffords!
llvm-svn: 103346
2010-05-08 19:54:22 +00:00
401d4c9341
Run interrupt routines as part of report_fatal_error, since we are failing
...
ungracefully.
llvm-svn: 103334
2010-05-08 02:10:36 +00:00
68272566c6
Add llvm::sys::RunInterruptHandlers(), which runs the registered SIGINT cleanup
...
stuff.
llvm-svn: 103333
2010-05-08 02:10:34 +00:00
d0800241d2
When pruning candidate formulae out of an LSRUse, update the
...
LSRUse's Regs set after all pruning is done, rather than trying
to do it on the fly, which can produce an incomplete result.
This fixes a case where heuristic pruning was stripping all
formulae from a use, which led the solver to enter an infinite
loop.
Also, add a few asserts to diagnose this kind of situation.
llvm-svn: 103328
2010-05-07 23:36:59 +00:00
0625af2a88
Instead of just verifying compile unit, verify entire type, variable, namespace etc..
...
llvm-svn: 103327
2010-05-07 23:33:41 +00:00
cbe7a8508a
Remove DIGlobal.
...
llvm-svn: 103325
2010-05-07 23:19:07 +00:00
54c59312b1
Add DINameSpace::Verify().
...
llvm-svn: 103318
2010-05-07 23:04:32 +00:00
7de01ec2c9
SDDbgValues are apparently not being legalized. Fix a symptom of the problem,
...
and not the real problem itself, by dropping debug info for i128 values.
rdar://7958162.
llvm-svn: 103310
2010-05-07 22:19:08 +00:00
2fb68300a0
Minimally fix this code to not abort on mdnodes with integer data
...
wider than 64 bits.
llvm-svn: 103309
2010-05-07 22:15:24 +00:00
2ae3397536
Verify variable directly.
...
llvm-svn: 103305
2010-05-07 22:04:20 +00:00
028449325b
add COFF support for COMDAT sections, patch by Nathan Jeffords!
...
llvm-svn: 103304
2010-05-07 21:49:09 +00:00
8d6a2b7428
Verify entire type descriptor not just tag.
...
llvm-svn: 103303
2010-05-07 21:45:47 +00:00
51bed9c870
Fix i386 relocations to Weak Definitions. The relocation entries should be
...
external and the item to be relocated should not have the address of the
symbol added in.
llvm-svn: 103302
2010-05-07 21:44:23 +00:00
2c4d69d7ad
Verify compile unit also.
...
llvm-svn: 103300
2010-05-07 21:42:24 +00:00
51c1695a0a
Fix PR 7087, and probably other things, by extending
...
getConstantFP to accept the two supported long double
target types. This was not the original intent, but
there are other places that assume this works and it's
easy enough to do.
llvm-svn: 103299
2010-05-07 21:35:53 +00:00
32cc43c242
Wrap const MDNode * inside DIDescriptor.
...
llvm-svn: 103295
2010-05-07 20:54:48 +00:00
2a41cad900
Clean up the conditional for handling of sign_extend_inreg based on
...
whether the extract instructions are available.
rdar://7956878
llvm-svn: 103277
2010-05-07 18:34:55 +00:00
4423abd734
Use overloaded operators instead of DIDescriptor::getNode()
...
llvm-svn: 103276
2010-05-07 18:19:32 +00:00
cfa8e9d45f
Avoid DIDescriptor::getNode(). Use overloaded operators instead.
...
llvm-svn: 103272
2010-05-07 18:11:54 +00:00
b3c5c4611c
Testing svn access with a note added to documentation.
...
llvm-svn: 103271
2010-05-07 18:06:28 +00:00
58a0bd48ad
Update CMake build.
...
llvm-svn: 103269
2010-05-07 17:29:48 +00:00
87cffa9498
switch MCSectionCOFF from a syntactic to semantic representation,
...
patch by Peter Housel!
llvm-svn: 103267
2010-05-07 17:17:41 +00:00
d90773ebe0
Update CMake build.
...
llvm-svn: 103266
2010-05-07 17:13:20 +00:00
50689f0bb9
Add some words to this output to indicate what the numbers mean.
...
llvm-svn: 103264
2010-05-07 16:39:27 +00:00
fb64b5dff4
Add a simple module-level debug info printer. It just sets up a
...
DebugInfoFinder and iterates over all the contents calling print.
llvm-svn: 103262
2010-05-07 16:22:32 +00:00
6c30e879f8
Fix the new print functions to call print instead of dump.
...
llvm-svn: 103261
2010-05-07 16:17:22 +00:00
5d5b8b1b8c
Add an LLVM IR version of code sinking. This uses the same simple algorithm
...
as MachineSink, but it isn't constrained by MachineInstr-level details.
llvm-svn: 103257
2010-05-07 15:40:13 +00:00
4bbcf644da
Convert the DebugInfo classes dump() methods into print(raw_ostream &)
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methods, and add dump functions implemented in terms of the print.
llvm-svn: 103254
2010-05-07 15:30:29 +00:00
86eb22976f
Use VLD2q32 / VST2q32 to reload / spill QQ (pair of Q) registers when stack slot is sufficiently aligned. Use VLDMD / VSTMD otherwise.
...
llvm-svn: 103235
2010-05-07 02:04:02 +00:00
04d47e8efa
Use VSTMD / VLDMD for spills and reloads of Q registers instead of VSTMQ / VLDQ. The later are aliases which ought to be eliminated but we can't because they are used for storing and loading v2f64 values.
...
llvm-svn: 103234
2010-05-07 01:54:08 +00:00
45f530db39
Revert r103133 and add testcase from PR7066.
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llvm-svn: 103233
2010-05-07 01:45:38 +00:00
90c600d6d2
When rematerializing, use the debug location of the original
...
instruction, rather than a location near where the new instruction
is being inserted.
llvm-svn: 103232
2010-05-07 01:28:10 +00:00
e6d40166a8
Transfer debug location information from PHI nodes to resulting
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lowered copies.
llvm-svn: 103228
2010-05-07 01:10:20 +00:00
e7dff14d5d
Print debug information for SDNodes.
...
llvm-svn: 103227
2010-05-07 01:09:21 +00:00
7421ae48bf
Disable the new unknown-location code for now. It causes a major
...
increase in the debug line info section, and it's causing
regressions in a gdb testsuite.
llvm-svn: 103226
2010-05-07 01:08:53 +00:00
ddc93c7e04
Remove VLD1q and VST1q for reloading and spilling Q registers. Just use VLD1q64 / VST1q64 and reference sub-registers.
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llvm-svn: 103218
2010-05-07 00:24:52 +00:00
21aa523c28
MC/X86: X86AbsMemAsmOperand is subclass of X86NoSegMemAsmOperand.
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- This fixes "leal 0, %eax", for example.
llvm-svn: 103205
2010-05-06 22:39:14 +00:00
348dc9b15a
fix rdar://7947167 - llvm-mc doesn't match movsq
...
llvm-svn: 103199
2010-05-06 21:48:14 +00:00
e7e1cf9fbd
Eliminated the classification of control registers into %ecr_
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and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.
llvm-svn: 103196
2010-05-06 20:59:00 +00:00
358b29c855
MC/X86: Error out if we see a non-constant FK_Data_1 or FK_Data_2 fixup, since
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we don't currently support relaxing them.
llvm-svn: 103195
2010-05-06 20:34:01 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
...
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
f0ac19a6d5
80 col violation.
...
llvm-svn: 103185
2010-05-06 16:33:12 +00:00
f765e1f34a
Add a missing break statement to fix unintentional fall-through
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(replacing the previous patch for the same issue).
llvm-svn: 103183
2010-05-06 16:05:26 +00:00
5e3cccb1e4
Fix unintentional fallthrough. Patch by Edmund Grimley-Evans <Edmund.Grimley-Evans@arm.com>
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llvm-svn: 103181
2010-05-06 15:32:49 +00:00
94231eec1f
Fix "warning: extra ';' inside a struct or union" when building llvm with clang
...
llvm-svn: 103179
2010-05-06 14:57:47 +00:00
b0ceb764b8
Revert r103137, fix for $ in labels. It looks like we can't actually handle this
...
at the token level. Consider the following horrible test case:
a = 1
.globl $a
movl ($a), %eax
movl $a, %eax
movl $$a, %eax
llvm-svn: 103178
2010-05-06 14:46:38 +00:00
31cdcd46d6
Re-apply 103156 and 103157. 103156 didn't break anything. 10315 exposed a coalescer bug that's fixed by 103170.
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llvm-svn: 103172
2010-05-06 06:36:08 +00:00
c0255bac1d
Fixes a coalescer bug that caused llc to crash on 2009-11-30-LiveVariablesBug.ll
...
with the fix in 103157.
%reg1039:1<def> = VMOVS %S1<kill>, pred:14, pred:%reg0
is not coalescable since none of the super-registers of S1 are in reg1039's
register class: DPR_VFP2. But it is still a legal copy instruction so it should
not assert.
llvm-svn: 103170
2010-05-06 06:23:31 +00:00
77c71811f5
Revert r103157, which broke test/CodeGen/ARM/2009-11-30-LiveVariablesBug.ll.
...
llvm-svn: 103163
2010-05-06 05:08:57 +00:00
9feb1bb117
Revert r103156 since it was breaking the build bots.
...
Reverse-merging r103156 into '.':
U lib/Target/ARM/ARMInstrNEON.td
U lib/Target/ARM/ARMRegisterInfo.h
U lib/Target/ARM/ARMBaseRegisterInfo.cpp
U lib/Target/ARM/ARMBaseInstrInfo.cpp
U lib/Target/ARM/ARMRegisterInfo.td
llvm-svn: 103159
2010-05-06 02:29:06 +00:00
d351116be0
Handle the case where open(2) or close(2) is interrupted by a signal when
...
automatic syscall restarting is disabled.
Also, fix the build on systems which don't define EWOULDBLOCK.
llvm-svn: 103158
2010-05-06 02:06:20 +00:00
8fd7b510d6
Fix an obvious bug in isMoveInstr. It needs to return sub-register indices.
...
llvm-svn: 103157
2010-05-06 01:54:03 +00:00
8f99a1c6b4
Adding pseudo 256-bit registers QQ0 . . . QQ7 to represent pairs of Q registers. These will be used to model VLD2 / VST2 instructions in order to get substantially better codegen for them.
...
llvm-svn: 103156
2010-05-06 01:52:03 +00:00
9d768f4445
Cosmetic changes.
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llvm-svn: 103155
2010-05-06 01:34:11 +00:00
718ff448df
storeRegToStackSlot has forgotten about QPR_8 register class.
...
llvm-svn: 103154
2010-05-06 01:32:54 +00:00
ef969f3539
Handle EWOULDBLOCK as EAGAIN. And add a comment explaining why
...
EAGAIN and EWOULDBLOCK are used here.
Also, handle the case where a write call is interrupted after
some data has already been written.
llvm-svn: 103153
2010-05-06 01:27:36 +00:00
47d04e3e41
Update LabelsBeforeInsn also, when creating unknown-position labels.
...
llvm-svn: 103145
2010-05-06 00:29:41 +00:00
35096e82c5
Fix PR7054 - Assertion `Symbol->isUndefined() && "Cannot define a symbol twice!"' failed.
...
Users can write broken code that emits the same label twice with asm renaming,
detect this and emit a fatal backend error instead of aborting.
llvm-svn: 103140
2010-05-06 00:05:37 +00:00
a7c717d8d4
In bottom-up mode, defer the materialization of local constant values.
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llvm-svn: 103139
2010-05-06 00:02:14 +00:00
ffcb590b0f
Add an "IsBottomUp" member function to FastISel, which will be used to
...
support a new bottom-up mode.
llvm-svn: 103138
2010-05-05 23:58:35 +00:00
Jakob Stoklund Olesen