Commit Graph

27464 Commits

Author SHA1 Message Date
Zoran Jovanovic a0f5328984 Provide an operand for microMIPS wait instruction.
llvm-svn: 204329
2014-03-20 10:41:37 +00:00
Zoran Jovanovic 87d13e5ec1 Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112

llvm-svn: 204325
2014-03-20 10:18:24 +00:00
Zoran Jovanovic 28221d8bc1 Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
llvm-svn: 204323
2014-03-20 09:44:49 +00:00
Matheus Almeida 9e1450bce9 [mips] Splitting up class definition from implementation.
Also removed some unnecessary #includes.

No functional changes.

llvm-svn: 204320
2014-03-20 09:29:54 +00:00
Alexey Samsonov 94bc422d7a Add llvm_unreachable after fully-covered switches to appease GCC
llvm-svn: 204318
2014-03-20 07:30:40 +00:00
Saleem Abdulrasool 39f773f939 Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

llvm-svn: 204306
2014-03-20 06:05:33 +00:00
Craig Topper 38afbfdd76 [X86] Check return value of readSIB in disassembler so errors propagate. In particular this makes a too short instruction with a missing SIB byte fail.
llvm-svn: 204305
2014-03-20 05:56:00 +00:00
Hao Liu 40b5ab8e5b [ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR.
llvm-svn: 204304
2014-03-20 05:36:59 +00:00
Rafael Espindola 7fadc0ea7d Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

llvm-svn: 204294
2014-03-20 02:12:01 +00:00
Matt Arsenault dd78b8059b R600/SI: Add unused LDS 2 form instructions.
llvm-svn: 204275
2014-03-19 22:19:56 +00:00
Matt Arsenault d06ebd93e6 R600/SI: Add support for 64-bit LDS writes
llvm-svn: 204274
2014-03-19 22:19:54 +00:00
Matt Arsenault b943348cb9 R600/SI: Add support for 64-bit LDS loads.
v2:
  -Use correct opcode for DS_READ_64

llvm-svn: 204273
2014-03-19 22:19:52 +00:00
Matt Arsenault 99ed78926b R600/SI: Match i16 immediate offset of LDS instructions.
llvm-svn: 204272
2014-03-19 22:19:49 +00:00
Matt Arsenault 547aff20f5 R600/SI: Don't display the GDS bit.
It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

llvm-svn: 204270
2014-03-19 22:19:43 +00:00
Matt Arsenault 9cd8c38a32 R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2
Also remove unused data fields from the DS_Load_Helper class.

v2:
  - Merge fields for DS_WRITE

llvm-svn: 204269
2014-03-19 22:19:39 +00:00
Matheus Almeida c11f305082 [mips] 80-column.
llvm-svn: 204252
2014-03-19 16:29:06 +00:00
Craig Topper c6d4efa1e5 Prune includes in X86 target.
llvm-svn: 204216
2014-03-19 06:53:25 +00:00
Rafael Espindola 7bbd5c2636 Revert "Add back r203962, r204028 and r204059."
This reverts commit r204178.

llvm-svn: 204203
2014-03-19 00:13:43 +00:00
Rafael Espindola 574bfa12fa Add back r203962, r204028 and r204059.
This reverts commit r204137.

This includes a fix for handling aliases of aliases.

llvm-svn: 204178
2014-03-18 20:40:38 +00:00
Hans Wennborg aec21ce43e X86 memcpy lowering: use "rep movs" even when esi is used as base pointer
For functions where esi is used as base pointer, we would previously fall back
from lowering memcpy with "rep movs" because that clobbers esi.

With this patch, we just store esi in another physical register, and restore
it afterwards. This adds a little bit of register preassure, but the more
efficient memcpy should be worth it.

Differential Revision: http://llvm-reviews.chandlerc.com/D2968

llvm-svn: 204174
2014-03-18 20:04:34 +00:00
Manuel Jacob dcb78dbc82 X86: Use enums for memory operand decoding instead of integer literals.
Summary:
X86BaseInfo.h defines an enum for the offset of each operand in a memory operand
sequence.  Some code uses it and some does not.  This patch replaces (hopefully)
all remaining locations where an integer literal was used instead of this enum.
No functionality change intended.

Reviewers: nadav

CC: llvm-commits, t.p.northover

Differential Revision: http://llvm-reviews.chandlerc.com/D3108

llvm-svn: 204158
2014-03-18 16:14:11 +00:00
Krzysztof Parzyszek 4d38c82575 Enable CFI on Hexagon.
llvm-svn: 204157
2014-03-18 16:02:37 +00:00
Bill Schmidt ff9622ef0e Fix PR19144: Incorrect offset generated for int-to-fp conversion at -O0.
When converting a signed 32-bit integer to double-precision floating point on
hardware without a lfiwax instruction, we have to instead use a lfd followed
by fcfid.  We were erroneously offsetting the address by 4 bytes in
preparation for either a lfiwax or lfiwzx when generating the lfd.  This fixes
that silly error.

This was not caught in the test suite since the conversion tests were run with
-mcpu=pwr7, which implies availability of lfiwax.  I've added another test
case for older hardware that checks the code we expect in the absence of
lfiwax and other flavors of fcfid.  There are fewer tests in this test case
because we punt to DAG selection in more cases on older hardware.  (We must
generate complex fiddly sequences in those cases, and there is marginal
benefit in duplicating that logic in fast-isel.)

llvm-svn: 204155
2014-03-18 14:32:50 +00:00
Alexander Kornienko 64de613751 Revert r203962 and two revisions depending on it: r204028 and r204059.
The revision I'm reverting breaks handling of transitive aliases. This blocks us
and breaks sanitizer bootstrap:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651
(and checked locally by Alexey).

This revision is the result of:

  svn merge -r204059:204058 -r204028:204027 -r203962:203961 .

+ the regression test added to test/MC/ELF/alias.s

Another way to reproduce the regression with clang:
  $ cat q.c
  void a1();
  void a2() __attribute__((alias("a1")));
  void a3() __attribute__((alias("a2")));
  void a1() {}

  $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \
      ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \
      objdump -t good.o bad.o

    good.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g     F .text  0000000000000006 a3



    bad.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g       .text  0000000000000000 a3

llvm-svn: 204137
2014-03-18 10:36:11 +00:00
Alon Mishne ad312155a6 [C++11] Change DebugInfoFinder to use range-based loops
Also changes the iterators to return actual DI type over MDNode.

llvm-svn: 204130
2014-03-18 09:41:07 +00:00
Craig Topper 26696314d5 [C++11] Mark the target fast isel classes as 'final' so that the compiler can de-virtualize some of the internal calls.
llvm-svn: 204123
2014-03-18 07:27:13 +00:00
Saleem Abdulrasool 42b233a836 ARM: add an assertion
Add an assertion that a valid section is referenced.  The potential NULL pointer
dereference was identified by the clang static analyzer.

llvm-svn: 204114
2014-03-18 05:26:55 +00:00
Matt Arsenault f45faaf30d Make methods static
llvm-svn: 204085
2014-03-17 22:23:09 +00:00
Matt Arsenault fae02989b7 R600: Match sign_extend_inreg to BFE instructions
llvm-svn: 204072
2014-03-17 18:58:11 +00:00
Adam Nemet 8a130a5f86 [X86] Fix unused variable warning with NDEBUG from r204058
llvm-svn: 204063
2014-03-17 17:32:53 +00:00
Saleem Abdulrasool 11543a9953 ARM IAS: support .thumb_set
This performs the equivalent of a .set directive in that it creates a symbol
which is an alias for another symbol or value which may possibly be yet
undefined.  This directive also has the added property in that it marks the
aliased symbol as being a thumb function entry point, in the same way that the
.thumb_func directive does.

The current implementation fails one test due to an unrelated issue.  Functions
within .thumb sections are not marked as thumb_func.  The result is that
the aliasee function is not valued correctly.

llvm-svn: 204059
2014-03-17 17:13:54 +00:00
Adam Nemet 24381f1cb7 [VectorLegalizer/X86] Don't unvectorize fp_to_uint for v8f32->v8i16
Rather than LegalizeAction::Expand, this needs LegalizeAction::Promote to get
promoted to fp_to_sint v8f32->v8i32.  This is a legal operation on AVX.

For that to work properly, we also need to teach the legalizer about the
specific promotion required here.  The default vector promotion uses
bitcasting to a vector type of the same total size.  We want to promote the
vector element type, effectively widening the operation and then truncating
the result.  This is analogous to the current logic of how int_to_fp is
promoted.

The change also factors out some code from the int_to_fp promotion code to
ValueType::widenIntegerVectorElementType.  This is now shared between
int_to_fp and fp_to_int.

There is no longer need for the custom lowering of fp_to_sint f32->v8i16 in
X86.  It can now go through the new target-independent fp_to_*int promotion
logic.

I also checked that no other target uses Promote for these ops yet, so there
shouldn't be any unexpected change in behavior.

Fixes <rdar://problem/16202247>

llvm-svn: 204058
2014-03-17 17:06:14 +00:00
Tom Stellard d0084464b5 R600/SI: Fix implementation of isInlineConstant() used by the verifier
The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204056
2014-03-17 17:03:52 +00:00
Tom Stellard fbe435de63 R600/SI: Use correct dest register class for V_READFIRSTLANE_B32
This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204055
2014-03-17 17:03:51 +00:00
Tom Stellard ca700e41ef R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()
Added checks for number of operands and operand register classes.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 204054
2014-03-17 17:03:49 +00:00
Lang Hames 7c8189c6d3 [X86] New and improved VZeroUpperInserter optimization.
- Adds support for inserting vzerouppers before tail-calls.
  This is enabled implicitly by having MachineInstr::copyImplicitOps preserve
  regmask operands, which allows VZeroUpperInserter to see where tail-calls use
  vector registers.

- Fixes a bug that caused the previous version of this optimization to miss some
  vzeroupper insertion points in loops. (Loops-with-vector-code that followed
  loops-without-vector-code were mistakenly overlooked by the previous version).

- New algorithm never revisits instructions.

Fixes <rdar://problem/16228798>

llvm-svn: 204021
2014-03-17 01:22:54 +00:00
Arnaud A. de Grandmaison 75c9e6dedf Remove some dead assignements found by scan-build
llvm-svn: 204013
2014-03-15 22:13:15 +00:00
Patrik Hagglund 8d09a6c674 Replace ValueTypes.h with MachineValueType.h if possible.
Utilize the previous move of MVT to a separate header for all trivial
cases (that don't need any further restructuring).

Reviewed By: Tim Northover

llvm-svn: 204003
2014-03-15 09:11:41 +00:00
Matt Arsenault ea330fbe49 R600: Remove unnecessary attempt to zext a pointer.
Private pointers are now always 32-bits.

llvm-svn: 203989
2014-03-15 00:08:26 +00:00
Matt Arsenault 74891cdefe R600: Code cleanup.
Use sign_extend_inreg and getZeroExtendInReg instead of
using the bit operations they expand into.

llvm-svn: 203988
2014-03-15 00:08:22 +00:00
Duncan P. N. Exon Smith a824862664 x86: Add missing break to getCallPreservedMask()
This change brings getCallPreservedMask()'s logic in line with
getCalleeSavedRegs().

While this changes the control flow slightly, the change is not
currently observable.  is64Bit must be false to get to the accidental
fallthrough, but the case that we fall into (coldcc) does nothing unless
is64Bit is true.

llvm-svn: 203943
2014-03-14 16:29:21 +00:00
Duncan P. N. Exon Smith fea3c8afd6 x86: NFC: Make getCallPreservedMask() more similar to getCalleeSavedRegs()
Changing order of checks in getCallPreservedMask() to match
getCalleeSavedRegs() so that the logic is easier to compare.

llvm-svn: 203939
2014-03-14 16:09:13 +00:00
Duncan P. N. Exon Smith 8f66a3afe0 x86: getCalleeSavedRegs() would crash on 0 (so don't default to it)
The current logic assumes that MF is not 0.  Assert that it isn't, and
remove the default of 0 from the header.

llvm-svn: 203934
2014-03-14 15:38:12 +00:00
Ulrich Weigand f445399870 [ppc64] Avoid copy relocs in named rodata sections
Commit r181723 introduced code to avoid placing initialized variables
needing relocations into the .rodata section, which avoid copy relocs
that do not work as expected on ppc64 function references.

The same treatment is also needed for *named* .rodata.XXX sections.
This patch changes PPC64LinuxTargetObjectFile::SelectSectionForGlobal
to modify "Kind" *before* calling the default SelectSectionForGlobal
routine, instead of first calling the default routine and then just
checking for the (main) .rodata section afterwards.

llvm-svn: 203921
2014-03-14 12:45:22 +00:00
Evgeniy Stepanov 49e2625144 AddressSanitizer instrumentation for MOV and MOVAPS.
This is an initial version of *Sanitizer instrumentation of assembly code.

Patch by Yuri Gorshenin.

llvm-svn: 203908
2014-03-14 08:58:04 +00:00
Rafael Espindola 2fb5bc33a3 Remove the linker_private and linker_private_weak linkages.
These linkages were introduced some time ago, but it was never very
clear what exactly their semantics were or what they should be used
for. Some investigation found these uses:

* utf-16 strings in clang.
* non-unnamed_addr strings produced by the sanitizers.

It turns out they were just working around a more fundamental problem.
For some sections a MachO linker needs a symbol in order to split the
section into atoms, and llvm had no idea that was the case. I fixed
that in r201700 and it is now safe to use the private linkage. When
the object ends up in a section that requires symbols, llvm will use a
'l' prefix instead of a 'L' prefix and things just work.

With that, these linkages were already dead, but there was a potential
future user in the objc metadata information. I am still looking at
CGObjcMac.cpp, but at this point I am convinced that linker_private
and linker_private_weak are not what they need.

The objc uses are currently split in

* Regular symbols (no '\01' prefix). LLVM already directly provides
whatever semantics they need.
* Uses of a private name (start with "\01L" or "\01l") and private
linkage. We can drop the "\01L" and "\01l" prefixes as soon as llvm
agrees with clang on L being ok or not for a given section. I have two
patches in code review for this.
* Uses of private name and weak linkage.

The last case is the one that one could think would fit one of these
linkages. That is not the case. The semantics are

* the linker will merge these symbol by *name*.
* the linker will hide them in the final DSO.

Given that the merging is done by name, any of the private (or
internal) linkages would be a bad match. They allow llvm to rename the
symbols, and that is really not what we want. From the llvm point of
view, these objects should really be (linkonce|weak)(_odr)?.

For now, just keeping the "\01l" prefix is probably the best for these
symbols. If we one day want to have a more direct support in llvm,
IMHO what we should add is not a linkage, it is just a hidden_symbol
attribute. It would be applicable to multiple linkages. For example,
on weak it would produce the current behavior we have for objc
metadata. On internal, it would be equivalent to private (and we
should then remove private).

llvm-svn: 203866
2014-03-13 23:18:37 +00:00
Owen Anderson 16c6bf49b7 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&.  At this point they almost behave like normal iterators!

Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.

llvm-svn: 203865
2014-03-13 23:12:04 +00:00
Rafael Espindola 4269b9eed5 Use printable names to implement directional labels.
This changes the implementation of local directional labels to use a dedicated
map. With that it can then just use CreateTempSymbol, which is what the rest
of MC uses.

CreateTempSymbol doesn't do a great job at making sure the names are unique
(or being efficient when the names are not needed), but that should probably
be fixed in a followup patch.

This fixes pr18928.

llvm-svn: 203826
2014-03-13 18:09:26 +00:00
Tom Stellard 08ef1233c6 R600: LDS instructions shouldn't implicitly define OQAP
LDS instructions are pseudo instructions which model
the OQAP defs and uses within a single instruction.

This fixes a hang in the opencv MedianFilter tests.

llvm-svn: 203818
2014-03-13 17:13:04 +00:00
Hans Wennborg 89050436e6 [ARM] Use symbolic register names in .cfi directives only with IAS (PR19110)
This is a follow-up to r203635. Saleem pointed out that since symbolic register
names are much easier to read, it would be good if we could turn them off only
when we really need to because we're using an external assembler.

Differential Revision: http://llvm-reviews.chandlerc.com/D3056

llvm-svn: 203806
2014-03-13 15:56:41 +00:00