Commit Graph

74 Commits

Author SHA1 Message Date
Chris Lattner 4fbff990b0 Rename Interval class to LiveInterval to avoid conflicting with the already
existing llvm::Interval class.

Patch contributed by Vladimir Prus!
http://mail.cs.uiuc.edu/pipermail/llvmbugs/2004-June/000710.html

llvm-svn: 14281
2004-06-21 13:10:56 +00:00
Alkis Evlogimenos fbe799cfa2 Pull Interval class out of LiveIntervals.
llvm-svn: 13910
2004-05-30 07:46:27 +00:00
Alkis Evlogimenos a5268e8199 When spilling an register, introduce a new temporary for each of its
spills. This allows for more flexibility when allocating registers for
spill code.

llvm-svn: 13907
2004-05-30 07:24:39 +00:00
Alkis Evlogimenos 2a54b5d3e1 Add required header
llvm-svn: 13417
2004-05-08 03:50:03 +00:00
Chris Lattner 991425ae70 numeric_limits::infinity() apparently does not work on all systems. As a
workaround, use the C HUGE_VAL macro instead.

llvm-svn: 13377
2004-05-06 16:25:59 +00:00
Alkis Evlogimenos 02a5354d9b Make the set of fixed (preallocated) intervals be a fixed superset of
unhandled + handled. So unhandled is now including all fixed intervals
and fixed intervals never changes when processing a function.

llvm-svn: 12462
2004-03-17 00:48:59 +00:00
Alkis Evlogimenos 31953c7a10 Add a spiller option to llc. A simple spiller will come soon. When we get CFG in the machine code represenation a global spiller will also be possible. Also document the linear scan register allocator but mark it as experimental for now.
llvm-svn: 12062
2004-03-01 23:18:15 +00:00
Alkis Evlogimenos b76d234ee9 Add the long awaited memory operand folding support for linear scan
llvm-svn: 12058
2004-03-01 20:05:10 +00:00
Alkis Evlogimenos e669caafe0 Rename member function to be consistent with the rest.
llvm-svn: 11898
2004-02-27 06:11:15 +00:00
Alkis Evlogimenos a9f03fba9d Remove asssert since it is breaking cases that it shouldn't.
llvm-svn: 11841
2004-02-25 22:01:06 +00:00
Chris Lattner f5a393a133 Add an assertion
llvm-svn: 11830
2004-02-25 19:37:44 +00:00
Alkis Evlogimenos 1dd872ce94 Move machine code rewriter and spiller outside the register
allocator.

The implementation is completely rewritten and now employs several
optimizations not exercised before. For example for 164.gzip we have
997 loads and 699 stores vs the 1221 loads and 880 stores we have
before.

llvm-svn: 11798
2004-02-24 08:58:30 +00:00
Alkis Evlogimenos ab77b05d8c Remove '4Virt' from member function names as it is obvious.
llvm-svn: 11781
2004-02-23 23:47:10 +00:00
Alkis Evlogimenos c794a9060f Refactor VirtRegMap out of RegAllocLinearScan as the first part of bug
251 (providing a generic machine code rewriter/spiller).

llvm-svn: 11780
2004-02-23 23:08:11 +00:00
Alkis Evlogimenos 52de9e214c Add number of spilled registers statistic.
llvm-svn: 11759
2004-02-23 18:45:32 +00:00
Alkis Evlogimenos d780ce6462 Remove implementation of default constructor as it is useless now.
llvm-svn: 11755
2004-02-23 18:28:35 +00:00
Alkis Evlogimenos f83cb74b57 Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr
llvm-svn: 11738
2004-02-23 06:10:13 +00:00
Alkis Evlogimenos d42c2f24ec Fix comments in PhysRegTracker and rename isPhysRegAvail to isRegAvail to be consistent with the other two
llvm-svn: 11723
2004-02-23 01:25:05 +00:00
Alkis Evlogimenos 1410859484 Pull PhysRegTracker out of RegAllocLinearScan as it can be used by other allocators as well
llvm-svn: 11720
2004-02-23 00:53:31 +00:00
Alkis Evlogimenos 486b12b71a Move LiveIntervals.h to lib/CodeGen since it shouldn't be exposed to other parts of the compiler
llvm-svn: 11719
2004-02-23 00:50:15 +00:00
Alkis Evlogimenos cb352300c9 Print basic block boundaries in machine instruction debug output.
llvm-svn: 11704
2004-02-22 05:46:04 +00:00
Alkis Evlogimenos 22de21ea80 Fix crash in debug output.
llvm-svn: 11659
2004-02-20 06:41:12 +00:00
Alkis Evlogimenos bcc99a83ee Fix instruction numbering in debug output.
llvm-svn: 11655
2004-02-20 06:29:51 +00:00
Alkis Evlogimenos 76eca062ea Too many changes in one commit:
1. LiveIntervals now implement a 4 slot per instruction model. Load,
   Use, Def and a Store slot. This is required in order to correctly
   represent caller saved register clobbering on function calls,
   register reuse in the same instruction (def resues last use) and
   also spill code added later by the allocator. The previous
   representation (2 slots per instruction) was insufficient and as a
   result was causing subtle bugs.

2. Fixes in spill code generation. This was the major cause of
   failures in the test suite.

3. Linear scan now has core support for folding memory operands. This
   is untested and not enabled (the live interval update function does
   not attempt to fold loads/stores in instructions).

4. Lots of improvements in the debugging output of both live intervals
   and linear scan. Give it a try... it is beautiful :-)

In summary the above fixes all the issues with the recent reserved
register elimination changes and get the allocator very close to the
next big step: folding memory operands.

llvm-svn: 11654
2004-02-20 06:15:40 +00:00
Alkis Evlogimenos 3cf546037e Fix RA::verifyAssignment()
llvm-svn: 11629
2004-02-19 19:24:17 +00:00
Alkis Evlogimenos d0a60b71fc Rename reloads/spills to loads/stores.
llvm-svn: 11619
2004-02-19 06:19:09 +00:00
Alkis Evlogimenos b490a12501 Implement assignment correctness verification.
llvm-svn: 11609
2004-02-18 23:15:23 +00:00
Alkis Evlogimenos 2c5ddd20ba Eliminate the use of spill (reserved) registers.
llvm-svn: 11476
2004-02-15 10:24:21 +00:00
Alkis Evlogimenos ddcb4ad53e Use std::numeric_limits<float>::infinity() instead of
std::numeric_limits<float>::max() for weighting preallocated
intervals.

llvm-svn: 11427
2004-02-14 00:44:07 +00:00
Alkis Evlogimenos 8cdd0215bf Remove getAllocatedRegNum(). Use getReg() instead.
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
Alkis Evlogimenos 80da865f77 Change MachineBasicBlock's vector of MachineInstr pointers into an
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340
2004-02-12 02:27:10 +00:00
Chris Lattner 5dd5be3ec3 Do not use MachineOperand::isVirtualRegister either!
llvm-svn: 11283
2004-02-10 21:12:22 +00:00
Alkis Evlogimenos e82a70766e Increase code clarity.
llvm-svn: 11151
2004-02-06 18:08:18 +00:00
Alkis Evlogimenos cd2e7ffcc6 Eliminate uneeded lookups by passing a Virt2PhysMap::iterator instead
of the virtual register to certain functions.

llvm-svn: 11143
2004-02-06 03:15:40 +00:00
Alkis Evlogimenos 327426411e Modify the two address instruction pass to remove the duplicate
operand of the instruction and thus simplify the register allocation.

llvm-svn: 11124
2004-02-04 22:17:40 +00:00
Alkis Evlogimenos 3d100ef0ca When an instruction like: A += B had both A and B virtual registers
spilled, A was loaded from its stack location twice. This fixes the bug.

llvm-svn: 11093
2004-02-03 01:13:07 +00:00
Alkis Evlogimenos 6e34205653 Fix debugging output.
llvm-svn: 11088
2004-02-02 22:00:32 +00:00
Alkis Evlogimenos 2cecace9b2 Create an object for tracking physical register usage. This will look
much better when I get rid of the reserved registers.

llvm-svn: 11066
2004-02-02 07:30:36 +00:00
Alkis Evlogimenos 9b9c0485fd Change weight array into a vector and make it as big as the number of
registers (not as the max number of registers).

Change toSpill from a std::set into a std::vector<bool>.

Use the reverse iterator adapter to do a reverse scan of allocatable
registers.

llvm-svn: 11061
2004-02-01 20:13:26 +00:00
Alkis Evlogimenos 5e05a59bf8 Use std::map::count() instead of std::map::find() != std::map::end()
where appropriate.

llvm-svn: 11060
2004-02-01 18:39:53 +00:00
Alkis Evlogimenos 91dcc03c39 Use MRegisterInfo::isPhysicalRegister and
MRegisterInfo::isVirtualRegister.

llvm-svn: 11045
2004-02-01 01:27:01 +00:00
Alkis Evlogimenos 73df113676 Add option to join live intervals. Two intervals are joined if there
is a move between two registers, at least one of the registers is
virtual and the two live intervals do not overlap.

This results in about 40% reduction in intervals, 30% decrease in the
register allocators running time and a 20% increase in peephole
optimizations (mainly move eliminations).

The option can be enabled by passing -join-liveintervals where
appropriate.

llvm-svn: 10965
2004-01-22 23:08:45 +00:00
Alkis Evlogimenos e1c24c06f9 Remove unneeded check. An interval in active, by definition overlaps
with the current one.

llvm-svn: 10959
2004-01-22 20:07:18 +00:00
Alkis Evlogimenos 4716d76d22 Improve debugging output. Remove unneeded virtReg->0 mapping when
virtReg lives on the stack. Now a virtual register has an entry in the
virtual->physical map or the virtual->stack slot map but never in
both.

llvm-svn: 10958
2004-01-22 19:24:43 +00:00
Alkis Evlogimenos d844972574 Handle printing of intervals that are not assign to any physical
register yet (2nd try).

llvm-svn: 10896
2004-01-16 20:33:13 +00:00
Alkis Evlogimenos 8672af1cc8 Handle printing of intervals that are not assign to any physical
register yet.

llvm-svn: 10895
2004-01-16 20:29:42 +00:00
Alkis Evlogimenos d86933d21d Fold open interval ends handling into
LiveIntervals::Interval::expiredAt() and simplify regalloc code.

llvm-svn: 10894
2004-01-16 20:17:05 +00:00
Alkis Evlogimenos a0865cec3f Improve debugging output.
llvm-svn: 10834
2004-01-14 00:09:36 +00:00
Alkis Evlogimenos 65bc990bda Indentation and whitespace cleanups.
llvm-svn: 10820
2004-01-13 20:42:08 +00:00
Alkis Evlogimenos 6b1ec75da9 Fix bug introduced by previous commit: check if fixed intervals
overlap before adding their spill weight.

llvm-svn: 10819
2004-01-13 20:37:01 +00:00