09f5be8146
Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
...
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0 = MOV %reg1025
If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.
llvm-svn: 68065
2009-03-30 21:34:07 +00:00
71278a5be8
Tweak test for recent relro stuff
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llvm-svn: 68035
2009-03-30 15:28:40 +00:00
471ed6e460
Forgot this test.
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llvm-svn: 68025
2009-03-30 06:17:34 +00:00
f3cf04f900
Testcase for recent ro/relocs stuff
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llvm-svn: 68008
2009-03-29 17:14:57 +00:00
d21581eaa1
Fix PR3899: add support for extracting floats from vectors
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when using -soft-float.
Based on a patch by Jakob Stoklund Olesen.
llvm-svn: 67996
2009-03-29 13:51:06 +00:00
e622cbf385
Make check in CheckTailCallReturnConstraints for ignorable instructions between
...
a CALL and a RET node more generic. Add a test for tail calls with a void
return.
llvm-svn: 67943
2009-03-28 12:36:29 +00:00
83d5420d02
Enable tail call optimization for functions that return a struct (bug 3664) and for functions that return types that need extending (e.g i1).
...
llvm-svn: 67934
2009-03-28 08:33:27 +00:00
fd81c73cde
Optimize some 64-bit multiplication by constants into two lea's or one lea + shl since imulq is slow (latency 5). e.g.
...
x * 40
=>
shlq $3, %rdi
leaq (%rdi,%rdi,4), %rax
This has the added benefit of allowing more multiply to be folded into addressing mode. e.g.
a * 24 + b
=>
leaq (%rdi,%rdi,2), %rax
leaq (%rsi,%rax,8), %rax
llvm-svn: 67917
2009-03-28 05:57:29 +00:00
3f50cb6cd4
Fix this test so that it doesn't spuriously fail due to some
...
unrelated debugging output happening to contain the string "store".
llvm-svn: 67849
2009-03-27 16:17:22 +00:00
87a801af59
Add a __builtin___memset_chk test.
...
llvm-svn: 67815
2009-03-27 02:45:14 +00:00
99c16729d3
Add -march=x86.
...
llvm-svn: 67783
2009-03-26 23:03:32 +00:00
55a2cd736d
Add -f to RUN line.
...
llvm-svn: 67744
2009-03-26 06:17:54 +00:00
f661d328c4
no need for eh info
...
llvm-svn: 67740
2009-03-26 05:51:18 +00:00
996749e912
Add testcase for r67728.
...
llvm-svn: 67729
2009-03-26 01:52:47 +00:00
4555618854
Before deleting a basic block, give other loop passes a chance cleanup analysis values, related to the instructions in the basic block.
...
llvm-svn: 67719
2009-03-25 23:57:48 +00:00
1e550e15cc
Add a test case for PR3779: when to promote the function return value.
...
llvm-svn: 67702
2009-03-25 20:30:19 +00:00
2e9f42bed5
Revert 67132. This is breaking some objective-c apps.
...
Also fixes SDISel so it *does not* force promote return value if the function is not marked signext / zeroext.
llvm-svn: 67701
2009-03-25 20:20:11 +00:00
1bb604aff5
One more test.
...
llvm-svn: 67694
2009-03-25 17:45:18 +00:00
4b6c049b3f
Add __builtin___memcpy_chk tests.
...
llvm-svn: 67691
2009-03-25 16:49:31 +00:00
39d0946db5
These tests pass on linux.
...
llvm-svn: 67689
2009-03-25 16:43:59 +00:00
b86a445d39
Add a __builtin_object_size test.
...
llvm-svn: 67688
2009-03-25 16:29:33 +00:00
56a95f6c16
Fix a bug in our autoupgrade support: in an argument list to a function
...
call, we should treat "i64 zext" as the start of a constant expr, but
"i64 0 zext" as an argument with an obsolete attribute on it (this form
is already tested by test/Assembler/2007-07-30-AutoUpgradeZextSext.ll).
Make the autoupgrade logic more discerning to avoid treating "i64 zext"
as an old-style attribute, causing us to reject a valid constant expr.
This fixes PR3876.
llvm-svn: 67682
2009-03-25 06:36:36 +00:00
5e5a63cf8f
CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
...
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
c3b2111d97
Fix PR3874 by restoring a condition I removed, but making it more
...
precise than it used to be.
llvm-svn: 67662
2009-03-25 00:28:58 +00:00
d1d2c50ea7
Converted a1.ll to unittests.
...
llvm-svn: 67652
2009-03-24 21:36:09 +00:00
306813cbbb
canonicalize inttoptr and ptrtoint instructions which cast pointers
...
to/from integer types that are not intptr_t to convert to intptr_t
then do an integer conversion to the dest type. This exposes the
cast to the optimizer.
llvm-svn: 67638
2009-03-24 18:35:40 +00:00
d9eb41177a
two changes:
...
1. Make instcombine always canonicalize trunc x to i1 into an icmp(x&1). This
exposes the AND to other instcombine xforms and is more of what the code
generator expects.
2. Rewrite the remaining trunc pattern match to use 'match', which
simplifies it a lot.
llvm-svn: 67635
2009-03-24 18:15:30 +00:00
9fc30d5c30
Add a testcase for the scheduling heuristic introduced in r67586.
...
llvm-svn: 67622
2009-03-24 16:38:27 +00:00
a774a99245
Do not emit comments unless -asm-verbose.
...
llvm-svn: 67580
2009-03-24 00:17:40 +00:00
7fe1b0f50f
Fix a bug in spill weight computation. If the alias is a super-register, and the super-register is in the register class we are trying to allocate. Then add the weight to all sub-registers of the super-register even if they are not aliases.
...
e.g. allocating for GR32, bh is not used, updating bl spill weight.
bl should get the same spill weight otherwise it will be choosen
as a spill candidate since spilling bh doesn't make ebx available.
This fix PR2866.
llvm-svn: 67574
2009-03-23 22:57:19 +00:00
93eefa0043
Fix internal representation of fp80 to be the
...
same as a normal i80 {low64, high16} rather
than its own {high64, low16}. A depressing number
of places know about this; I think I got them all.
Bitcode readers and writers convert back to the old
form to avoid breaking compatibility.
llvm-svn: 67562
2009-03-23 21:16:53 +00:00
4dc0c6697f
Update test for pr3864.
...
llvm-svn: 67545
2009-03-23 18:27:36 +00:00
f858466018
Fix PR3391 and PR3864. Reg allocator infinite looping.
...
llvm-svn: 67544
2009-03-23 18:24:37 +00:00
968c3b0d6e
Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.
...
llvm-svn: 67512
2009-03-23 08:01:15 +00:00
47c9750f04
Do not fold away subreg_to_reg if the source register has a sub-register index. That means the source register is taking a sub-register of a larger register. e.g. On x86
...
%RAX<def> = ...
%RAX<def> = SUBREG_TO_REG 0, %EAX:3<kill>, 3
The first def is defining RAX, not EAX so the top bits were not zero-extended.
llvm-svn: 67511
2009-03-23 07:19:58 +00:00
15f1754eb4
Re-commit r67334 and r67349 with fix.
...
llvm-svn: 67451
2009-03-21 18:12:24 +00:00
0a981d1d36
Fix instcombine to not introduce undefined shifts when merging two
...
shifts together. This fixes PR3851.
llvm-svn: 67411
2009-03-20 22:41:15 +00:00
a09e0afe74
Don't load values out of global constants with weak
...
linkage: the value may be replaced with something
different at link time. (Frontends that want to
allow values to be loaded out of weak constants can
give their constants weak_odr linkage).
llvm-svn: 67407
2009-03-20 21:53:29 +00:00
18ca80cdda
Revert r67334 and r37349 which break "make check" on Linux.
...
llvm-svn: 67368
2009-03-20 07:56:31 +00:00
6d6647c7b3
Fix typo's.
...
llvm-svn: 67349
2009-03-20 00:14:09 +00:00
05799db963
More makefile changes to allow dejagnu tests to pass when system tools default to a different target from the llvm configuration (e.g. 64-bit gcc and 32-bit llvm).
...
llvm-svn: 67334
2009-03-19 20:27:23 +00:00
7b06cbe6d4
These tests are now passing on Darwin because of r67139.
...
llvm-svn: 67215
2009-03-18 17:45:11 +00:00
514fc5b143
aha, DAE does have to think about PHI nodes. Many thanks to "Dr Evil" (aka Duncan)
...
for pointing this out :)
llvm-svn: 67212
2009-03-18 16:48:45 +00:00
595923ff75
Fix PR3826 - InstComb assert with vector shift, by not calling ComputeNumSignBits on a vector.
...
llvm-svn: 67211
2009-03-18 16:32:19 +00:00
d2b64fc65b
Add -relocation-model=pic so that the test works
...
both in Linux and Darwin.
llvm-svn: 67191
2009-03-18 09:38:28 +00:00
64a6a092b1
Fix a bug.
...
If I->use_empty(), this method should return false.
llvm-svn: 67180
2009-03-18 07:56:13 +00:00
32c8074be6
Added missing support for widening when splitting an unary op (PR3683)
...
and expanding a bit convert (PR3711). In both cases, we extract the
valid part of the widen vector and then do the conversion.
llvm-svn: 67175
2009-03-18 06:24:04 +00:00
8df898917f
Add another test case for r64440.
...
llvm-svn: 67156
2009-03-18 02:43:01 +00:00
110377c669
xfail these tests for now.
...
llvm-svn: 67143
2009-03-18 00:44:45 +00:00
a6bed3e950
Disable the "call to immediate" optimization on x86-64. It is
...
not safe in general because the immediate could be an arbitrary
value that does not fit in a 32-bit pcrel displacement.
Conservatively fall back to loading the value into a register
and calling through it.
We still do the optzn on X86-32.
llvm-svn: 67142
2009-03-18 00:43:52 +00:00
Evan Cheng