Commit Graph

262073 Commits

Author SHA1 Message Date
Sean Callanan 09e91ac6ab [DWARF parser] Produce correct template parameter packs
Templates can end in parameter packs, like this

template <class T...> struct MyStruct 
  { /*...*/ };

LLDB does not currently support these parameter packs; 
it does not emit them into the template argument list
at all. This causes problems when you specialize, e.g.:

template <> struct MyStruct<int> 
  { /*...*/ };
template <> struct MyStruct<int, int> : MyStruct<int> 
  { /*...*/ };

LLDB generates two template specializations, each with 
no template arguments, and then when they are imported 
by the ASTImporter into a parser's AST context we get a 
single specialization that inherits from itself, 
causing Clang's record layout mechanism to smash its
stack.

This patch fixes the problem for classes and adds
tests. The tests for functions fail because Clang's
ASTImporter can't import them at the moment, so I've
xfailed that test.

Differential Revision: https://reviews.llvm.org/D33025

llvm-svn: 302833
2017-05-11 22:08:05 +00:00
Rafael Espindola 895aea6d15 Reduce template usage. NFC.
llvm-svn: 302832
2017-05-11 22:02:41 +00:00
Aditya Nandakumar fd484c443f [GISel]: Remove unused lambda captures. NFC
https://reviews.llvm.org/D33085

llvm-svn: 302831
2017-05-11 21:56:51 +00:00
Kostya Kortchinsky 01a66fc928 [scudo] Use our own combined allocator
Summary:
The reasoning behind this change is twofold:
- the current combined allocator (sanitizer_allocator_combined.h) implements
  features that are not relevant for Scudo, making some code redundant, and
  some restrictions not pertinent (alignments for example). This forced us to
  do some weird things between the frontend and our secondary to make things
  work;
- we have enough information to be able to know if a chunk will be serviced by
  the Primary or Secondary, allowing us to avoid extraneous calls to functions
  such as `PointerIsMine` or `CanAllocate`.

As a result, the new scudo-specific combined allocator is very straightforward,
and allows us to remove some now unnecessary code both in the frontend and the
secondary. Unused functions have been left in as unimplemented for now.

It turns out to also be a sizeable performance gain (3% faster in some Android
memory_replay benchmarks, doing some more on other platforms).

Reviewers: alekseyshl, kcc, dvyukov

Reviewed By: alekseyshl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D33007

llvm-svn: 302830
2017-05-11 21:40:45 +00:00
Easwaran Raman c103ef89ee Decrease inlinecold-threshold to 45
I ran the test-suite (including SPEC 2006) in PGO mode comparing cold
thresholds of 225 and 45. Here are some stats on the text size:

Out of 904 tests that ran, 197 see a change in text size. The average
text size reduction (of all the 904 binaries) is 1.07%. Of the 197
binaries, 19 see a text size increase, as high as 18%, but most of them
are small single source benchmarks. There are 3 multisource benchmarks
with a >0.5% size increase (0.7, 1.3 and 2.1 are their % increases). On
the other side of the spectrum, 31 benchmarks see >10% size reduction
and 6 of them are MultiSource.

I haven't run the test-suite with other values of inlinecold-threshold.
Since we have a cold callsite threshold of 45, I picked this value.

Differential revision: https://reviews.llvm.org/D33106

llvm-svn: 302829
2017-05-11 21:36:28 +00:00
Rafael Espindola b3aa2c9b9e Reduce template usage. NFC.
llvm-svn: 302828
2017-05-11 21:33:30 +00:00
Reid Kleckner 45a13e1b54 De-virtualize TerminatorInst successor accessors
Use the same switch technique to eliminate virtual successor accessors
from TerminatorInst. Extracted from D31261.

NFC

llvm-svn: 302827
2017-05-11 21:26:55 +00:00
Rafael Espindola 4b1c3696e3 Reduce template usage. NFC.
llvm-svn: 302826
2017-05-11 21:23:38 +00:00
Richard Smith 74df05471e XFAIL this test for Hexagon.
It's failing due to Hexagon calling convention lowering being broken (empty
structs are not passed even if they have nontrivial destructors / copy ctors).

llvm-svn: 302825
2017-05-11 21:18:27 +00:00
Martell Malone 53877bc5b9 [Libcxxabi]: Support using compiler-rt for MinGW64
Reviewers: EricWF

Differential Revision: https://reviews.llvm.org/D33098

llvm-svn: 302824
2017-05-11 21:16:29 +00:00
Reid Kleckner e7c7854cb1 De-virtualize GlobalValue
The erase/remove from parent methods now use a switch table to remove
themselves from their appropriate parent ilist.

The copyAttributesFrom method is now completely non-virtual, since we
only ever copy attributes from a global of the appropriate type.

Pre-requisite to de-virtualizing Value to save a vptr
(https://reviews.llvm.org/D31261).

NFC

llvm-svn: 302823
2017-05-11 21:14:29 +00:00
Chad Rosier aeffffdb44 [AArch64][MachineCombine] Fold FNMUL+FSUB -> FNMADD.
Differential Revision: http://reviews.llvm.org/D33101.

llvm-svn: 302822
2017-05-11 20:07:24 +00:00
Davide Italiano 0dcc015a81 [AMDGPU] Placate unused variable warning in release builds.
llvm-svn: 302821
2017-05-11 19:58:52 +00:00
Vadzim Dambrouski 38e30197c3 [MSP430] Generate EABI-compliant libcalls
Updates the MSP430 target to generate EABI-compatible libcall names.
As a byproduct, adjusts the hardware multiplier options available in
the MSP430 target, adds support for promotion of the ISD::MUL operation
for 8-bit integers, and correctly marks R11 as used by call instructions.

Patch by Andrew Wygle.

Differential Revision: https://reviews.llvm.org/D32676

llvm-svn: 302820
2017-05-11 19:56:14 +00:00
Davide Italiano 36acbc716d [LiveVariables] Switch Kill/Defs sets to be DenseSet(s).
The testcase in PR32984 shows a non linear compile time increase
after a change that made the LoopUnroll pass more aggressive
(increasing the threshold).

My profiling shows all the time of PHI elimination goes to
llvm::LiveVariables::addNewBlock. This is because we keep
Defs/Kills registers in a SmallSet and vfind(const T &V); is O(N).

Switching to a DenseSet reduces the time spent in the pass from
297 seconds to 97 seconds. Profiling still shows a lot of time is
spent iterating the data structure, so I guess there's room for
improvement.

Dan tells me GCC uses real set operations for live registers and
it takes no-time on this testcase. Matthias points out we might
want to switch all this to LiveIntervalAnalysis so it's not entirely
sure if a rewrite is worth it.

Differential Revision:  https://reviews.llvm.org/D33088

llvm-svn: 302819
2017-05-11 19:37:43 +00:00
Richard Smith 2cbd1f6c9f Work around different -std= default for PS4 target.
llvm-svn: 302818
2017-05-11 19:17:54 +00:00
Richard Smith 722363727d PR22877: When constructing an array via a constructor with a default argument
in list-initialization, run cleanups for the default argument after each
iteration of the initialization loop.

We previously only ran the destructor for any temporary once, at the end of the
complete loop, rather than once per iteration!

Re-commit of r302750, reverted in r302776.

llvm-svn: 302817
2017-05-11 18:58:24 +00:00
Craig Topper dbd6219f81 [APInt] Remove an APInt copy from the return of APInt::multiplicativeInverse.
llvm-svn: 302816
2017-05-11 18:40:53 +00:00
Craig Topper 3fbecadab6 [APInt] Fix typo in comment. NFC
llvm-svn: 302815
2017-05-11 17:57:43 +00:00
Matt Arsenault 47ccafe787 AMDGPU: Remove tfe bit from flat instruction definitions
We don't use it and it was removed in gfx9, and the encoding
bit repurposed.

Additionally actually using it requires changing the output register
class, which wasn't done anyway.

llvm-svn: 302814
2017-05-11 17:38:33 +00:00
Matt Arsenault bf5482e4bb AMDGPU: Pull fneg out of extract_vector_elt
This allows folding source modifiers in more f16 cases.
Makes it easier to select per-component packed neg modifiers.

llvm-svn: 302813
2017-05-11 17:26:25 +00:00
Stanislav Mekhanoshin 33a97ec4ed [AMDGPU] Fix incorrect register pressure calculation
Earlier fix D32572 introduced a bug where live-ins were calculated
for basic block instead of scheduling region. This change fixes it.

Differential Revision: https://reviews.llvm.org/D33086

llvm-svn: 302812
2017-05-11 17:16:55 +00:00
Adam Nemet 0aca09fc6c [SLP] Emit optimization remarks
The approach I followed was to emit the remark after getTreeCost concludes
that SLP is profitable.  I initially tried emitting them after the
vectorizeRootInstruction calls in vectorizeChainsInBlock but I vaguely
remember missing a few cases for example in HorizontalReduction::tryToReduce.

ORE is placed in BoUpSLP so that it's available from everywhere (notably
HorizontalReduction::tryToReduce).

We use the first instruction in the root bundle as the locator for the remark.
In order to get a sense how far the tree is spanning I've include the size of
the tree in the remark.  This is not perfect of course but it gives you at
least a rough idea about the tree.  Then you can follow up with -view-slp-tree
to really see the actual tree.

llvm-svn: 302811
2017-05-11 17:06:17 +00:00
Nemanja Ivanovic 96c3d626a2 [PowerPC] Eliminate integer compare instructions - vol. 1
This patch is the first in a series of patches to provide code gen for
doing compares in GPRs when the compare result is required in a GPR.

It adds the infrastructure to select GPR sequences for i1->i32 and i1->i64
extensions. This first patch handles equality comparison on i32 operands with
the result sign or zero extended.

Differential Revision: https://reviews.llvm.org/D31847

llvm-svn: 302810
2017-05-11 16:54:23 +00:00
Adrian Prantl 40b201c326 Add a test that local submodule visibility has no effect on debug info
rdar://problem/27876262

llvm-svn: 302809
2017-05-11 16:40:48 +00:00
Simon Pilgrim 6faddcbd07 [DAGCombine] Use SelectionDAG::getAnyExtOrTrunc helper. NFCI.
llvm-svn: 302808
2017-05-11 16:40:44 +00:00
Pierre Gousseau 9ce59db426 [asan] Test 'strndup_oob_test.cc' added in r302781 fails on the clang-cmake-thumbv7-a15-full-sh bot.
Marking as unsupported on armv7l-unknown-linux-gnueabihf, same as strdup_oob_test.cc

llvm-svn: 302807
2017-05-11 16:26:50 +00:00
Hans Wennborg 905da7458b Fix -DLLVM_ENABLE_THREADS=OFF build after r302748
llvm-svn: 302806
2017-05-11 15:32:47 +00:00
Michael Kruse 07e315e780 [Simplify] Remove identical scalar writes.
After DeLICM, it is possible to have two writes of the same value to
the same location in the same statement when it determined that those
writes do not conflict (write the same value).

Teach -polly-simplify to remove one of the writes. It interferes with
the pattern matching of matrix-multiplication kernels and also seem
to not be optimized away by LLVM.

The algorthm is simple, has O(n^2) behaviour (n = max number of
MemoryAccesses in a statement) and only matches the most obvious cases,
but seem to be enough to pattern-match Boost ublas gemm.

Not handled cases include:
- StoreInst instructions (a.k.a. explicit writes), since the value might
  be loaded or overwritten between the two stores.
- PHINode, especially LCSSA, when the PHI value matches with on other's.
- Partial writes (in preparation)

llvm-svn: 302805
2017-05-11 15:07:38 +00:00
Simon Pilgrim e2c055b8c5 [X86][AVX] Added zeroall/zeroupper scheduler tests
Missing on SandyBridge and Btver2 models

llvm-svn: 302804
2017-05-11 15:02:49 +00:00
Tim Northover a424117501 Modules: fix modules build.
A recent commit made GlobalVariable.h depend on intrinsics generation, so (I
think) it needs to be in the lower-level module. I'll confirm with others, but
this should fix the bots.

llvm-svn: 302803
2017-05-11 14:51:43 +00:00
Marshall Clow 35f62e3228 Mark LWG#2782 as complete. No functionality change; we already do this. Just added a few more tests.
llvm-svn: 302802
2017-05-11 14:25:45 +00:00
Benjamin Kramer 71ed2e6457 Renumber test line number expectations after r302783.
Also remove a confused stable-runtimes requirement.

llvm-svn: 302801
2017-05-11 14:04:23 +00:00
Marshall Clow 7e154cdca7 Replace a nested namespace used for overload resolution with a struct. Richard Smith says that using the namespace results in an ODR violation, but I disagree. Nevertheless, the struct works just as well.
llvm-svn: 302800
2017-05-11 14:00:54 +00:00
Marshall Clow afda4a9af9 Mark LWG#2850 as complete. No functionality change; we had tests that covered it already. Just added comments to the tests. Thanks to K-ballo for the heads up.
llvm-svn: 302799
2017-05-11 13:55:20 +00:00
Marshall Clow 9630f46dde Mark LWG#2796 as complete. No functionality change; we had tests that covered it already. Just added comments to the tests
llvm-svn: 302798
2017-05-11 13:51:09 +00:00
Alex Lorenz e6afa397c6 [CodeCompletion] Provide member completions for dependent expressions whose
type is a TemplateSpecializationType or InjectedClassNameType

Fixes PR30847. Partially fixes PR20973 (first position only).

PR17614 is still not working, its expression has the dependent
builtin type. We'll have to teach the completion engine how to "resolve"
dependent expressions to fix it.

rdar://29818301

llvm-svn: 302797
2017-05-11 13:48:57 +00:00
Alex Lorenz 0fe0d98557 [CodeCompletion] NFC, extract a function that generates member
completion results for records

llvm-svn: 302796
2017-05-11 13:41:00 +00:00
NAKAMURA Takumi 25f1a6ed16 Fix two-stage build on windows using DistributionExample cmake cache
Thanks to Matthew Larionov <matthewtff@gmail.com>

llvm-svn: 302795
2017-05-11 13:19:24 +00:00
Javed Absar f3d7904d20 [IR] Allow attributes with global variables
This patch extends llvm-ir to allow attributes to be set on global variables.
An RFC was sent out earlier by my colleague James Molloy: http://lists.llvm.org/pipermail/cfe-dev/2017-March/053100.html
A key part of that proposal was to extend LLVM-IR to carry attributes on global variables.
This generic feature could be useful for multiple purposes.
In our present context, it would be useful to carry user specified sections for bss/rodata/data.

Reviewed by: Jonathan Roelofs, Reid Kleckner
Differential Revision: https://reviews.llvm.org/D32009

llvm-svn: 302794
2017-05-11 12:28:08 +00:00
Igor Breger a44fc83d9f [GlobalISel][X86] Remove hand-written G_FADD/F_SUB selection.
Now it handle by TableGen.

llvm-svn: 302793
2017-05-11 12:15:03 +00:00
George Rimar f2cd0f9d05 [ELF] - Make text section location explicit in early-assign-symbol.s test.
Testcase itself depends on .text section location, which was orphan earlier.

Suggested by Rafael Espíndola

llvm-svn: 302792
2017-05-11 11:53:49 +00:00
Ayman Musa 3c18f19008 [X86] Moving X86Local namespace from .cpp to .h file to use it in memory folding TableGen backend.
Differential Revision: https://reviews.llvm.org/D32797

llvm-svn: 302791
2017-05-11 11:51:12 +00:00
Ayal Zaks 58b28d549a [LV] Refactor ILV.vectorize{Loop}() by introducing LVP.executePlan(); NFC
Introduce LoopVectorizationPlanner.executePlan(), replacing ILV.vectorize() and
refactoring ILV.vectorizeLoop(). Method collectDeadInstructions() is moved from
ILV to LVP. These changes facilitate building VPlans and using them to generate
code, following https://reviews.llvm.org/D28975 and its tentative breakdown.

Method ILV.createEmptyLoop() is renamed ILV.createVectorizedLoopSkeleton() to
improve clarity; it's contents remain intact.

Differential Revision: https://reviews.llvm.org/D32200

llvm-svn: 302790
2017-05-11 11:36:33 +00:00
Pierre Gousseau 24090e59ea [asan] Test 'strndup_oob_test.cc' added in r302781 fails on clang-s390x-linux.
Marking it as unsupported for now to hopefully make the bot green.

llvm-svn: 302789
2017-05-11 11:22:04 +00:00
Alexander Potapenko 65de57150e [msan] add a regression test for PR32842
Make sure MSan doesn't miss a bug comparing two integers with defined low bits.

llvm-svn: 302788
2017-05-11 11:12:26 +00:00
Alexander Potapenko a658ae8fe2 [msan] Fix PR32842
It turned out that MSan was incorrectly calculating the shadow for int comparisons: it was done by truncating the result of (Shadow1 OR Shadow2) to i1, effectively rendering all bits except LSB useless.
This approach doesn't work e.g. in the case where the values being compared are even (i.e. have the LSB of the shadow equal to zero).
Instead, if CreateShadowCast() has to cast a bigger int to i1, we replace the truncation with an ICMP to 0.

This patch doesn't affect the code generated for SPEC 2006 binaries, i.e. there's no performance impact.

For the test case reported in PR32842 MSan with the patch generates a slightly more efficient code:

  orq     %rcx, %rax
  jne     .LBB0_6
, instead of:

  orl     %ecx, %eax
  testb   $1, %al
  jne     .LBB0_6

llvm-svn: 302787
2017-05-11 11:07:48 +00:00
Renato Golin 29006dc724 [MSAN] test failed randomly on ARM when XFAILED for MIPS
llvm-svn: 302786
2017-05-11 11:05:52 +00:00
Chandler Carruth 97500a9918 [x86] Fix a failure to select with AVX-512 when the type legalizer
manages to form a VSELECT with a non-i1 element type condition. Those
are technically allowed in SDAG (at least, the generic type legalization
logic will form them and I wouldn't want to try to audit everything te
preclude forming them) so we need to be able to lower them.

This isn't too hard to implement. We mark VSELECT as custom so we get
a chance in C++, add a fast path for i1 conditions to get directly
handled by the patterns, and a fallback when we need to manually force
the condition to be an i1 that uses the vptestm instruction to turn
a non-mask into a mask.

This, unsurprisingly, generates awful code. But it at least doesn't
crash. This was actually impacting open source packages built with LLVM
for AVX-512 in the wild, so quickly landing a patch that at least stops
the immediate bleeding.

I think I've found where to fix the codegen quality issue, but less
confident of that change so separating it out from the thing that
doesn't change the result of any existing test case but causes mine to
not crash.

llvm-svn: 302785
2017-05-11 10:52:16 +00:00
Simon Pilgrim a4a13a0da0 Strip trailing whitespace. NFCI.
llvm-svn: 302784
2017-05-11 10:03:05 +00:00