Commit Graph

235574 Commits

Author SHA1 Message Date
Kuba Brecka 09d3e53a93 [tsan] dispatch_once interceptor will cause a crash/deadlock when the original dispatch_once is used
Because we use SCOPED_TSAN_INTERCEPTOR in the dispatch_once interceptor, the original dispatch_once can also be sometimes called (when ignores are enabled or when thr->is_inited is false). However the original dispatch_once function doesn’t expect to find “2” in the storage and it will spin forever (but we use “2” to indicate that the initialization is already done, so no waiting is necessary). This patch makes sure we never call the original dispatch_once.

Differential Revision: http://reviews.llvm.org/D21976

llvm-svn: 274548
2016-07-05 13:39:54 +00:00
Daniel Sanders 976d938c1e [mips][ias] Remove k_PhysReg since it's not possible to create an operand of this kind.
Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: http://reviews.llvm.org/D21986

llvm-svn: 274547
2016-07-05 13:38:40 +00:00
John Brawn 24ca18e31e [CMake] Adjust export_executable_symbols to cope with non-target link libraries
export_executable_symbols looks though the link libraries of the executable in
order to figure out transitive dependencies, but in doing so it assumes that
all link libraries are also targets. This is not true as of r273302, so adjust
it to check if they actually are targets.

llvm-svn: 274546
2016-07-05 13:16:54 +00:00
Simon Pilgrim 1e91654b38 [X86][AVX512BW] Added BROADCAST intrinsics fast-isel generic IR tests
llvm-svn: 274545
2016-07-05 13:16:05 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR
llvm-svn: 274544
2016-07-05 12:59:33 +00:00
James Molloy ae5ff990ae [Thumb] Reapply r272251 with a fix for PR28348 (mk 2)
The important thing I was missing was ensuring newly added constants were kept in topological order. Repositioning the node is correct if the constant is newly added (so it has no topological ordering) but wrong if it already existed - positioning it next in the worklist would break the topological ordering.

Original commit message:
  [Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated

  If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;

    int i(int a) {
      return a & 0xfffffeec;
    }

  Used to produce:
      ldr r1, [CONSTPOOL]
      ands r0, r1
    CONSTPOOL: 0xfffffeec

  And now produces:
      movs    r1, #255
      adds    r1, #20  ; Less costly immediate generation
      bics    r0, r1

llvm-svn: 274543
2016-07-05 12:37:13 +00:00
Asaf Badouh 136332888a [X86][AVX512F] add float/double abs intrinsics
add abs intrinsics that use native LLVM-IR.
change _mm512_mask[z]_and_epi{32|64} to use select intrinsic

Differential Revision: http://reviews.llvm.org/D21973

llvm-svn: 274542
2016-07-05 12:24:14 +00:00
Asaf Badouh f9cdb8de7a [AVX512] minor fix in sqrt{ss|sd} intrinsics arguments
Differential Revision: http://reviews.llvm.org/D21988

llvm-svn: 274541
2016-07-05 11:36:21 +00:00
Anastasia Stulova db7a31cce7 [OpenCL] An implementation of device side enqueue (DSE) from OpenCL v2.0 s6.13.17.
- Added new Builtins: enqueue_kernel, get_kernel_work_group_size
and get_kernel_preferred_work_group_size_multiple.

These Builtins use custom check to diagnose parameters of the passed Blocks
i. e. variable number of 'local void*' type params, and check different
overloads specified in Table 6.31 of OpenCL v2.0.

- IR is generated as an internal library call for each OpenCL Builtin,
reusing ObjC Block implementation.

Review: http://reviews.llvm.org/D20249
llvm-svn: 274540
2016-07-05 11:31:24 +00:00
Michael Zuckerman a72b49efe4 ntrinsics _mm256_permutexvar_epi64 doesn't accept three parameters as specify bellow.
I deleted the extra mask parameter.

__m256i _mm256_permutexvar_epi64 (__m256i idx, __m256i a)
#include "immintrin.h"
Instruction: vpermq
CPUID Flags: AVX512VL + AVX512F
Description
Shuffle 64-bit integers in a across lanes using the corresponding index in idx, and store the results in dst.
Operation
FOR j := 0 to 3
  i := j*64
    id := idx[i+1:i]*64
      dst[i+63:i] := a[id+63:id]
      ENDFOR
      dst[MAX:256] := 0
      dst[MAX:256] := 0
      
(From: Intel intrinsics guide)        

llvm-svn: 274539
2016-07-05 11:30:31 +00:00
Daniel Sanders 7b361a2cc3 Revert r274536: [mips][ias] Don't break apart and reconstruct StringRef's for k_Token. NFC.
It turns out that MSVC requires this.

llvm-svn: 274538
2016-07-05 10:44:24 +00:00
Simon Pilgrim 20ede63a33 [X86][AVX512] Added BROADCAST intrinsics fast-isel generic IR tests
llvm-svn: 274537
2016-07-05 10:15:14 +00:00
Daniel Sanders b2e0ca8e9c [mips][ias] Don't break apart and reconstruct StringRef's for k_Token. NFC.
llvm-svn: 274536
2016-07-05 10:10:36 +00:00
Nemanja Ivanovic 44513e545f [PowerPC] - Legalize vector types by widening instead of integer promotion
This patch corresponds to review:
http://reviews.llvm.org/D20443

It changes the legalization strategy for illegal vector types from integer
promotion to widening. This only applies for vectors with elements of width
that is a multiple of a byte since we have hardware support for vectors with
1, 2, 3, 8 and 16 byte elements.
Integer promotion for vectors is quite expensive on PPC due to the sequence
of breaking apart the vector, extending the elements and reconstituting the
vector. Two of these operations are expensive.
This patch causes between minor and major improvements in performance on most
benchmarks. There are very few benchmarks whose performance regresses. These
regressions can be handled in a subsequent patch with a DAG combine (similar
to how this patch handles int -> fp conversions of illegal vector types).

llvm-svn: 274535
2016-07-05 09:22:29 +00:00
Simon Pilgrim dea33cc2f3 [X86][AVX512] Added VSHUFPD intrinsics fast-isel generic IR tests
llvm-svn: 274534
2016-07-05 09:10:07 +00:00
Simon Pilgrim 8a01915bd2 [X86][AVX512VL] Added VSHUFPD/VSHUFPS intrinsics fast-isel generic IR tests
llvm-svn: 274533
2016-07-05 09:09:41 +00:00
Michael Zuckerman 7dac6fbdf8 [Clang][BuiltIn][AVX512] adding _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics
Differential Revision: http://reviews.llvm.org/D21729

llvm-svn: 274532
2016-07-05 08:08:01 +00:00
Clement Courbet 6ecaec83ba [ASTMatchers] New forEachOverriden matcher.
Matches methods overridden by the given method.

llvm-svn: 274531
2016-07-05 07:49:31 +00:00
Kelvin Li 4a39add05e [OpenMP] Sema and parse for 'distribute parallel for simd'
Summary: This patch is an implementation of sema and parsing for the OpenMP composite pragma 'distribute parallel for simd'.

Differential Revision: http://reviews.llvm.org/D21977

llvm-svn: 274530
2016-07-05 05:00:15 +00:00
Saleem Abdulrasool 4d3626ed31 test: relax the match on the timestamp
llvm-svn: 274529
2016-07-05 01:14:53 +00:00
Saleem Abdulrasool aecbdf70bf Object: support empty UID/GID fields
Normal archives do not have empty UID/GID fields.  However, the Microsoft
Import library format is a customized archive (it just uses an alternate symbol
index format).  When the import library is constructed by lib.exe, the UID and
GID fields are left empty.  Do not abort on such an input.

llvm-svn: 274528
2016-07-05 00:23:05 +00:00
Tom Stellard 4a105d73a9 AMDGPU/R600: Add PatFrags for selecting the correct vtx id for loads
This moves of the r600 logic out of isGlobalLoad() and into the
TableGen files.

Differential Revision: http://reviews.llvm.org/D21710

llvm-svn: 274527
2016-07-05 00:12:51 +00:00
Lang Hames 2b1c093c43 [Support][Error] Make logAllUnhandledErrors take a Twine for the banner, rather
than a const string&.

llvm-svn: 274526
2016-07-04 22:47:53 +00:00
Craig Topper 2a383c9273 [X86] Use undefined instead of setzero in shufflevector based intrinsics when the second source is unused. Rewrite immediate extractions in shuffle intrinsics to be in ((c >> x) & y) form instead of ((c & z) >> x). This way only x varies between each use instead of having to vary x and z.
llvm-svn: 274525
2016-07-04 22:18:01 +00:00
Davide Italiano c03d610cff [ELF] Support --entry= option variant. Update tests while I'm there.
llvm-svn: 274524
2016-07-04 21:50:50 +00:00
Simon Pilgrim 427154db2a [X86][AVX512] Converted the VSHUFPD intrinsics to generic IR
llvm-svn: 274523
2016-07-04 21:30:47 +00:00
Craig Topper 5aebb86ac1 [IR,X86] Remove some intrinsic prefixes earlier in the auto-upgrade code so we can shorten the length of the comparison strings and avoid repeatedly comparing the common prefix. No functional change intended.
llvm-svn: 274522
2016-07-04 20:56:38 +00:00
Tom Stellard 17a0ec5400 AMDGPU/SI: Remove hack for selecting < 32-bit loads to MUBUF instructions
Summary:
The isGlobalLoad() query was returning true for constant address space loads
with memory types less than 32-bits, which is wrong.  This logic has been
replaced with PatFrag in the TableGen files, to provide the same functionality.

Reviewers: arsenm

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D21696

llvm-svn: 274521
2016-07-04 20:41:48 +00:00
Simon Pilgrim 3ad040909a [X86][AVX512] Add support for lowering shuffles to VSHUFPD
llvm-svn: 274520
2016-07-04 20:41:24 +00:00
Craig Topper 5d16cd9d63 [AVX512] Remove masked VPERMD/VPERMQ/VPERMILPS/VPERMILPD intrinsics. They were autoupgraded to native IR in r274506 and r274506.
llvm-svn: 274519
2016-07-04 19:58:38 +00:00
Davide Italiano b4b68b64fd [OutputSection] Work around GCC not being able to deduce auto.
The build otherwise fails with:
[ 39%] Building CXX object
tools/lld/ELF/CMakeFiles/lldELF.dir/OutputSections.cpp.o
/export/gnu/import/git/llvm/tools/lld/ELF/OutputSections.cpp: In
member function ‘void
lld:🧝:GnuHashTableSection<ELFT>::addSymbols(std::vector<std::pair<lld:🧝:SymbolBody*,
long unsigned int> >&)’:
/export/gnu/import/git/llvm/tools/lld/ELF/OutputSections.cpp:585:8:
error: inconsistent deduction for ‘auto’: ‘auto’ and then
‘__gnu_cxx::__normal_iterator<std::pair<lld:🧝:SymbolBody*, long
unsigned int>*, std::vector<std::pair<lld:🧝:SymbolBody*, long
unsigned int> > >’

Reported by:  H. J. Liu

llvm-svn: 274518
2016-07-04 19:49:55 +00:00
Jan Vesely 991dfd7b07 AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings
These are printed as part of Fetch clauses.

Differential Revision: http://reviews.llvm.org/D21730

llvm-svn: 274517
2016-07-04 19:45:00 +00:00
Craig Topper 79008a3cc4 [AVX512] Remove VPERMD/VPERMQ/VPERMILPS/VPERMILPD builtins. These were made unused in r274492 and r274502.
llvm-svn: 274516
2016-07-04 19:27:50 +00:00
Davide Italiano 774e41cc47 [TableGen] Remove dead code. NFCI.
llvm-svn: 274515
2016-07-04 19:21:42 +00:00
Tom Stellard 391e3a873e ELF/AMDGPU: Add support for GOT relocations
Reviewers: arsenm, rafael, tony-tye, kzhuravl, ruiu

Subscribers: llvm-commits, kzhuravl

Differential Revision: http://reviews.llvm.org/D21481

llvm-svn: 274514
2016-07-04 19:19:07 +00:00
Rafael Espindola 8e51e67eb7 Add a test for accessing __tls_get_addr with a GOT.
This was already passing, but missing a test.

llvm-svn: 274513
2016-07-04 17:34:53 +00:00
James Molloy c3b4ed4a70 Revert "[Thumb] Reapply r272251 with a fix for PR28348"
This reverts commit r274510 - it made green dragon unhappy.

llvm-svn: 274512
2016-07-04 17:14:24 +00:00
Benjamin Kramer fdaed4c411 [clang-include-fixer] fix PEP8 warnings
This fixes PEP8 E231, E225, E226, E302 warnings.

Patch by Kirill Bobyrev!

Differential revision: http://reviews.llvm.org/D21974

llvm-svn: 274511
2016-07-04 16:47:17 +00:00
James Molloy 9f019835ef [Thumb] Reapply r272251 with a fix for PR28348
We were using DAG->getConstant instead of DAG->getTargetConstant. This meant that we could inadvertently increase the use count of a constant if stars aligned, which it did in this testcase. Increasing the use count of the constant could cause ISel to fall over (because DAGToDAG lowering assumed the constant had only one use!)

Original commit message:
  [Thumb] Select a BIC instead of AND if the immediate can be encoded more optimally negated

  If an immediate is only used in an AND node, it is possible that the immediate can be more optimally materialized when negated. If this is the case, we can negate the immediate and use a BIC instead;

    int i(int a) {
      return a & 0xfffffeec;
    }

  Used to produce:
      ldr r1, [CONSTPOOL]
      ands r0, r1
    CONSTPOOL: 0xfffffeec

  And now produces:
      movs    r1, #255
      adds    r1, #20  ; Less costly immediate generation
      bics    r0, r1

llvm-svn: 274510
2016-07-04 16:35:41 +00:00
Anastasia Stulova 7f8d6dc0ef [OpenCL] Make OpenCL Builtins added according to the right version.
Currently we only have OpenCL 2.0 Builtins i.e. pipes or address space conversions.

They have to be added only in the version 2.0 compilation mode to make the identifiers
available for use in the other versions.

Review: http://reviews.llvm.org/D20249
llvm-svn: 274509
2016-07-04 16:07:18 +00:00
George Rimar 5e37aeaf6a Fixed check-lld msan after r274504 "[ELF] - Implemented --fatal-warnings option."
Bot failed:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/14361/steps/check-lld%20msan/logs/stdio

Fix:
Initialize Config->FatalWarnings with false. As it might be used once a bit earlier than its
initialization from command line arguments.

llvm-svn: 274507
2016-07-04 14:54:23 +00:00
Simon Pilgrim 02d435d2f4 [X86][AVX512] Autoupgrade the VPERMPD/VPERMQ intrinsics
llvm-svn: 274506
2016-07-04 14:19:05 +00:00
Pavel Labath 97ef14c64b Split TestTemplateIntegerArgs test into two
Summary:
One of the tests there does not work with gcc, so I'm spinning that off into a separate test, so
that we can XFAIL it with more granularity.

I am also renaming the test to reflect the fact that it no longer tests only integer arguments.

Reviewers: clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D21923

llvm-svn: 274505
2016-07-04 13:49:46 +00:00
George Rimar 857644cef8 [ELF] - Implemented --fatal-warnings option.
--fatal-warnings: Treat warnings as errors

DIfferential revision: http://reviews.llvm.org/D21969

llvm-svn: 274504
2016-07-04 13:43:12 +00:00
Simon Pilgrim 8b82fce537 [X86][AVX512] Added VPERMPD/VPERMQ intrinsics fast-isel generic IR tests
llvm-svn: 274503
2016-07-04 13:43:10 +00:00
Simon Pilgrim 30db811526 [X86][AVX512] Converted the VPERMPD/VPERMQ intrinsics to generic IR
llvm-svn: 274502
2016-07-04 13:34:44 +00:00
Eric Liu bb11252113 [include-fixer] reduce stack size by changing RegexHeaderMap to use const char * pair.
llvm-svn: 274501
2016-07-04 13:34:11 +00:00
Tamas Berghammer c662533d05 Ignore oatdata and oatexec symbols more widely
These are artifical symbols inside android oat files without any value
for the user while causing a significant perfoamce hit inside the
unwinder. We were already ignoring it inside system@framework@boot.oat
bot they have to be ignored in every oat file. Considering that oat
files are only used on android this have no effect on any other
platfrom.

llvm-svn: 274500
2016-07-04 13:31:57 +00:00
Pavel Labath 140b8d1ecd Remove SIGPIPE handler in LLGS
It is sufficient to set the handeler to SIG_IGN, to get the desired behaviour. Also, the handler
calling a lot of signal-unsafe functions.

llvm-svn: 274499
2016-07-04 13:07:35 +00:00
Simon Pilgrim 9fca300cbe [X86][AVX512] Autoupgrade the VPERMILPD/VPERMILPS intrinsics
llvm-svn: 274498
2016-07-04 12:40:54 +00:00