6c234bf58f
add a simple hack
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llvm-svn: 45343
2007-12-24 19:27:46 +00:00
84c7325ca1
Setting GlobalDirective in TargetAsmInfo by default rather than
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providing a misleading facility. It's used once in the MIPS backend
and hardcoded as "\t.globl\t" everywhere else.
llvm-svn: 45338
2007-12-23 20:58:16 +00:00
00602f6105
fix some warnings. This code needs to be de-tabified :(
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llvm-svn: 45325
2007-12-22 22:47:03 +00:00
91f3379660
fix strict-aliasing violation
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llvm-svn: 45324
2007-12-22 22:45:38 +00:00
1b1250770c
Erm, really disable :)
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llvm-svn: 45319
2007-12-22 20:46:24 +00:00
d34112a4ee
Disable, until we'll really need it
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llvm-svn: 45318
2007-12-22 20:41:12 +00:00
345a00ba05
Preliminary PIC JIT support for X86 (32-bit) / Darwin.
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llvm-svn: 45313
2007-12-22 09:40:20 +00:00
db33a0211b
Oops.
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llvm-svn: 45312
2007-12-22 09:14:34 +00:00
f4f52dbc8c
Fix JIT code emission of X86::MovePCtoStack.
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llvm-svn: 45307
2007-12-22 02:26:46 +00:00
ac134551c6
Allow JIT with non-static relocation model.
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llvm-svn: 45304
2007-12-22 01:12:14 +00:00
1e8c1308bb
Fix silly typo in the FP CEP handling.
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llvm-svn: 45300
2007-12-21 23:33:44 +00:00
85f26f28b9
Fix a brain fart by our beloved leader (the content
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of this patch is the last line).
llvm-svn: 45289
2007-12-21 20:18:41 +00:00
31a2c3948e
Fix unintented change from last commit
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llvm-svn: 45282
2007-12-21 12:22:29 +00:00
80c741e160
Enable EH for linux/ppc32 targets
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llvm-svn: 45281
2007-12-21 12:19:44 +00:00
78c460c8c4
New entry.
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llvm-svn: 45280
2007-12-21 01:31:58 +00:00
01c7c198ee
Fix JIT encoding for CMPSD as well.
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llvm-svn: 45268
2007-12-20 19:57:09 +00:00
5f1470f03a
More working CellSPU tests:
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- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads
llvm-svn: 45242
2007-12-20 00:44:13 +00:00
eadbf4b91c
Enable EH on PPC Darwin. This basically works; there
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are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note: By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work. You need to trick it into
using the installed system unwinding code to get useful
results.)
llvm-svn: 45221
2007-12-19 21:54:36 +00:00
5ecac82f71
CellSPU testcase, extract_elt.ll: extract vector element.
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llvm-svn: 45219
2007-12-19 21:17:42 +00:00
098c113bc8
Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll
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(vector insertions)
llvm-svn: 45216
2007-12-19 20:15:47 +00:00
9b834469e0
Add new immed16.ll test case, fix CellSPU errata to make test case work.
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llvm-svn: 45196
2007-12-19 07:35:06 +00:00
ca77ecb40a
Mark the "isRemat" instruction as never having side effects.
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llvm-svn: 45190
2007-12-19 06:07:48 +00:00
2583a66295
add an obvious load folding missed optzn.
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llvm-svn: 45161
2007-12-18 16:48:14 +00:00
8b09a464b4
Fold certain additions through selects (and their compares) so as to eliminate subtractions. This code is often produced by the SMAX expansion in SCEV.
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This implements test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
llvm-svn: 45158
2007-12-18 09:34:41 +00:00
52a9e40789
add a missed case.
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llvm-svn: 45141
2007-12-18 01:19:18 +00:00
b3d85a5d4b
Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I
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based what flag to set on whether it was already marked as
"isRematerializable". If there was a further check to determine if it's "really"
rematerializable, then I marked it as "mayHaveSideEffects" and created a check
in the X86 back-end similar to the remat one.
llvm-svn: 45132
2007-12-17 23:07:56 +00:00
c5cccb9e60
- Restore some i8 functionality in CellSPU
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- New test case: nand.ll
llvm-svn: 45130
2007-12-17 22:32:34 +00:00
a2401be121
LD_Fp64m should have "isRematerializable" set.
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llvm-svn: 45128
2007-12-17 22:17:14 +00:00
939526a930
As per feedback, revised comments to (hopefully) make the different side effect
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flags clearer.
llvm-svn: 45120
2007-12-17 21:02:07 +00:00
edf0788758
Change the PointerType api for creating pointer types. The old functionality of PointerType::get() has become PointerType::getUnqual(), which returns a pointer in the generic address space. The new prototype of PointerType::get() requires both a type and an address space.
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llvm-svn: 45082
2007-12-17 01:12:55 +00:00
2af27c202c
don't violate C TBAA rules, use FloatToBits instead.
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llvm-svn: 45076
2007-12-16 20:41:33 +00:00
e3b05fe31b
fix a questionable cast, thanks to Mike Stump for pointing this out.
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llvm-svn: 45075
2007-12-16 20:26:54 +00:00
dab6bd902e
Fix the JIT encoding of cmp*ss, which aborts with this assertion currently:
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X86CodeEmitter.cpp:378: failed assertion `0 && "Immediate size not set!"'
I *think* this is right, but Evan, please verify. It also looks like
CMPSDrr and maybe others are missing this info. Evan, plz investigate.
llvm-svn: 45074
2007-12-16 20:12:41 +00:00
23d2d4dc6c
Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs.
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llvm-svn: 45058
2007-12-15 03:00:47 +00:00
0aa7133f82
Start committing working test cases for CellSPU.
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llvm-svn: 45050
2007-12-15 00:38:50 +00:00
9556729128
Actually, MOVPQIto64mr is a dup of MOVPQI2QImr, MOV64toPQIrm is a dup of MOVQI2PQIrm.
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llvm-svn: 45041
2007-12-14 20:08:14 +00:00
e28372c0d6
Fix (mem) <-> low 64-bits of xmm bugs pointed out by David Greene. Mac OS X Leopard assembler recognizes movq.
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llvm-svn: 45040
2007-12-14 19:54:07 +00:00
f7cefdd5f0
x86-32 long doubles are 4-byte aligned on the stack
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for parameter passing (only for that, on Darwin).
llvm-svn: 45038
2007-12-14 19:25:34 +00:00
a56e6ff9a7
Fix bsf / bsr jit encoding.
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llvm-svn: 45037
2007-12-14 18:49:43 +00:00
f28c810036
Oops. Forgot these.
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llvm-svn: 45036
2007-12-14 18:25:34 +00:00
9d2e9e376f
Fix Intel asm syntax for the bsr and bsf instructions.
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llvm-svn: 45030
2007-12-14 15:10:00 +00:00
0e6408124e
Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.
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llvm-svn: 45029
2007-12-14 08:30:15 +00:00
e9fbc3f014
Implement ctlz and cttz with bsr and bsf.
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llvm-svn: 45024
2007-12-14 02:13:44 +00:00
cb77f04e1f
Add flags to indicate that there are "never" side effects or that there "may be"
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side effects for machine instructions.
llvm-svn: 45022
2007-12-14 01:48:59 +00:00
827d30db19
Fold some and + shift in x86 addressing mode.
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llvm-svn: 44970
2007-12-13 00:43:27 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
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llvm-svn: 44960
2007-12-12 23:12:09 +00:00
fde556745b
Remove host endianness info from TargetData and
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put it in a new header System/Host.h instead.
Instead of getting the endianness from configure,
calculate it directly.
llvm-svn: 44959
2007-12-12 23:03:45 +00:00
7a7742c2fe
Allow vector integer constants to be created with
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SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.
llvm-svn: 44954
2007-12-12 22:21:26 +00:00
0f42730722
Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64.
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llvm-svn: 44929
2007-12-12 07:55:34 +00:00
2a98956796
Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.
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llvm-svn: 44921
2007-12-12 06:45:40 +00:00
Chris Lattner