2dd217b88f
Added custom lowering of fabs
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llvm-svn: 25831
2006-01-31 03:14:29 +00:00
5b97fcf0f5
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
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conversions. SSE does not have instructions to handle these tasks.
llvm-svn: 25817
2006-01-30 08:02:57 +00:00
f0b24d2dc0
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
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llvm-svn: 25803
2006-01-30 04:09:27 +00:00
c6fa0282d2
adjust prototype
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llvm-svn: 25798
2006-01-30 03:49:07 +00:00
8c47c3a3b1
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
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the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
llvm-svn: 25696
2006-01-27 21:09:22 +00:00
cde9e30bc6
x86 CPU detection and proper subtarget support
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llvm-svn: 25679
2006-01-27 08:10:46 +00:00
e74795cd70
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
llvm-svn: 25606
2006-01-25 18:21:52 +00:00
6305e50ee1
Fix sint_to_fp (fild*) support.
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llvm-svn: 25257
2006-01-12 22:54:21 +00:00
ae986f1f1e
Support for MEMCPY and MEMSET.
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llvm-svn: 25226
2006-01-11 22:15:48 +00:00
339edad775
SSE cmov support.
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llvm-svn: 25190
2006-01-11 00:33:36 +00:00
9c249c37f8
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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llvm-svn: 25158
2006-01-09 18:33:28 +00:00
172fce7050
* Fast call support.
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* FP cmp, setcc, etc.
llvm-svn: 25117
2006-01-06 00:43:03 +00:00
45e19098a6
DAG based isel call support.
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llvm-svn: 25103
2006-01-05 00:27:02 +00:00
5c59d49630
More X86 floating point patterns.
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llvm-svn: 24990
2005-12-23 07:31:11 +00:00
9cdc16c6d3
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
llvm-svn: 24921
2005-12-21 23:05:39 +00:00
c1583dbd63
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
llvm-svn: 24917
2005-12-21 20:21:51 +00:00
a74ce62746
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
llvm-svn: 24888
2005-12-21 02:39:21 +00:00
6af02635a7
Added a hook to print out names of target specific DAG nodes.
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llvm-svn: 24877
2005-12-20 06:22:03 +00:00
6fc31046aa
X86 conditional branch support.
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llvm-svn: 24870
2005-12-19 23:12:38 +00:00
225a4d0d6d
X86 lowers SELECT to a cmp / test followed by a conditional move.
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llvm-svn: 24754
2005-12-17 01:21:05 +00:00
0bf68ae434
The second patch of X86 support for read cycle counter.
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llvm-svn: 24430
2005-11-20 21:41:10 +00:00
76ac068568
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
llvm-svn: 24358
2005-11-15 00:40:23 +00:00
Evan Cheng