[PPC] FE support for generating VSX [negated] absolute value instructions
Includes new built-in, conversion of built-in to target-independent intrinsic and update in the header file. Tests are also updated. There is a second part in the backend for which I will post a separate code-review. BACKEND PART SHOULD BE COMMITTED FIRST. Phabricator: http://reviews.llvm.org/D17816 llvm-svn: 263051
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@ -336,6 +336,9 @@ BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "")
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BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "")
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BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "")
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BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "")
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BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "")
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// HTM builtins
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BUILTIN(__builtin_tbegin, "UiUIi", "")
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BUILTIN(__builtin_tend, "UiUIi", "")
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@ -6992,6 +6992,16 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
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llvm::Function *F = CGM.getIntrinsic(ID, ResultType);
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return Builder.CreateCall(F, X);
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}
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// Absolute value
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case PPC::BI__builtin_vsx_xvabsdp:
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case PPC::BI__builtin_vsx_xvabssp: {
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llvm::Type *ResultType = ConvertType(E->getType());
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Value *X = EmitScalarExpr(E->getArg(0));
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llvm::Function *F = CGM.getIntrinsic(Intrinsic::fabs, ResultType);
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return Builder.CreateCall(F, X);
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}
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// FMA variations
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case PPC::BI__builtin_vsx_xvmaddadp:
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case PPC::BI__builtin_vsx_xvmaddasp:
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@ -124,16 +124,18 @@ vec_abs(vector signed long long __a) {
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#endif
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static vector float __ATTRS_o_ai vec_abs(vector float __a) {
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#ifdef __VSX__
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return __builtin_vsx_xvabssp(__a);
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#else
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vector unsigned int __res =
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(vector unsigned int)__a & (vector unsigned int)(0x7FFFFFFF);
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return (vector float)__res;
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#endif
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}
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#if defined(__POWER8_VECTOR__) && defined(__powerpc64__)
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static vector double __ATTRS_o_ai vec_abs(vector double __a) {
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vector unsigned long long __res = { 0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFF };
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__res &= (vector unsigned int)__a;
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return (vector double)__res;
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return __builtin_vsx_xvabsdp(__a);
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}
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#endif
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@ -1,7 +1,13 @@
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// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -faltivec -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
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// RUN: %clang_cc1 -faltivec -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE
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// RUN: %clang_cc1 -faltivec -triple powerpc-unknown-unknown -emit-llvm %s \
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// RUN: -o - | FileCheck %s
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// RUN: %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s \
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// RUN: -o - | FileCheck %s
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// RUN: %clang_cc1 -faltivec -triple powerpc64le-unknown-unknown -emit-llvm %s \
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// RUN: -o - | FileCheck %s -check-prefix=CHECK-LE
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// RUN: not %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
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// RUN: -ferror-limit 0 -o - 2>&1 \
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// RUN: | FileCheck %s -check-prefix=CHECK-NOALTIVEC
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vector bool char vbc = { 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0 };
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vector signed char vsc = { 1, -2, 3, -4, 5, -6, 7, -8, 9, -10, 11, -12, 13, -14, 15, -16 };
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@ -27,6 +33,8 @@ vector int res_vi;
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vector unsigned int res_vui;
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vector float res_vf;
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// CHECK-NOALTIVEC: error: unknown type name 'vector'
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signed char param_sc;
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unsigned char param_uc;
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short param_s;
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@ -66,8 +74,16 @@ void test1() {
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// CHECK-LE: @llvm.ppc.altivec.vmaxsw
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vf = vec_abs(vf);
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// CHECK: and <4 x i32>
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// CHECK-LE: and <4 x i32>
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// CHECK: bitcast <4 x float> %{{.*}} to <4 x i32>
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// CHECK: and <4 x i32> {{.*}}, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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// CHECK: bitcast <4 x i32> %{{.*}} to <4 x float>
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// CHECK: store <4 x float> %{{.*}}, <4 x float>* @vf
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// CHECK-LE: bitcast <4 x float> %{{.*}} to <4 x i32>
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// CHECK-LE: and <4 x i32> {{.*}}, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
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// CHECK-LE: bitcast <4 x i32> %{{.*}} to <4 x float>
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// CHECK-LE: store <4 x float> %{{.*}}, <4 x float>* @vf
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// CHECK-NOALTIVEC: error: use of undeclared identifier 'vf'
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// CHECK-NOALTIVEC: vf = vec_abs(vf)
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/* vec_abs */
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vsc = vec_abss(vsc);
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@ -73,10 +73,10 @@ void test1() {
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// CHECK-PPC: error: call to 'vec_abs' is ambiguous
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res_vd = vec_abs(vda);
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// CHECK: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>*
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// CHECK: and <2 x i64>
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// CHECK-LE: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>*
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// CHECK-LE: and <2 x i64>
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// CHECK: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
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// CHECK: store <2 x double> %{{.*}}, <2 x double>* @res_vd
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// CHECK-LE: call <2 x double> @llvm.fabs.v2f64(<2 x double> %{{.*}})
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// CHECK-LE: store <2 x double> %{{.*}}, <2 x double>* @res_vd
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// CHECK-PPC: error: call to 'vec_abs' is ambiguous
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/* vec_add */
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@ -51,6 +51,14 @@ void test1() {
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// CHECK-LABEL: define void @test1
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// CHECK-LE-LABEL: define void @test1
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res_vf = vec_abs(vf);
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// CHECK: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
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// CHECK-LE: call <4 x float> @llvm.fabs.v4f32(<4 x float> %{{[0-9]*}})
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dummy();
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// CHECK: call void @dummy()
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// CHECK-LE: call void @dummy()
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res_vd = vec_add(vd, vd);
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// CHECK: fadd <2 x double>
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// CHECK-LE: fadd <2 x double>
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