[MIPS GlobalISel] Adding GlobalISel
Add GlobalISel infrastructure up to the point where we can select a ret void. Patch by Petar Avramovic. Differential Revision: https://reviews.llvm.org/D43583 llvm-svn: 325888
This commit is contained in:
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db1a062447
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@ -23,21 +23,25 @@ add_llvm_target(MipsCodeGen
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Mips16RegisterInfo.cpp
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MipsAnalyzeImmediate.cpp
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MipsAsmPrinter.cpp
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MipsCallLowering.cpp
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MipsCCState.cpp
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MipsConstantIslandPass.cpp
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MipsDelaySlotFiller.cpp
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MipsFastISel.cpp
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MipsHazardSchedule.cpp
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MipsInstrInfo.cpp
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MipsInstructionSelector.cpp
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MipsISelDAGToDAG.cpp
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MipsISelLowering.cpp
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MipsFrameLowering.cpp
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MipsLegalizerInfo.cpp
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MipsLongBranch.cpp
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MipsMCInstLower.cpp
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MipsMachineFunction.cpp
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MipsModuleISelDAGToDAG.cpp
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MipsOptimizePICCall.cpp
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MipsOs16.cpp
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MipsRegisterBankInfo.cpp
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MipsRegisterInfo.cpp
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MipsSEFrameLowering.cpp
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MipsSEInstrInfo.cpp
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@ -43,4 +43,5 @@ required_libraries =
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SelectionDAG
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Support
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Target
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GlobalISel
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add_to_library_groups = Mips
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@ -22,6 +22,10 @@ namespace llvm {
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class MipsTargetMachine;
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class ModulePass;
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class FunctionPass;
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class MipsRegisterBankInfo;
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class MipsSubtarget;
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class MipsTargetMachine;
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class InstructionSelector;
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ModulePass *createMipsOs16Pass();
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ModulePass *createMips16HardFloatPass();
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@ -33,6 +37,10 @@ namespace llvm {
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FunctionPass *createMipsLongBranchPass();
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FunctionPass *createMipsConstantIslandPass();
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FunctionPass *createMicroMipsSizeReductionPass();
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InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &,
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MipsSubtarget &,
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MipsRegisterBankInfo &);
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} // end namespace llvm;
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#endif
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@ -0,0 +1,47 @@
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//===- MipsCallLowering.cpp -------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file implements the lowering of LLVM calls to machine code calls for
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/// GlobalISel.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsCallLowering.h"
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#include "MipsISelLowering.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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using namespace llvm;
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MipsCallLowering::MipsCallLowering(const MipsTargetLowering &TLI)
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: CallLowering(&TLI) {}
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bool MipsCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
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const Value *Val, unsigned VReg) const {
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MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
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if (Val != nullptr) {
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return false;
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}
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MIRBuilder.insertInstr(Ret);
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return true;
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}
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bool MipsCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
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const Function &F,
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ArrayRef<unsigned> VRegs) const {
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// Quick exit if there aren't any args.
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if (F.arg_empty())
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return true;
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// Function had args, but we didn't lower them.
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return false;
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}
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@ -0,0 +1,40 @@
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//===- MipsCallLowering.h ---------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// This file describes how to lower LLVM calls to machine code calls.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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#define LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/ValueTypes.h"
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namespace llvm {
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class MipsTargetLowering;
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class MipsCallLowering : public CallLowering {
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public:
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MipsCallLowering(const MipsTargetLowering &TLI);
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bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
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unsigned VReg) const override;
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bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
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ArrayRef<unsigned> VRegs) const override;
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_MIPS_MIPSCALLLOWERING_H
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@ -0,0 +1,66 @@
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//===- MipsInstructionSelector.cpp ------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the InstructionSelector class for
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/// Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "MipsRegisterBankInfo.h"
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#include "MipsSubtarget.h"
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#include "MipsTargetMachine.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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namespace {
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class MipsInstructionSelector : public InstructionSelector {
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public:
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MipsInstructionSelector(const MipsTargetMachine &TM, const MipsSubtarget &STI,
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const MipsRegisterBankInfo &RBI);
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bool select(MachineInstr &I, CodeGenCoverage &CoverageInfo) const override;
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private:
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const MipsTargetMachine &TM;
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const MipsSubtarget &STI;
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const MipsInstrInfo &TII;
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const MipsRegisterInfo &TRI;
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const MipsRegisterBankInfo &RBI;
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};
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} // end anonymous namespace
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MipsInstructionSelector::MipsInstructionSelector(
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const MipsTargetMachine &TM, const MipsSubtarget &STI,
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const MipsRegisterBankInfo &RBI)
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: InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
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TRI(*STI.getRegisterInfo()), RBI(RBI) {}
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bool MipsInstructionSelector::select(MachineInstr &I,
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CodeGenCoverage &CoverageInfo) const {
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if (!isPreISelGenericOpcode(I.getOpcode())) {
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// Not global isel generic opcode.
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// TODO: select copy
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return true;
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}
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// We didn't select anything.
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return false;
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}
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namespace llvm {
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InstructionSelector *createMipsInstructionSelector(const MipsTargetMachine &TM,
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MipsSubtarget &Subtarget,
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MipsRegisterBankInfo &RBI) {
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return new MipsInstructionSelector(TM, Subtarget, RBI);
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}
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} // end namespace llvm
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@ -0,0 +1,24 @@
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//===- MipsLegalizerInfo.cpp ------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the Machinelegalizer class for Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "MipsLegalizerInfo.h"
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#include "llvm/CodeGen/TargetOpcodes.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Type.h"
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using namespace llvm;
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MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
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computeTables();
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}
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@ -0,0 +1,29 @@
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//===- MipsLegalizerInfo ----------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file declares the targeting of the Machinelegalizer class for Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSMACHINELEGALIZER_H
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#define LLVM_LIB_TARGET_MIPS_MIPSMACHINELEGALIZER_H
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
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namespace llvm {
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class MipsSubtarget;
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/// This class provides legalization strategies.
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class MipsLegalizerInfo : public LegalizerInfo {
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public:
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MipsLegalizerInfo(const MipsSubtarget &ST);
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};
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} // end namespace llvm
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#endif
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@ -0,0 +1,26 @@
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//===- MipsRegisterBankInfo.cpp ---------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file implements the targeting of the RegisterBankInfo class for Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#include "MipsRegisterBankInfo.h"
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#include "llvm/CodeGen/GlobalISel/RegisterBank.h"
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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using namespace llvm;
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MipsGenRegisterBankInfo::MipsGenRegisterBankInfo()
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: RegisterBankInfo(nullptr, 0) {}
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MipsRegisterBankInfo::MipsRegisterBankInfo(const TargetRegisterInfo &TRI)
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: MipsGenRegisterBankInfo() {}
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@ -0,0 +1,35 @@
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//===- MipsRegisterBankInfo.h -----------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This file declares the targeting of the RegisterBankInfo class for Mips.
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/// \todo This should be generated by TableGen.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
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#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
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namespace llvm {
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class TargetRegisterInfo;
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class MipsGenRegisterBankInfo : public RegisterBankInfo {
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// TODO: This should be auto-generated by TableGen.
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public:
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MipsGenRegisterBankInfo();
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};
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/// This class provides the information for the target register banks.
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class MipsRegisterBankInfo final : public MipsGenRegisterBankInfo {
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public:
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MipsRegisterBankInfo(const TargetRegisterInfo &TRI);
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};
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} // end namespace llvm
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#endif
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@ -16,6 +16,9 @@
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#include "MipsMachineFunction.h"
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#include "MipsRegisterInfo.h"
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#include "MipsTargetMachine.h"
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#include "MipsCallLowering.h"
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#include "MipsLegalizerInfo.h"
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#include "MipsRegisterBankInfo.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/Support/CommandLine.h"
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@ -177,6 +180,14 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
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MSAWarningPrinted = true;
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}
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}
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CallLoweringInfo.reset(new MipsCallLowering(*getTargetLowering()));
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Legalizer.reset(new MipsLegalizerInfo(*this));
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auto *RBI = new MipsRegisterBankInfo(*getRegisterInfo());
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RegBankInfo.reset(RBI);
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InstSelector.reset(createMipsInstructionSelector(
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*static_cast<const MipsTargetMachine *>(&TM), *this, *RBI));
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}
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bool MipsSubtarget::isPositionIndependent() const {
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@ -234,3 +245,19 @@ bool MipsSubtarget::isABI_N64() const { return getABI().IsN64(); }
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bool MipsSubtarget::isABI_N32() const { return getABI().IsN32(); }
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bool MipsSubtarget::isABI_O32() const { return getABI().IsO32(); }
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const MipsABIInfo &MipsSubtarget::getABI() const { return TM.getABI(); }
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const CallLowering *MipsSubtarget::getCallLowering() const {
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return CallLoweringInfo.get();
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}
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const LegalizerInfo *MipsSubtarget::getLegalizerInfo() const {
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return Legalizer.get();
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}
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const RegisterBankInfo *MipsSubtarget::getRegBankInfo() const {
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return RegBankInfo.get();
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}
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const InstructionSelector *MipsSubtarget::getInstructionSelector() const {
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return InstSelector.get();
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}
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#include "MipsInstrInfo.h"
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#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/CodeGen/GlobalISel/CallLowering.h"
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#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Support/ErrorHandling.h"
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const InstrItineraryData *getInstrItineraryData() const override {
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return &InstrItins;
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}
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protected:
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// GlobalISel related APIs.
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std::unique_ptr<CallLowering> CallLoweringInfo;
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std::unique_ptr<LegalizerInfo> Legalizer;
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std::unique_ptr<RegisterBankInfo> RegBankInfo;
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std::unique_ptr<InstructionSelector> InstSelector;
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public:
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const CallLowering *getCallLowering() const override;
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const LegalizerInfo *getLegalizerInfo() const override;
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const RegisterBankInfo *getRegBankInfo() const override;
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const InstructionSelector *getInstructionSelector() const override;
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};
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} // End llvm namespace
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/Analysis/TargetTransformInfo.h"
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#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
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#include "llvm/CodeGen/GlobalISel/Legalizer.h"
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#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
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#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
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#include "llvm/CodeGen/BasicTTIImpl.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/Passes.h"
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@ -46,6 +50,9 @@ extern "C" void LLVMInitializeMipsTarget() {
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RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());
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RegisterTargetMachine<MipsebTargetMachine> A(getTheMips64Target());
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RegisterTargetMachine<MipselTargetMachine> B(getTheMips64elTarget());
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PassRegistry *PR = PassRegistry::getPassRegistry();
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initializeGlobalISel(*PR);
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}
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static std::string computeDataLayout(const Triple &TT, StringRef CPU,
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bool addInstSelector() override;
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void addPreEmitPass() override;
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void addPreRegAlloc() override;
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bool addIRTranslator() override;
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bool addLegalizeMachineIR() override;
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bool addRegBankSelect() override;
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bool addGlobalInstructionSelect() override;
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};
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} // end anonymous namespace
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@ -285,3 +296,23 @@ void MipsPassConfig::addPreEmitPass() {
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addPass(createMipsHazardSchedule());
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addPass(createMipsConstantIslandPass());
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}
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bool MipsPassConfig::addIRTranslator() {
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addPass(new IRTranslator());
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return false;
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}
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bool MipsPassConfig::addLegalizeMachineIR() {
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addPass(new Legalizer());
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return false;
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}
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bool MipsPassConfig::addRegBankSelect() {
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addPass(new RegBankSelect());
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return false;
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}
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bool MipsPassConfig::addGlobalInstructionSelect() {
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addPass(new InstructionSelect());
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return false;
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}
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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define void @void() {
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; MIPS32-LABEL: name: void
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; MIPS32: bb.1.entry:
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; MIPS32: RetRA
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entry:
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ret void
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}
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32
|
||||
|
||||
define void @void() {
|
||||
; MIPS32-LABEL: void:
|
||||
; MIPS32: # %bb.0: # %entry
|
||||
; MIPS32-NEXT: jr $ra
|
||||
; MIPS32-NEXT: nop
|
||||
entry:
|
||||
ret void
|
||||
}
|
||||
|
Loading…
Reference in New Issue